[U-Boot] [PATCH 1/2] microblaze: Read information about timer/interrupts from DT
Read information about timer and interrupts from DT. This is the first small step to move timer and intc to DM.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/microblaze/cpu/interrupts.c | 25 +++++++++++++++++++++++++ arch/microblaze/cpu/timer.c | 39 ++++++++++++++++++++++++++++++++++++++- 2 files changed, 63 insertions(+), 1 deletion(-)
diff --git a/arch/microblaze/cpu/interrupts.c b/arch/microblaze/cpu/interrupts.c index b6d6610f2fd7..e5d8894f5447 100644 --- a/arch/microblaze/cpu/interrupts.c +++ b/arch/microblaze/cpu/interrupts.c @@ -10,10 +10,13 @@
#include <common.h> #include <command.h> +#include <fdtdec.h> #include <malloc.h> #include <asm/microblaze_intc.h> #include <asm/asm.h>
+DECLARE_GLOBAL_DATA_PTR; + void enable_interrupts(void) { debug("Enable interrupts for the whole CPU\n"); @@ -113,10 +116,32 @@ int interrupt_init(void) { int i;
+#ifdef CONFIG_OF_CONTROL + const void *blob = gd->fdt_blob; + int node = 0; + + debug("INTC: Initialization\n"); + + node = fdt_node_offset_by_compatible(blob, node, + "xlnx,xps-intc-1.00.a"); + if (node != -1) { + fdt_addr_t base = fdtdec_get_addr(blob, node, "reg"); + if (base == FDT_ADDR_T_NONE) + return -1; + + debug("INTC: Base addr %lx\n", base); + intc = (microblaze_intc_t *)base; + irq_no = fdtdec_get_int(blob, node, "xlnx,num-intr-inputs", 0); + debug("INTC: IRQ NO %x\n", irq_no); + } else { + return node; + } +#else #if defined(CONFIG_SYS_INTC_0_ADDR) && defined(CONFIG_SYS_INTC_0_NUM) intc = (microblaze_intc_t *)CONFIG_SYS_INTC_0_ADDR; irq_no = CONFIG_SYS_INTC_0_NUM; #endif +#endif if (irq_no) { vecs = calloc(1, sizeof(struct irq_action) * irq_no); if (vecs == NULL) { diff --git a/arch/microblaze/cpu/timer.c b/arch/microblaze/cpu/timer.c index 3960bbb08a84..c0fc7c0f3ca1 100644 --- a/arch/microblaze/cpu/timer.c +++ b/arch/microblaze/cpu/timer.c @@ -7,9 +7,12 @@ */
#include <common.h> +#include <fdtdec.h> #include <asm/microblaze_timer.h> #include <asm/microblaze_intc.h>
+DECLARE_GLOBAL_DATA_PTR; + volatile int timestamp = 0; microblaze_timer_t *tmr;
@@ -29,8 +32,10 @@ void __udelay(unsigned long usec) while ((get_timer(0) - i) < (usec / 1000)) ; } else { +#ifndef CONFIG_OF_CONTROL for (i = 0; i < (usec * XILINX_CLOCK_FREQ / 10000000); i++) ; +#endif } }
@@ -47,12 +52,44 @@ int timer_init (void) u32 preload = 0; u32 ret = 0;
+#ifdef CONFIG_OF_CONTROL + const void *blob = gd->fdt_blob; + int node = 0; + u32 cell[2]; + + debug("TIMER: Initialization\n"); + + node = fdt_node_offset_by_compatible(blob, node, + "xlnx,xps-timer-1.00.a"); + if (node != -1) { + fdt_addr_t base = fdtdec_get_addr(blob, node, "reg"); + if (base == FDT_ADDR_T_NONE) + return -1; + + debug("TIMER: Base addr %lx\n", base); + tmr = (microblaze_timer_t *)base; + + ret = fdtdec_get_int_array(blob, node, "interrupts", + cell, ARRAY_SIZE(cell)); + if (ret) + return ret; + + irq = cell[0]; + debug("TIMER: IRQ %x\n", irq); + + preload = fdtdec_get_int(blob, node, "clock-frequency", 0); + preload /= CONFIG_SYS_HZ; + } else { + return node; + } + +#else #if defined(CONFIG_SYS_TIMER_0_ADDR) && defined(CONFIG_SYS_INTC_0_NUM) preload = XILINX_CLOCK_FREQ / CONFIG_SYS_HZ; irq = CONFIG_SYS_TIMER_0_IRQ; tmr = (microblaze_timer_t *) (CONFIG_SYS_TIMER_0_ADDR); #endif - +#endif if (tmr && preload && irq >= 0) { tmr->loadreg = preload; tmr->control = TIMER_INTERRUPT | TIMER_RESET;
OF_CONTROL is enabled by default that's why this is dead code.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/microblaze/cpu/interrupts.c | 9 +-------- arch/microblaze/cpu/timer.c | 14 -------------- board/xilinx/microblaze-generic/xparameters.h | 11 ----------- include/configs/microblaze-generic.h | 12 ------------ 4 files changed, 1 insertion(+), 45 deletions(-)
diff --git a/arch/microblaze/cpu/interrupts.c b/arch/microblaze/cpu/interrupts.c index e5d8894f5447..010ca4a02c49 100644 --- a/arch/microblaze/cpu/interrupts.c +++ b/arch/microblaze/cpu/interrupts.c @@ -115,8 +115,6 @@ static void intc_init(void) int interrupt_init(void) { int i; - -#ifdef CONFIG_OF_CONTROL const void *blob = gd->fdt_blob; int node = 0;
@@ -136,12 +134,7 @@ int interrupt_init(void) } else { return node; } -#else -#if defined(CONFIG_SYS_INTC_0_ADDR) && defined(CONFIG_SYS_INTC_0_NUM) - intc = (microblaze_intc_t *)CONFIG_SYS_INTC_0_ADDR; - irq_no = CONFIG_SYS_INTC_0_NUM; -#endif -#endif + if (irq_no) { vecs = calloc(1, sizeof(struct irq_action) * irq_no); if (vecs == NULL) { diff --git a/arch/microblaze/cpu/timer.c b/arch/microblaze/cpu/timer.c index c0fc7c0f3ca1..8845e07d0e8b 100644 --- a/arch/microblaze/cpu/timer.c +++ b/arch/microblaze/cpu/timer.c @@ -31,11 +31,6 @@ void __udelay(unsigned long usec) i = get_timer(0); while ((get_timer(0) - i) < (usec / 1000)) ; - } else { -#ifndef CONFIG_OF_CONTROL - for (i = 0; i < (usec * XILINX_CLOCK_FREQ / 10000000); i++) - ; -#endif } }
@@ -51,8 +46,6 @@ int timer_init (void) int irq = -1; u32 preload = 0; u32 ret = 0; - -#ifdef CONFIG_OF_CONTROL const void *blob = gd->fdt_blob; int node = 0; u32 cell[2]; @@ -83,13 +76,6 @@ int timer_init (void) return node; }
-#else -#if defined(CONFIG_SYS_TIMER_0_ADDR) && defined(CONFIG_SYS_INTC_0_NUM) - preload = XILINX_CLOCK_FREQ / CONFIG_SYS_HZ; - irq = CONFIG_SYS_TIMER_0_IRQ; - tmr = (microblaze_timer_t *) (CONFIG_SYS_TIMER_0_ADDR); -#endif -#endif if (tmr && preload && irq >= 0) { tmr->loadreg = preload; tmr->control = TIMER_INTERRUPT | TIMER_RESET; diff --git a/board/xilinx/microblaze-generic/xparameters.h b/board/xilinx/microblaze-generic/xparameters.h index ccb528ed9266..dc5645bd1461 100644 --- a/board/xilinx/microblaze-generic/xparameters.h +++ b/board/xilinx/microblaze-generic/xparameters.h @@ -13,21 +13,10 @@
#define XILINX_BOARD_NAME microblaze-generic
-/* System Clock Frequency */ -#define XILINX_CLOCK_FREQ 100000000 - /* Microblaze is microblaze_0 */ #define XILINX_USE_MSR_INSTR 1 #define XILINX_FSL_NUMBER 3
-/* Interrupt controller is opb_intc_0 */ -#define XILINX_INTC_BASEADDR 0x41200000 -#define XILINX_INTC_NUM_INTR_INPUTS 6 - -/* Timer pheriphery is opb_timer_1 */ -#define XILINX_TIMER_BASEADDR 0x41c00000 -#define XILINX_TIMER_IRQ 0 - /* GPIO is LEDs_4Bit*/ #define XILINX_GPIO_BASEADDR 0x40000000
diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 27668f2a891c..09bfabcfdf11 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -47,18 +47,6 @@ #endif #define CONFIG_BOARD_LATE_INIT
-/* interrupt controller */ -#ifdef XILINX_INTC_BASEADDR -# define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR -# define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS -#endif - -/* timer */ -#if defined(XILINX_TIMER_BASEADDR) && defined(XILINX_TIMER_IRQ) -# define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR -# define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ -#endif - /* watchdog */ #if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ) # define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR
participants (1)
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Michal Simek