The SAM9-L9261 board support is based on code for AT91SAM9261EK. The Atmel LCD initialization in drivers/video/atmel_lcdfb.c has a minor modification to enable LCD video clock invertion as required by the SAM9-L9261 LCD.

Signed-off-by: Dimitar Dimitrov dinuxbg@gmail.com

--- MAINTAINERS | 3 + MAKEALL | 1 + Makefile | 17 +++ board/olimex/sam9_l9261/Makefile | 56 +++++++ board/olimex/sam9_l9261/config.mk | 1 + board/olimex/sam9_l9261/led.c | 43 ++++++ board/olimex/sam9_l9261/partition.c | 40 +++++ board/olimex/sam9_l9261/sam9_l9261.c | 265 ++++++++++++++++++++++++++++++++++ drivers/video/atmel_lcdfb.c | 3 + include/configs/sam9_l9261.h | 232 +++++++++++++++++++++++++++++ tools/Makefile | 3 + tools/logos/olimex.bmp | Bin 0 -> 27510 bytes 12 files changed, 664 insertions(+), 0 deletions(-) create mode 100644 board/olimex/sam9_l9261/Makefile create mode 100644 board/olimex/sam9_l9261/config.mk create mode 100644 board/olimex/sam9_l9261/led.c create mode 100644 board/olimex/sam9_l9261/partition.c create mode 100644 board/olimex/sam9_l9261/sam9_l9261.c create mode 100644 include/configs/sam9_l9261.h create mode 100644 tools/logos/olimex.bmp

diff --git a/MAINTAINERS b/MAINTAINERS index 0041112..4ba7127 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -133,6 +133,9 @@ Jon Diekema jon.diekema@smiths-aerospace.com

sbc8260 MPC8260

+Dimitar Dimitrov dinuxbg@gmail.com + sam9_l9261 AT91SAM9261 + Dirk Eibach eibach@gdsys.de

gdppc440etx PPC440EP/GR diff --git a/MAKEALL b/MAKEALL index 41f1445..9f0353a 100755 --- a/MAKEALL +++ b/MAKEALL @@ -596,6 +596,7 @@ LIST_at91=" \ m501sk \ pm9261 \ pm9263 \ + sam9_l9261 \ "

######################################################################### diff --git a/Makefile b/Makefile index 2a06440..51e2dd4 100644 --- a/Makefile +++ b/Makefile @@ -2757,6 +2757,23 @@ at91sam9261ek_config : unconfig fi; @$(MKCONFIG) -a at91sam9261ek arm arm926ejs at91sam9261ek atmel at91

+sam9_l9261_nandflash_config \ +sam9_l9261_dataflash_cs0_config \ +sam9_l9261_dataflash_cs3_config \ +sam9_l9261_config : unconfig + @mkdir -p $(obj)include + @if [ "$(findstring _nandflash,$@)" ] ; then \ + echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \ + $(XECHO) "... with environment variable in NAND FLASH" ; \ + elif [ "$(findstring dataflash_cs3,$@)" ] ; then \ + echo "#define CONFIG_SYS_USE_DATAFLASH_CS3 1" >>$(obj)include/config.h ; \ + $(XECHO) "... with environment variable in SPI DATAFLASH CS3" ; \ + else \ + echo "#define CONFIG_SYS_USE_DATAFLASH_CS0 1" >>$(obj)include/config.h ; \ + $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \ + fi; + @$(MKCONFIG) -a sam9_l9261 arm arm926ejs sam9_l9261 olimex at91 + at91sam9263ek_norflash_config \ at91sam9263ek_norflash_boot_config \ at91sam9263ek_nandflash_config \ diff --git a/board/olimex/sam9_l9261/Makefile b/board/olimex/sam9_l9261/Makefile new file mode 100644 index 0000000..3a1e163 --- /dev/null +++ b/board/olimex/sam9_l9261/Makefile @@ -0,0 +1,56 @@ +# +# (C) Copyright 2003-2008 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# (C) Copyright 2008 +# Stelian Pop stelian.pop@leadtechdesign.com +# Lead Tech Design <www.leadtechdesign.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y += sam9_l9261.o +COBJS-y += led.o +COBJS-$(CONFIG_HAS_DATAFLASH) += partition.o + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/olimex/sam9_l9261/config.mk b/board/olimex/sam9_l9261/config.mk new file mode 100644 index 0000000..ff2cfd1 --- /dev/null +++ b/board/olimex/sam9_l9261/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0x23f00000 diff --git a/board/olimex/sam9_l9261/led.c b/board/olimex/sam9_l9261/led.c new file mode 100644 index 0000000..5d1c5f2 --- /dev/null +++ b/board/olimex/sam9_l9261/led.c @@ -0,0 +1,43 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop stelian.pop@leadtechdesign.com + * Lead Tech Design <www.leadtechdesign.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91sam9261.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> + +void coloured_LED_init(void) +{ + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOA); + + at91_set_gpio_output(CONFIG_RED_LED, 1); + at91_set_gpio_output(CONFIG_GREEN_LED, 1); + at91_set_gpio_output(CONFIG_YELLOW_LED, 1); + + at91_set_gpio_value(CONFIG_RED_LED, 0); + at91_set_gpio_value(CONFIG_GREEN_LED, 1); + at91_set_gpio_value(CONFIG_YELLOW_LED, 1); +} diff --git a/board/olimex/sam9_l9261/partition.c b/board/olimex/sam9_l9261/partition.c new file mode 100644 index 0000000..c739b11 --- /dev/null +++ b/board/olimex/sam9_l9261/partition.c @@ -0,0 +1,40 @@ +/* + * (C) Copyright 2008 + * Ulf Samuelsson ulf@atmel.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ +#include <common.h> +#include <config.h> +#include <asm/hardware.h> +#include <dataflash.h> + +AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS]; + +struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = { + {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ + {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3, 3} +}; + +/*define the area offsets*/ +dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { + {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"}, + {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"}, + {0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"}, + {0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"}, + {0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"}, +}; diff --git a/board/olimex/sam9_l9261/sam9_l9261.c b/board/olimex/sam9_l9261/sam9_l9261.c new file mode 100644 index 0000000..beb729d --- /dev/null +++ b/board/olimex/sam9_l9261/sam9_l9261.c @@ -0,0 +1,265 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop stelian.pop@leadtechdesign.com + * Lead Tech Design <www.leadtechdesign.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91sam9261.h> +#include <asm/arch/at91sam9261_matrix.h> +#include <asm/arch/at91sam9_smc.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_rstc.h> +#include <asm/arch/clk.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> +#include <lcd.h> +#include <atmel_lcdc.h> +#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_DRIVER_DM9000) +#include <net.h> +#include <netdev.h> +#endif + +DECLARE_GLOBAL_DATA_PTR; + +/* ------------------------------------------------------------------------- */ +/* + * Miscelaneous platform dependent initialisations + */ + +#ifdef CONFIG_CMD_NAND +static void at91sam9261_nand_hw_init(void) +{ + unsigned long csa; + + /* Enable CS3 */ + csa = at91_sys_read(AT91_MATRIX_EBICSA); + at91_sys_write(AT91_MATRIX_EBICSA, + csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); + + /* Configure SMC CS3 for NAND/SmartMedia */ + at91_sys_write(AT91_SMC_SETUP(3), + AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); + at91_sys_write(AT91_SMC_PULSE(3), + AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | + AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); + at91_sys_write(AT91_SMC_CYCLE(3), + AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); + at91_sys_write(AT91_SMC_MODE(3), + AT91_SMC_READMODE | AT91_SMC_WRITEMODE | + AT91_SMC_EXNWMODE_DISABLE | +#ifdef CONFIG_SYS_NAND_DBW_16 + AT91_SMC_DBW_16 | +#else /* CONFIG_SYS_NAND_DBW_8 */ + AT91_SMC_DBW_8 | +#endif + AT91_SMC_TDF_(2)); + + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOC); + + /* Configure RDY/BSY */ + at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); + + /* Enable NandFlash */ + at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); + at91_set_gpio_output(AT91_PIN_PC14, 1); + + at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */ + at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */ +} +#endif + +#ifdef CONFIG_DRIVER_DM9000 +static void at91sam9261_dm9000_hw_init(void) +{ + /* Configure SMC CS2 for DM9000 */ + at91_sys_write(AT91_SMC_SETUP(2), + AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0)); + at91_sys_write(AT91_SMC_PULSE(2), + AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(8) | + AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(8)); + at91_sys_write(AT91_SMC_CYCLE(2), + AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16)); + at91_sys_write(AT91_SMC_MODE(2), + AT91_SMC_READMODE | AT91_SMC_WRITEMODE | + AT91_SMC_EXNWMODE_DISABLE | + AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 | + AT91_SMC_TDF_(1)); + + /* Configure Reset signal as output */ + at91_set_gpio_output(AT91_PIN_PC10, 0); + + /* Configure Interrupt pin as input, no pull-up */ + at91_set_gpio_input(AT91_PIN_PC11, 0); +} +#endif + +#ifdef CONFIG_LCD +vidinfo_t panel_info = { + vl_col: 320, + vl_row: 240, + vl_clk: 4965000, + vl_sync: 0 /*ATMEL_LCDC_INVLINE_INVERTED | + ATMEL_LCDC_INVFRAME_INVERTED */, + vl_bpix: 3, + vl_tft: 1, + vl_hsync_len: 30, + vl_left_margin: 20, + vl_right_margin:38, + vl_vsync_len: 3, + vl_upper_margin:4, + vl_lower_margin:15, + mmio: AT91SAM9261_LCDC_BASE, +}; + +void lcd_enable(void) +{ + at91_set_gpio_output(AT91_PIN_PA12, 0); /* power up */ +} + +void lcd_disable(void) +{ + at91_set_gpio_output(AT91_PIN_PA12, 1); /* power down */ +} + +static void at91sam9261_lcd_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PB0, 0); /* LCDVSYNC */ + at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */ + at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */ + at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */ + + at91_set_A_periph(AT91_PIN_PB5, 0); /* LCDD R0 */ + at91_set_A_periph(AT91_PIN_PB6, 0); /* LCDD R1 */ + at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD R2 */ + at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD R3 */ + at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD R4 */ + at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD R5 */ + at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD R6 */ + at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD R7 */ + + at91_set_A_periph(AT91_PIN_PB13, 0); /* LCDD G0 */ + at91_set_A_periph(AT91_PIN_PB14, 0); /* LCDD G1 */ + at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD G2 */ + at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD G3 */ + at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD G4 */ + at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD G5 */ + at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD G6 */ + at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD G7 */ + + at91_set_B_periph(AT91_PIN_PB21, 0); /* LCDD B0 */ + at91_set_B_periph(AT91_PIN_PB22, 0); /* LCDD B1 */ + at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD B2 */ + at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD B3 */ + at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD B4 */ + at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD B5 */ + at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD B6 */ + at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD B7 */ + + at91_sys_write(AT91_PMC_SCER, AT91_PMC_HCK1); + + gd->fb_base = AT91SAM9261_SRAM_BASE; +} + +#ifdef CONFIG_LCD_INFO +#include <nand.h> +#include <version.h> + +void lcd_show_board_info(void) +{ + ulong dram_size, nand_size; + int i; + char temp[32]; + + lcd_printf ("%s\n", U_BOOT_VERSION); + lcd_printf ("(C) 2009 Olimex Ltd\n"); + lcd_printf ("support@olimex.com\n"); + lcd_printf ("%s CPU at %s MHz\n", + AT91_CPU_NAME, + strmhz(temp, get_cpu_clk_rate())); + + dram_size = 0; + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) + dram_size += gd->bd->bi_dram[i].size; + nand_size = 0; + for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) + nand_size += nand_info[i].size; + lcd_printf (" %ld MB SDRAM, %ld MB NAND\n", + dram_size >> 20, + nand_size >> 20 ); +} +#endif /* CONFIG_LCD_INFO */ +#endif + +int board_init(void) +{ + /* Enable Ctrlc */ + console_init_f(); + + /* arch number of AT91SAM9261EK-Board */ + gd->bd->bi_arch_number = MACH_TYPE_SAM9_L9261; + /* adress of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + at91_serial_hw_init(); +#ifdef CONFIG_CMD_NAND + at91sam9261_nand_hw_init(); +#endif +#ifdef CONFIG_HAS_DATAFLASH + at91_spi0_hw_init(1 << 0); +#endif +#ifdef CONFIG_DRIVER_DM9000 + at91sam9261_dm9000_hw_init(); +#endif +#ifdef CONFIG_LCD + at91sam9261_lcd_hw_init(); +#endif + return 0; +} + +#ifdef CONFIG_DRIVER_DM9000 + int board_eth_init(bd_t *bis) + { + return dm9000_initialize(bis); + } +#endif +int dram_init(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM; + gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + return 0; +} + +#ifdef CONFIG_RESET_PHY_R +void reset_phy(void) +{ +#ifdef CONFIG_DRIVER_DM9000 + /* + * Initialize ethernet HW addr prior to starting Linux, + * needed for nfsroot + */ + eth_init(gd->bd); +#endif +} +#endif diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c index db86763..e9eb8db 100644 --- a/drivers/video/atmel_lcdfb.c +++ b/drivers/video/atmel_lcdfb.c @@ -112,6 +112,9 @@ void lcd_ctrl_init(void *lcdbase)

value |= panel_info.vl_sync; value |= (panel_info.vl_bpix << 5); +#if defined(CONFIG_SAM9_L9261) + value |= ATMEL_LCDC_INVCLK_INVERTED; +#endif lcdc_writel(panel_info.mmio, ATMEL_LCDC_LCDCON2, value);

/* Vertical timing */ diff --git a/include/configs/sam9_l9261.h b/include/configs/sam9_l9261.h new file mode 100644 index 0000000..5281576 --- /dev/null +++ b/include/configs/sam9_l9261.h @@ -0,0 +1,232 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop stelian.pop@leadtechdesign.com + * Lead Tech Design <www.leadtechdesign.com> + * + * Configuation settings for the SAM9-L9261 board, based on the + * AT91SAM9261EK board configuration. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* ARM asynchronous clock */ +#define AT91_CPU_NAME "AT91SAM9261" +#define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ +#define CONFIG_SYS_HZ 1000 + +#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ +#define CONFIG_AT91SAM9261 1 /* It's an Atmel AT91SAM9261 SoC*/ +#define CONFIG_SAM9_L9261 1 /* on an SAM9_L9261 Board */ +#define CONFIG_ARCH_CPU_INIT +#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ + +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 + +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SKIP_RELOCATE_UBOOT + +/* + * Hardware drivers + */ +#define CONFIG_ATMEL_USART 1 +#undef CONFIG_USART0 +#undef CONFIG_USART1 +#undef CONFIG_USART2 +#define CONFIG_USART3 1 /* USART 3 is DBGU */ + +/* LCD */ +#if 0 +#undef CONFIG_LCD +#else +#define CONFIG_LCD 1 +#define LCD_BPP LCD_COLOR8 +#define CONFIG_LCD_LOGO 1 +#undef LCD_TEST_PATTERN +#define CONFIG_LCD_INFO 1 +#define CONFIG_LCD_INFO_BELOW_LOGO 1 +#define CONFIG_SYS_WHITE_ON_BLACK 1 +#define CONFIG_ATMEL_LCD 1 +#define CONFIG_ATMEL_LCD_BGR555 1 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 +#endif +/* LED */ +#define CONFIG_AT91_LED +#define CONFIG_RED_LED AT91_PIN_PA23 /* this is the power led */ +#define CONFIG_GREEN_LED AT91_PIN_PA13 /* this is the user1 led */ +#define CONFIG_YELLOW_LED AT91_PIN_PA14 /* this is the user2 led */ + +#define CONFIG_BOOTDELAY 3 + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE 1 +#define CONFIG_BOOTP_BOOTPATH 1 +#define CONFIG_BOOTP_GATEWAY 1 +#define CONFIG_BOOTP_HOSTNAME 1 + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_IMI +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_SOURCE +#undef CONFIG_CMD_AUTOSCRIPT + +#define CONFIG_CMD_PING 1 +#define CONFIG_CMD_DHCP 1 +#define CONFIG_CMD_NAND 1 +#define CONFIG_CMD_USB 1 + +/* SDRAM */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM 0x20000000 +#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ + +/* DataFlash */ +#define CONFIG_ATMEL_DATAFLASH_SPI +#define CONFIG_HAS_DATAFLASH 1 +#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ) +#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 +#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ +#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */ +#define AT91_SPI_CLK 15000000 +#define DATAFLASH_TCSS (0x1a << 16) +#define DATAFLASH_TCHS (0x1 << 24) + +/* NAND flash */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_NAND_ATMEL +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_DBW_8 1 +/* our ALE is AD22 */ +#define CONFIG_SYS_NAND_MASK_ALE (1 << 22) +/* our CLE is AD21 */ +#define CONFIG_SYS_NAND_MASK_CLE (1 << 21) +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 +#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC15 +#endif + +/* NOR flash - no real flash on this board */ +#define CONFIG_SYS_NO_FLASH 1 + +/* Ethernet */ +#define CONFIG_DRIVER_DM9000 1 +#define CONFIG_DM9000_BASE 0x30000000 +#define DM9000_IO CONFIG_DM9000_BASE +#define DM9000_DATA (CONFIG_DM9000_BASE + 4) +#define CONFIG_DM9000_USE_16BIT 1 +#define CONFIG_NET_RETRY_COUNT 20 +#define CONFIG_RESET_PHY_R 1 + +/* USB */ +#define CONFIG_USB_ATMEL +#define CONFIG_USB_OHCI_NEW 1 +#define CONFIG_DOS_PARTITION 1 +#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 +#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */ +#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261" +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 +#define CONFIG_USB_STORAGE 1 +#define CONFIG_CMD_FAT 1 + +#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ + +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM +#define CONFIG_SYS_MEMTEST_END 0x23e00000 + +#ifdef CONFIG_SYS_USE_DATAFLASH_CS0 + +/* bootstrap + u-boot + env + linux in dataflash on CS0 */ +#define CONFIG_ENV_IS_IN_DATAFLASH 1 +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) +#define CONFIG_ENV_OFFSET 0x4200 +#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) +#define CONFIG_ENV_SIZE 0x4200 +#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm" +#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ + "root=/dev/mtdblock0 " \ + "mtdparts=at91_nand:-(root) " \ + "rw rootfstype=jffs2" + +#elif CONFIG_SYS_USE_DATAFLASH_CS3 + +/* bootstrap + u-boot + env + linux in dataflash on CS3 */ +#define CONFIG_ENV_IS_IN_DATAFLASH 1 +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400) +#define CONFIG_ENV_OFFSET 0x4200 +#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET) +#define CONFIG_ENV_SIZE 0x4200 +#define CONFIG_BOOTCOMMAND "cp.b 0xD0042000 0x22000000 0x210000; bootm" +#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ + "root=/dev/mtdblock0 " \ + "mtdparts=at91_nand:-(root) " \ + "rw rootfstype=jffs2" + +#else /* CONFIG_SYS_USE_NANDFLASH */ + +/* bootstrap + u-boot + env + linux in nandflash */ +#define CONFIG_ENV_IS_IN_NAND 1 +#define CONFIG_ENV_OFFSET 0x60000 +#define CONFIG_ENV_OFFSET_REDUND 0x80000 +#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ +#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" +#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ + "root=/dev/mtdblock5 " \ + "mtdparts=at91_nand:128k(bootstrap)ro," \ + "256k(uboot)ro,128k(env1)ro," \ + "128k(env2)ro,2M(linux),-(root) " \ + "rw rootfstype=jffs2" + +#endif + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } + +#define CONFIG_SYS_PROMPT "U-Boot> " +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_LONGHELP 1 +#define CONFIG_CMDLINE_EDITING 1 + +#define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ + +#define CONFIG_STACKSIZE (32*1024) /* regular stack */ + +#ifdef CONFIG_USE_IRQ +#error CONFIG_USE_IRQ not supported +#endif + +#endif diff --git a/tools/Makefile b/tools/Makefile index 43c284c..4aee609 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -125,6 +125,9 @@ endif ifeq ($(VENDOR),ronetix) LOGO_BMP= logos/ronetix.bmp endif +ifeq ($(VENDOR),olimex) +LOGO_BMP= logos/olimex.bmp +endif

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literal 0 HcmV?d00001