[U-Boot] [PATCH v3 0/4] rk3399: enable dwc3 gadget and fastboot
This patch set enable rk3399 dwc3 controller and gadget driver for fastboot.
Changes in v3: - remove utmi width DT parse from borad init - Parse the DT for utmi+ interface width in dwc3 driver - move the config into Kconfig file.
Changes in v2: - parse dt for utmi width - use a variable to identify utmi+ bus width instead of CONFIG MACRO - remove config for USB2PHY UTMI BITS
Kever Yang (4): rk3399: add a empty "sys_proto.h" header file board: evb-rk3399: add api to support dwc3 gadget usb: dwc3: add support for 16 bit UTMI+ interface config: rk3399: add support for dwc3 gadget
arch/arm/include/asm/arch-rockchip/sys_proto.h | 10 ++++++++++ board/rockchip/evb_rk3399/evb-rk3399.c | 23 +++++++++++++++++++++++ configs/evb-rk3399_defconfig | 17 +++++++++++++++++ drivers/usb/dwc3/core.c | 18 ++++++++++++++++++ drivers/usb/dwc3/core.h | 12 ++++++++++++ 5 files changed, 80 insertions(+) create mode 100644 arch/arm/include/asm/arch-rockchip/sys_proto.h
driver/usb/dwc3/gadget.c need a "sys_proto.h" header file, add a empty one to make compile success.
Signed-off-by: Kever Yang kever.yang@rock-chips.com Acked-by: Simon Glass sjg@chromium.org ---
Changes in v3: None Changes in v2: None
arch/arm/include/asm/arch-rockchip/sys_proto.h | 10 ++++++++++ 1 file changed, 10 insertions(+) create mode 100644 arch/arm/include/asm/arch-rockchip/sys_proto.h
diff --git a/arch/arm/include/asm/arch-rockchip/sys_proto.h b/arch/arm/include/asm/arch-rockchip/sys_proto.h new file mode 100644 index 0000000..35423e1 --- /dev/null +++ b/arch/arm/include/asm/arch-rockchip/sys_proto.h @@ -0,0 +1,10 @@ +/* + * (C) Copyright 2016 Rockchip Electronics Co.,Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _ASM_ARCH_SYS_PROTO_H +#define _ASM_ARCH_SYS_PROTO_H + +#endif /* _ASM_ARCH_SYS_PROTO_H */
This patch add board_usb_init() and interrupt callback for dwc3 gadget.
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
Changes in v3: - remove utmi width DT parse from borad init
Changes in v2: - parse dt for utmi width
board/rockchip/evb_rk3399/evb-rk3399.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)
diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c index d394276..0d39902 100644 --- a/board/rockchip/evb_rk3399/evb-rk3399.c +++ b/board/rockchip/evb_rk3399/evb-rk3399.c @@ -7,6 +7,8 @@ #include <dm.h> #include <dm/pinctrl.h> #include <asm/arch/periph.h> +#include <usb.h> +#include <dwc3-uboot.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -54,3 +56,24 @@ void dram_init_banksize(void) gd->bd->bi_dram[0].start = 0x200000; gd->bd->bi_dram[0].size = 0x80000000; } + +#ifdef CONFIG_USB_DWC3 +static struct dwc3_device dwc3_device_data = { + .maximum_speed = USB_SPEED_HIGH, + .base = 0xfe800000, + .dr_mode = USB_DR_MODE_PERIPHERAL, + .index = 0, + .dis_u2_susphy_quirk = 1, +}; + +int usb_gadget_handle_interrupts(void) +{ + dwc3_uboot_handle_interrupt(0); + return 0; +} + +int board_usb_init(int index, enum usb_init_type init) +{ + return dwc3_uboot_init(&dwc3_device_data); +} +#endif
On 08/31/2016 10:40 AM, Kever Yang wrote:
This patch add board_usb_init() and interrupt callback for dwc3 gadget.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
Changes in v3:
- remove utmi width DT parse from borad init
OK
Changes in v2:
- parse dt for utmi width
board/rockchip/evb_rk3399/evb-rk3399.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)
diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c index d394276..0d39902 100644 --- a/board/rockchip/evb_rk3399/evb-rk3399.c +++ b/board/rockchip/evb_rk3399/evb-rk3399.c @@ -7,6 +7,8 @@ #include <dm.h> #include <dm/pinctrl.h> #include <asm/arch/periph.h> +#include <usb.h> +#include <dwc3-uboot.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -54,3 +56,24 @@ void dram_init_banksize(void) gd->bd->bi_dram[0].start = 0x200000; gd->bd->bi_dram[0].size = 0x80000000; }
+#ifdef CONFIG_USB_DWC3 +static struct dwc3_device dwc3_device_data = {
- .maximum_speed = USB_SPEED_HIGH,
- .base = 0xfe800000,
- .dr_mode = USB_DR_MODE_PERIPHERAL,
- .index = 0,
- .dis_u2_susphy_quirk = 1,
+};
Uh, didn't I complain last time that this should come from DT and not platdata ?
+int usb_gadget_handle_interrupts(void) +{
- dwc3_uboot_handle_interrupt(0);
- return 0;
+}
+int board_usb_init(int index, enum usb_init_type init) +{
- return dwc3_uboot_init(&dwc3_device_data);
+} +#endif
Hi Marek,
On 08/31/2016 08:30 PM, Marek Vasut wrote:
On 08/31/2016 10:40 AM, Kever Yang wrote:
This patch add board_usb_init() and interrupt callback for dwc3 gadget.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
Changes in v3:
- remove utmi width DT parse from borad init
OK
Changes in v2:
parse dt for utmi width
board/rockchip/evb_rk3399/evb-rk3399.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)
diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c index d394276..0d39902 100644 --- a/board/rockchip/evb_rk3399/evb-rk3399.c +++ b/board/rockchip/evb_rk3399/evb-rk3399.c @@ -7,6 +7,8 @@ #include <dm.h> #include <dm/pinctrl.h> #include <asm/arch/periph.h> +#include <usb.h> +#include <dwc3-uboot.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -54,3 +56,24 @@ void dram_init_banksize(void) gd->bd->bi_dram[0].start = 0x200000; gd->bd->bi_dram[0].size = 0x80000000; }
+#ifdef CONFIG_USB_DWC3 +static struct dwc3_device dwc3_device_data = {
- .maximum_speed = USB_SPEED_HIGH,
- .base = 0xfe800000,
- .dr_mode = USB_DR_MODE_PERIPHERAL,
- .index = 0,
- .dis_u2_susphy_quirk = 1,
+};
Uh, didn't I complain last time that this should come from DT and not platdata ?
Since I'm not able to remove the platdata, I thought maybe I can init those features here, I will parse DT for maximum_speed, base, and dis_u2_susphy_quirk in next version.
Thanks, - Kever
+int usb_gadget_handle_interrupts(void) +{
- dwc3_uboot_handle_interrupt(0);
- return 0;
+}
+int board_usb_init(int index, enum usb_init_type init) +{
- return dwc3_uboot_init(&dwc3_device_data);
+} +#endif
On 09/01/2016 04:21 AM, Kever Yang wrote:
Hi Marek,
On 08/31/2016 08:30 PM, Marek Vasut wrote:
On 08/31/2016 10:40 AM, Kever Yang wrote:
This patch add board_usb_init() and interrupt callback for dwc3 gadget.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
Changes in v3:
- remove utmi width DT parse from borad init
OK
Changes in v2:
parse dt for utmi width
board/rockchip/evb_rk3399/evb-rk3399.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)
diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c index d394276..0d39902 100644 --- a/board/rockchip/evb_rk3399/evb-rk3399.c +++ b/board/rockchip/evb_rk3399/evb-rk3399.c @@ -7,6 +7,8 @@ #include <dm.h> #include <dm/pinctrl.h> #include <asm/arch/periph.h> +#include <usb.h> +#include <dwc3-uboot.h> DECLARE_GLOBAL_DATA_PTR; @@ -54,3 +56,24 @@ void dram_init_banksize(void) gd->bd->bi_dram[0].start = 0x200000; gd->bd->bi_dram[0].size = 0x80000000; }
+#ifdef CONFIG_USB_DWC3 +static struct dwc3_device dwc3_device_data = {
- .maximum_speed = USB_SPEED_HIGH,
- .base = 0xfe800000,
- .dr_mode = USB_DR_MODE_PERIPHERAL,
- .index = 0,
- .dis_u2_susphy_quirk = 1,
+};
Uh, didn't I complain last time that this should come from DT and not platdata ?
Since I'm not able to remove the platdata, I thought maybe I can init those features here, I will parse DT for maximum_speed, base, and dis_u2_susphy_quirk in next version.
Why aren't you able to remove the platdata ?
Hi Marek,
On 09/01/2016 04:58 PM, Marek Vasut wrote:
On 09/01/2016 04:21 AM, Kever Yang wrote:
Hi Marek,
On 08/31/2016 08:30 PM, Marek Vasut wrote:
On 08/31/2016 10:40 AM, Kever Yang wrote:
This patch add board_usb_init() and interrupt callback for dwc3 gadget.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
Changes in v3:
- remove utmi width DT parse from borad init
OK
Changes in v2:
parse dt for utmi width
board/rockchip/evb_rk3399/evb-rk3399.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)
diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c index d394276..0d39902 100644 --- a/board/rockchip/evb_rk3399/evb-rk3399.c +++ b/board/rockchip/evb_rk3399/evb-rk3399.c @@ -7,6 +7,8 @@ #include <dm.h> #include <dm/pinctrl.h> #include <asm/arch/periph.h> +#include <usb.h> +#include <dwc3-uboot.h> DECLARE_GLOBAL_DATA_PTR; @@ -54,3 +56,24 @@ void dram_init_banksize(void) gd->bd->bi_dram[0].start = 0x200000; gd->bd->bi_dram[0].size = 0x80000000; }
+#ifdef CONFIG_USB_DWC3 +static struct dwc3_device dwc3_device_data = {
- .maximum_speed = USB_SPEED_HIGH,
- .base = 0xfe800000,
- .dr_mode = USB_DR_MODE_PERIPHERAL,
- .index = 0,
- .dis_u2_susphy_quirk = 1,
+};
Uh, didn't I complain last time that this should come from DT and not platdata ?
Since I'm not able to remove the platdata, I thought maybe I can init those features here, I will parse DT for maximum_speed, base, and dis_u2_susphy_quirk in next version.
Why aren't you able to remove the platdata ?
Because this platdata is not only used by Rockchip SoC, but also used for many different SoC like exynos5, zynqmp, and ti SoCs, and the dts node for dwc3 gadget in these SoCs are totally different.
Maybe maintainer like you are the one able to enable the DM for usb/dwc3 gadget, get the all the information from DT and update for all the platforms?
I'm happy to test on rk3399-evb, but I don't have boards for other SoC.
Thanks, - Kever
On 09/02/2016 11:50 AM, Kever Yang wrote:
Hi Marek,
Hi!
On 09/01/2016 04:58 PM, Marek Vasut wrote:
On 09/01/2016 04:21 AM, Kever Yang wrote:
Hi Marek,
On 08/31/2016 08:30 PM, Marek Vasut wrote:
On 08/31/2016 10:40 AM, Kever Yang wrote:
This patch add board_usb_init() and interrupt callback for dwc3 gadget.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
Changes in v3:
- remove utmi width DT parse from borad init
OK
Changes in v2:
parse dt for utmi width
board/rockchip/evb_rk3399/evb-rk3399.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)
diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c index d394276..0d39902 100644 --- a/board/rockchip/evb_rk3399/evb-rk3399.c +++ b/board/rockchip/evb_rk3399/evb-rk3399.c @@ -7,6 +7,8 @@ #include <dm.h> #include <dm/pinctrl.h> #include <asm/arch/periph.h> +#include <usb.h> +#include <dwc3-uboot.h> DECLARE_GLOBAL_DATA_PTR; @@ -54,3 +56,24 @@ void dram_init_banksize(void) gd->bd->bi_dram[0].start = 0x200000; gd->bd->bi_dram[0].size = 0x80000000; }
+#ifdef CONFIG_USB_DWC3 +static struct dwc3_device dwc3_device_data = {
- .maximum_speed = USB_SPEED_HIGH,
- .base = 0xfe800000,
- .dr_mode = USB_DR_MODE_PERIPHERAL,
- .index = 0,
- .dis_u2_susphy_quirk = 1,
+};
Uh, didn't I complain last time that this should come from DT and not platdata ?
Since I'm not able to remove the platdata, I thought maybe I can init those features here, I will parse DT for maximum_speed, base, and dis_u2_susphy_quirk in next version.
Why aren't you able to remove the platdata ?
Because this platdata is not only used by Rockchip SoC, but also used for many different SoC like exynos5, zynqmp, and ti SoCs
No, these platdata are in your board file, so it's only used by your board. If what you mean is that dwc3_uboot_init() requires non-NULL $dwc3_dev parameter, that's pretty easy to fix: - Check if dwc3_dev is NULL and if so, invoke (new) function, let's say dwc3_uboot_of_init() - dwc3_uboot_of_init() would allocate the struct dwc3_device , fill it in from DT and return pointer to it (or null on failure)
This look like the least intrusive way to do things.
, and the dts node for dwc3 gadget in these
SoCs are totally different.
How can the DT node for the exact same controller be different ? The DT is an ABI, STANDARD, it is documented how the node should look and what it should contain. If it deviates from that, it is invalid and needs fixing.
Maybe maintainer like you are the one able to enable the DM for usb/dwc3 gadget, get the all the information from DT and update for all the platforms?
I'm happy to test on rk3399-evb, but I don't have boards for other SoC.
I don't have any dwc3 device (I think), so I depend purely on the contributors to do the right thing.
Thanks,
- Kever
The dwc3 controller is using 8 bit UTMI+ interface for USB2.0 PHY, add one variable in dwc3/dwc3_device struct to support 16 bit UTMI+ interface on some SoCs like Rockchip rk3399.
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
Changes in v3: - Parse the DT for utmi+ interface width in dwc3 driver
Changes in v2: - use a variable to identify utmi+ bus width instead of CONFIG MACRO
drivers/usb/dwc3/core.c | 18 ++++++++++++++++++ drivers/usb/dwc3/core.h | 12 ++++++++++++ 2 files changed, 30 insertions(+)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 85cc96a..b2c7eb1 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -16,6 +16,7 @@
#include <common.h> #include <malloc.h> +#include <fdtdec.h> #include <dwc3-uboot.h> #include <asm/dma-mapping.h> #include <linux/ioport.h> @@ -29,6 +30,8 @@
#include "linux-compat.h"
+DECLARE_GLOBAL_DATA_PTR; + static LIST_HEAD(dwc3_list); /* -------------------------------------------------------------------------- */
@@ -388,6 +391,11 @@ static void dwc3_phy_setup(struct dwc3 *dwc) if (dwc->dis_u2_susphy_quirk) reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
+ if (dwc->usb2_phyif_utmi_width == 16) { + reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK; + reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT; + reg |= DWC3_GUSB2PHYCFG_PHYIF_16BIT; + } dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
mdelay(100); @@ -621,6 +629,8 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev) int ret;
void *mem; + const void *blob = gd->fdt_blob; + int node;
mem = devm_kzalloc(dev, sizeof(*dwc) + DWC3_ALIGN_MASK, GFP_KERNEL); if (!mem) @@ -682,6 +692,14 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
dwc->index = dwc3_dev->index;
+ node = fdt_node_offset_by_compatible(blob, -1, + "rockchip,rk3399-xhci"); + if (node < 0) + debug("%s dwc3 node not found\n", __func__); + else + dwc->usb2_phyif_utmi_width = + fdtdec_get_int(blob, node, "snps,phyif-utmi-bits", -1); + dwc3_cache_hwparams(dwc);
ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_SIZE); diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 72d2fcd..0c61c51 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -74,6 +74,7 @@ #define DWC3_GCTL 0xc110 #define DWC3_GEVTEN 0xc114 #define DWC3_GSTS 0xc118 +#define DWC3_GUCTL1 0xc11c #define DWC3_GSNPSID 0xc120 #define DWC3_GGPIO 0xc124 #define DWC3_GUID 0xc128 @@ -162,7 +163,17 @@
/* Global USB2 PHY Configuration Register */ #define DWC3_GUSB2PHYCFG_PHYSOFTRST (1 << 31) +#define DWC3_GUSB2PHYCFG_ENBLSLPM (1 << 8) #define DWC3_GUSB2PHYCFG_SUSPHY (1 << 6) +#define DWC3_GUSB2PHYCFG_PHYIF_8BIT (0 << 3) +#define DWC3_GUSB2PHYCFG_PHYIF_16BIT (1 << 3) +#define DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT (10) +#define DWC3_GUSB2PHYCFG_USBTRDTIM_MASK (0xf << \ + DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT) +#define DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT (0x5 << \ + DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT) +#define DWC3_GUSB2PHYCFG_USBTRDTIM_8BIT (0x9 << \ + DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)
/* Global USB3 PIPE Control Register */ #define DWC3_GUSB3PIPECTL_PHYSOFTRST (1 << 31) @@ -813,6 +824,7 @@ struct dwc3 {
unsigned tx_de_emphasis_quirk:1; unsigned tx_de_emphasis:2; + unsigned usb2_phyif_utmi_width:5; int index; struct list_head list; };
On 08/31/2016 10:40 AM, Kever Yang wrote:
The dwc3 controller is using 8 bit UTMI+ interface for USB2.0 PHY, add one variable in dwc3/dwc3_device struct to support 16 bit UTMI+ interface on some SoCs like Rockchip rk3399.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
Changes in v3:
- Parse the DT for utmi+ interface width in dwc3 driver
Changes in v2:
- use a variable to identify utmi+ bus width instead of CONFIG MACRO
drivers/usb/dwc3/core.c | 18 ++++++++++++++++++ drivers/usb/dwc3/core.h | 12 ++++++++++++ 2 files changed, 30 insertions(+)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 85cc96a..b2c7eb1 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -16,6 +16,7 @@
#include <common.h> #include <malloc.h> +#include <fdtdec.h> #include <dwc3-uboot.h> #include <asm/dma-mapping.h> #include <linux/ioport.h> @@ -29,6 +30,8 @@
#include "linux-compat.h"
+DECLARE_GLOBAL_DATA_PTR;
static LIST_HEAD(dwc3_list); /* -------------------------------------------------------------------------- */
@@ -388,6 +391,11 @@ static void dwc3_phy_setup(struct dwc3 *dwc) if (dwc->dis_u2_susphy_quirk) reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
if (dwc->usb2_phyif_utmi_width == 16) {
reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK;reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT;reg |= DWC3_GUSB2PHYCFG_PHYIF_16BIT;} dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
mdelay(100);
@@ -621,6 +629,8 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev) int ret;
void *mem;
const void *blob = gd->fdt_blob;
int node;
mem = devm_kzalloc(dev, sizeof(*dwc) + DWC3_ALIGN_MASK, GFP_KERNEL); if (!mem)
@@ -682,6 +692,14 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
dwc->index = dwc3_dev->index;
- node = fdt_node_offset_by_compatible(blob, -1,
"rockchip,rk3399-xhci");- if (node < 0)
debug("%s dwc3 node not found\n", __func__);- else
dwc->usb2_phyif_utmi_width =fdtdec_get_int(blob, node, "snps,phyif-utmi-bits", -1);
This is OK, thanks!
dwc3_cache_hwparams(dwc);
ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_SIZE); diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 72d2fcd..0c61c51 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -74,6 +74,7 @@ #define DWC3_GCTL 0xc110 #define DWC3_GEVTEN 0xc114 #define DWC3_GSTS 0xc118 +#define DWC3_GUCTL1 0xc11c #define DWC3_GSNPSID 0xc120 #define DWC3_GGPIO 0xc124 #define DWC3_GUID 0xc128 @@ -162,7 +163,17 @@
/* Global USB2 PHY Configuration Register */ #define DWC3_GUSB2PHYCFG_PHYSOFTRST (1 << 31) +#define DWC3_GUSB2PHYCFG_ENBLSLPM (1 << 8) #define DWC3_GUSB2PHYCFG_SUSPHY (1 << 6) +#define DWC3_GUSB2PHYCFG_PHYIF_8BIT (0 << 3) +#define DWC3_GUSB2PHYCFG_PHYIF_16BIT (1 << 3) +#define DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT (10) +#define DWC3_GUSB2PHYCFG_USBTRDTIM_MASK (0xf << \
DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)+#define DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT (0x5 << \
DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)+#define DWC3_GUSB2PHYCFG_USBTRDTIM_8BIT (0x9 << \
DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)/* Global USB3 PIPE Control Register */ #define DWC3_GUSB3PIPECTL_PHYSOFTRST (1 << 31) @@ -813,6 +824,7 @@ struct dwc3 {
unsigned tx_de_emphasis_quirk:1; unsigned tx_de_emphasis:2;
- unsigned usb2_phyif_utmi_width:5;
Shouldn't this be :1 ? 0 for 8bit, 1 for 16bit ?
int index; struct list_head list; };
On 08/31/2016 08:32 PM, Marek Vasut wrote:
On 08/31/2016 10:40 AM, Kever Yang wrote:
The dwc3 controller is using 8 bit UTMI+ interface for USB2.0 PHY, add one variable in dwc3/dwc3_device struct to support 16 bit UTMI+ interface on some SoCs like Rockchip rk3399.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
Changes in v3:
- Parse the DT for utmi+ interface width in dwc3 driver
Changes in v2:
use a variable to identify utmi+ bus width instead of CONFIG MACRO
drivers/usb/dwc3/core.c | 18 ++++++++++++++++++ drivers/usb/dwc3/core.h | 12 ++++++++++++ 2 files changed, 30 insertions(+)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 85cc96a..b2c7eb1 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -16,6 +16,7 @@
#include <common.h> #include <malloc.h> +#include <fdtdec.h> #include <dwc3-uboot.h> #include <asm/dma-mapping.h> #include <linux/ioport.h> @@ -29,6 +30,8 @@
#include "linux-compat.h"
+DECLARE_GLOBAL_DATA_PTR;
- static LIST_HEAD(dwc3_list); /* -------------------------------------------------------------------------- */
@@ -388,6 +391,11 @@ static void dwc3_phy_setup(struct dwc3 *dwc) if (dwc->dis_u2_susphy_quirk) reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
if (dwc->usb2_phyif_utmi_width == 16) {
reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK;reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT;reg |= DWC3_GUSB2PHYCFG_PHYIF_16BIT;} dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
mdelay(100);
@@ -621,6 +629,8 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev) int ret;
void *mem;
const void *blob = gd->fdt_blob;
int node;
mem = devm_kzalloc(dev, sizeof(*dwc) + DWC3_ALIGN_MASK, GFP_KERNEL); if (!mem)
@@ -682,6 +692,14 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
dwc->index = dwc3_dev->index;
- node = fdt_node_offset_by_compatible(blob, -1,
"rockchip,rk3399-xhci");- if (node < 0)
debug("%s dwc3 node not found\n", __func__);- else
dwc->usb2_phyif_utmi_width =fdtdec_get_int(blob, node, "snps,phyif-utmi-bits", -1);This is OK, thanks!
dwc3_cache_hwparams(dwc);
ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_SIZE); diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 72d2fcd..0c61c51 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -74,6 +74,7 @@ #define DWC3_GCTL 0xc110 #define DWC3_GEVTEN 0xc114 #define DWC3_GSTS 0xc118 +#define DWC3_GUCTL1 0xc11c #define DWC3_GSNPSID 0xc120 #define DWC3_GGPIO 0xc124 #define DWC3_GUID 0xc128 @@ -162,7 +163,17 @@
/* Global USB2 PHY Configuration Register */ #define DWC3_GUSB2PHYCFG_PHYSOFTRST (1 << 31) +#define DWC3_GUSB2PHYCFG_ENBLSLPM (1 << 8) #define DWC3_GUSB2PHYCFG_SUSPHY (1 << 6) +#define DWC3_GUSB2PHYCFG_PHYIF_8BIT (0 << 3) +#define DWC3_GUSB2PHYCFG_PHYIF_16BIT (1 << 3) +#define DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT (10) +#define DWC3_GUSB2PHYCFG_USBTRDTIM_MASK (0xf << \
DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)+#define DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT (0x5 << \
DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)+#define DWC3_GUSB2PHYCFG_USBTRDTIM_8BIT (0x9 << \
DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)/* Global USB3 PIPE Control Register */ #define DWC3_GUSB3PIPECTL_PHYSOFTRST (1 << 31)
@@ -813,6 +824,7 @@ struct dwc3 {
unsigned tx_de_emphasis_quirk:1; unsigned tx_de_emphasis:2;
- unsigned usb2_phyif_utmi_width:5;
Shouldn't this be :1 ? 0 for 8bit, 1 for 16bit ?
Well, using 1 bit in next version.
Thanks, - Kever
int index; struct list_head list; };
To support fastboot, we need to enable the controller first. rk3399 is using dwc3 as usb device controller, this patch enable the configs for dwc3 gadget.
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
Changes in v3: - move the config into Kconfig file.
Changes in v2: - remove config for USB2PHY UTMI BITS
configs/evb-rk3399_defconfig | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index 2951678..72f2224 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -36,3 +36,20 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_USE_TINY_PRINTF=y CONFIG_ERRNO_STR=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DUALSPEED=y +CONFIG_USB_GADGET_VBUS_DRAW=0 +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_G_DNL_MANUFACTURER="Rockchip" +CONFIG_G_DNL_VENDOR_NUM=0x2207 +CONFIG_G_DNL_PRODUCT_NUM=0x330a +CONFIG_FASTBOOT=y +CONFIG_CMD_FASTBOOT=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=1 +CONFIG_FASTBOOT_BUF_ADDR=0x00800800 +CONFIG_FASTBOOT_BUF_SIZE=0x08000000
participants (2)
-
Kever Yang -
Marek Vasut