[U-Boot] [PATCH 0/5] sunxi: Add support for ALL-H3-CC H2+/H5 variants
Hi,
This series is adds support for the H2+ and H5 variants of the Libre Computer Project ALL-H3-CC board. The board uses the same board design with the H2+, H3, and H5 SoCs, with different memory capacities. The H3 version was supported in v2018.03.
The Linux Kernel patch submissions for these two boards can be found here: https://lkml.org/lkml/2018/4/24/312
The device tree changes are not synced from the kernel. Rather, the same changes are applied to U-boot's copy. First the ALL-H3-CC dts is split into a common board design dtsi, and a H3 specific dts. Then the H2+ and H5 versions are added, reusing the same dtsi file.
Patch 1 disables R_I2C and SPL_I2C for the ALL-H3-CC. Turns out there is no use for it.
Patch 2 splits the ALL-H3-CC dts file into a common board design dtsi, and a H3 specific dts.
Patch 3 adds support for the H2+ variant of ALL-H3-CC.
Patch 4 adds support for the H5 variant of ALL-H3-CC.
Patch 5 is an unrelated cleanup patch for the dts Makefile. It might or might not conflict if sent separately, depending on how much diff context git uses, so I'm sending it together.
Please have a look.
Chen-Yu Tsai (5): sunxi: Disable R_I2C for Libre Computer Board ALL-H3-CC H3 ver. sunxi: Split out common board design for ALL-H3-CC device tree sunxi: Add Libre Computer Board ALL-H3-CC H2+ ver. sunxi: Add Libre Computer Board ALL-H3-CC H5 ver. sunxi: Sort dts Makefile entries for H3
arch/arm/dts/Makefile | 10 +- .../arm/dts/sun50i-h5-libretech-all-h3-cc.dts | 13 ++ .../dts/sun8i-h2-plus-libretech-all-h3-cc.dts | 13 ++ arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts | 166 +----------------- ....dts => sunxi-hx-libretech-all-h3-cc.dtsi} | 9 +- board/sunxi/MAINTAINERS | 4 +- ... => libretech_all_h3_cc_h2_plus_defconfig} | 2 +- configs/libretech_all_h3_cc_h3_defconfig | 2 - ...onfig => libretech_all_h3_cc_h5_defconfig} | 4 +- 9 files changed, 41 insertions(+), 182 deletions(-) create mode 100644 arch/arm/dts/sun50i-h5-libretech-all-h3-cc.dts create mode 100644 arch/arm/dts/sun8i-h2-plus-libretech-all-h3-cc.dts copy arch/arm/dts/{sun8i-h3-libretech-all-h3-cc.dts => sunxi-hx-libretech-all-h3-cc.dtsi} (94%) copy configs/{orangepi_one_defconfig => libretech_all_h3_cc_h2_plus_defconfig} (85%) copy configs/{orangepi_one_defconfig => libretech_all_h3_cc_h5_defconfig} (80%)
The Libre Computer Board ALL-H3-CC does not have an I2C controllable regulator. Having R_I2C and SPL_I2C enabled serves no purpose.
Disable them.
Signed-off-by: Chen-Yu Tsai wens@csie.org --- configs/libretech_all_h3_cc_h3_defconfig | 2 -- 1 file changed, 2 deletions(-)
diff --git a/configs/libretech_all_h3_cc_h3_defconfig b/configs/libretech_all_h3_cc_h3_defconfig index 6072680e4711..185facdf3eab 100644 --- a/configs/libretech_all_h3_cc_h3_defconfig +++ b/configs/libretech_all_h3_cc_h3_defconfig @@ -5,10 +5,8 @@ CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y -CONFIG_R_I2C_ENABLE=y CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-libretech-all-h3-cc" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set
On Tue, Apr 24, 2018 at 08:07:09PM +0800, Chen-Yu Tsai wrote:
The Libre Computer Board ALL-H3-CC does not have an I2C controllable regulator. Having R_I2C and SPL_I2C enabled serves no purpose.
Disable them.
Signed-off-by: Chen-Yu Tsai wens@csie.org
Acked-by: Maxime Ripard maxime.ripard@bootlin.com
maxime
The Libre Computer Project ALL-H3-CC has three models, all using the same board design, but with different pin compatible SoCs and amount of DRAM.
Currently only the H3 1GB DRAM variant is supported. To support the two other variants, first split the original device tree into a common board design part and an SoC specific part.
The SoC part only defines which SoC is used and model name, and includes the SoC specific dtsi file and the common design dtsi file.
Also fix up the SPDX identifier line to use the correct comment style, and place it on the first line.
Signed-off-by: Chen-Yu Tsai wens@csie.org --- arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts | 166 +----------------- ....dts => sunxi-hx-libretech-all-h3-cc.dtsi} | 9 +- 2 files changed, 3 insertions(+), 172 deletions(-) copy arch/arm/dts/{sun8i-h3-libretech-all-h3-cc.dts => sunxi-hx-libretech-all-h3-cc.dtsi} (94%)
diff --git a/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts b/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts index c8fd69f0a4b8..eabc2208efdb 100644 --- a/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts +++ b/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts @@ -1,175 +1,13 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (C) 2017 Chen-Yu Tsai wens@csie.org - * - * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
/dts-v1/; #include "sun8i-h3.dtsi" - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> +#include "sunxi-hx-libretech-all-h3-cc.dtsi"
/ { model = "Libre Computer Board ALL-H3-CC H3"; compatible = "libretech,all-h3-cc-h3", "allwinner,sun8i-h3"; - - aliases { - ethernet0 = &emac; - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - leds { - compatible = "gpio-leds"; - - pwr_led { - label = "librecomputer:green:pwr"; - gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */ - default-state = "on"; - }; - - status_led { - label = "librecomputer:blue:status"; - gpios = <&pio 0 7 GPIO_ACTIVE_HIGH>; /* PA7 */ - }; - }; - - gpio_keys { - compatible = "gpio-keys"; - - power { - label = "power"; - linux,code = <KEY_POWER>; - gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ - }; - }; - - reg_vcc1v2: vcc1v2 { - compatible = "regulator-fixed"; - regulator-name = "vcc1v2"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <®_vcc5v0>; - gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */ - enable-active-high; - }; - - reg_vcc3v3: vcc3v3 { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <®_vcc5v0>; - }; - - /* This represents the board's 5V input */ - reg_vcc5v0: vcc5v0 { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - reg_vcc_dram: vcc-dram { - compatible = "regulator-fixed"; - regulator-name = "vcc-dram"; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <®_vcc5v0>; - gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */ - enable-active-high; - }; - - reg_vcc_io: vcc-io { - compatible = "regulator-fixed"; - regulator-name = "vcc-io"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <®_vcc3v3>; - gpio = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL5 */ - }; - - reg_vdd_cpux: vdd-cpux { - compatible = "regulator-fixed"; - regulator-name = "vdd-cpux"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <®_vcc5v0>; - gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */ - enable-active-high; - }; -}; - -&ehci1 { - status = "okay"; -}; - -&ehci2 { - status = "okay"; -}; - -&ehci3 { - status = "okay"; -}; - -&emac { - phy-handle = <&int_mii_phy>; - phy-mode = "mii"; - allwinner,leds-active-low; - status = "okay"; -}; - -&ir { - pinctrl-names = "default"; - pinctrl-0 = <&ir_pins_a>; - status = "okay"; -}; - -&mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>; - vmmc-supply = <®_vcc_io>; - bus-width = <4>; - cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ - cd-inverted; - status = "okay"; -}; - -&ohci1 { - status = "okay"; -}; - -&ohci2 { - status = "okay"; -}; - -&ohci3 { - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins_a>; - status = "okay"; -}; - -&usbphy { - /* VBUS on USB ports are always on */ - usb0_vbus-supply = <®_vcc5v0>; - usb1_vbus-supply = <®_vcc5v0>; - usb2_vbus-supply = <®_vcc5v0>; - usb3_vbus-supply = <®_vcc5v0>; - status = "okay"; }; diff --git a/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts b/arch/arm/dts/sunxi-hx-libretech-all-h3-cc.dtsi similarity index 94% copy from arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts copy to arch/arm/dts/sunxi-hx-libretech-all-h3-cc.dtsi index c8fd69f0a4b8..5d01bba180e4 100644 --- a/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts +++ b/arch/arm/dts/sunxi-hx-libretech-all-h3-cc.dtsi @@ -1,19 +1,12 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (C) 2017 Chen-Yu Tsai wens@csie.org - * - * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
-/dts-v1/; -#include "sun8i-h3.dtsi" - #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h>
/ { - model = "Libre Computer Board ALL-H3-CC H3"; - compatible = "libretech,all-h3-cc-h3", "allwinner,sun8i-h3"; - aliases { ethernet0 = &emac; serial0 = &uart0;
This patch adds a device tree file for the H2+ version of the Libre Computer Board ALL-H3-CC. It is the same board first introduced in commit afe27544125e ("sunxi: Add support for Libre Computer Board ALL-H3-CC H3 ver."), with the H3 SoC replaced with the H2+ SoC, and has only two 2Gb DDR3 chips instead of four.
The device tree utilizes the common board design file for ALL-H3-CC, providing just the model strings and SoC specifics.
Signed-off-by: Chen-Yu Tsai wens@csie.org --- arch/arm/dts/Makefile | 1 + arch/arm/dts/sun8i-h2-plus-libretech-all-h3-cc.dts | 13 +++++++++++++ board/sunxi/MAINTAINERS | 3 ++- ...config => libretech_all_h3_cc_h2_plus_defconfig} | 2 +- 4 files changed, 17 insertions(+), 2 deletions(-) create mode 100644 arch/arm/dts/sun8i-h2-plus-libretech-all-h3-cc.dts copy configs/{orangepi_one_defconfig => libretech_all_h3_cc_h2_plus_defconfig} (85%)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index ac7667b1e805..21e7bc1472aa 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -351,6 +351,7 @@ dtb-$(CONFIG_MACH_SUN8I_A83T) += \ sun8i-a83t-cubietruck-plus.dtb \ sun8i-a83t-tbs-a711.dts dtb-$(CONFIG_MACH_SUN8I_H3) += \ + sun8i-h2-plus-libretech-all-h3-cc.dtb \ sun8i-h2-plus-orangepi-zero.dtb \ sun8i-h3-bananapi-m2-plus.dtb \ sun8i-h3-libretech-all-h3-cc.dtb \ diff --git a/arch/arm/dts/sun8i-h2-plus-libretech-all-h3-cc.dts b/arch/arm/dts/sun8i-h2-plus-libretech-all-h3-cc.dts new file mode 100644 index 000000000000..2e7e13ab7eec --- /dev/null +++ b/arch/arm/dts/sun8i-h2-plus-libretech-all-h3-cc.dts @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2018 Chen-Yu Tsai wens@csie.org + */ + +/dts-v1/; +#include "sun8i-h3.dtsi" +#include "sunxi-hx-libretech-all-h3-cc.dtsi" + +/ { + model = "Libre Computer Board ALL-H3-CC H2+"; + compatible = "libretech,all-h3-cc-h2-plus", "allwinner,sun8i-h2-plus"; +}; diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 6dd48c026516..4c21a2fedfe8 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -266,9 +266,10 @@ M: Siarhei Siamashka siarhei.siamashka@gmail.com S: Maintained F: configs/MSI_Primo81_defconfig
-LIBRETECH ALL-H3-CC H3 BOARD +LIBRETECH ALL-H3-CC BOARDS M: Chen-Yu Tsai wens@csie.org S: Maintained +F: configs/libretech_all_h3_cc_h2_plus_defconfig F: configs/libretech_all_h3_cc_h3_defconfig
NANOPI-M1 BOARD diff --git a/configs/orangepi_one_defconfig b/configs/libretech_all_h3_cc_h2_plus_defconfig similarity index 85% copy from configs/orangepi_one_defconfig copy to configs/libretech_all_h3_cc_h2_plus_defconfig index 23f4973e5bab..0cbcd48aadb8 100644 --- a/configs/orangepi_one_defconfig +++ b/configs/libretech_all_h3_cc_h2_plus_defconfig @@ -5,7 +5,7 @@ CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-one" +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-libretech-all-h3-cc" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set
This patch adds a device tree file for the H5 version of the Libre Computer Board ALL-H3-CC. It is the same board first introduced in commit afe27544125e ("sunxi: Add support for Libre Computer Board ALL-H3-CC H3 ver."), with the H3 SoC replaced with the H5 SoC, and has 4Gb DDR3 chips instead of 2Gb ones.
The device tree utilizes the common board design file for ALL-H3-CC, providing just the model strings and SoC specifics.
Signed-off-by: Chen-Yu Tsai wens@csie.org --- arch/arm/dts/Makefile | 1 + ...tech-all-h3-cc.dts => sun50i-h5-libretech-all-h3-cc.dts} | 6 +++--- board/sunxi/MAINTAINERS | 1 + ...ngepi_one_defconfig => libretech_all_h3_cc_h5_defconfig} | 4 ++-- 4 files changed, 7 insertions(+), 5 deletions(-) copy arch/arm/dts/{sun8i-h2-plus-libretech-all-h3-cc.dts => sun50i-h5-libretech-all-h3-cc.dts} (53%) copy configs/{orangepi_one_defconfig => libretech_all_h3_cc_h5_defconfig} (80%)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 21e7bc1472aa..482ece6112f2 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -371,6 +371,7 @@ dtb-$(CONFIG_MACH_SUN8I_R40) += \ dtb-$(CONFIG_MACH_SUN8I_V3S) += \ sun8i-v3s-licheepi-zero.dtb dtb-$(CONFIG_MACH_SUN50I_H5) += \ + sun50i-h5-libretech-all-h3-cc.dtb \ sun50i-h5-nanopi-neo2.dtb \ sun50i-h5-nanopi-neo-plus2.dtb \ sun50i-h5-orangepi-pc2.dtb \ diff --git a/arch/arm/dts/sun8i-h2-plus-libretech-all-h3-cc.dts b/arch/arm/dts/sun50i-h5-libretech-all-h3-cc.dts similarity index 53% copy from arch/arm/dts/sun8i-h2-plus-libretech-all-h3-cc.dts copy to arch/arm/dts/sun50i-h5-libretech-all-h3-cc.dts index 2e7e13ab7eec..6c84d575e366 100644 --- a/arch/arm/dts/sun8i-h2-plus-libretech-all-h3-cc.dts +++ b/arch/arm/dts/sun50i-h5-libretech-all-h3-cc.dts @@ -4,10 +4,10 @@ */
/dts-v1/; -#include "sun8i-h3.dtsi" +#include "sun50i-h5.dtsi" #include "sunxi-hx-libretech-all-h3-cc.dtsi"
/ { - model = "Libre Computer Board ALL-H3-CC H2+"; - compatible = "libretech,all-h3-cc-h2-plus", "allwinner,sun8i-h2-plus"; + model = "Libre Computer Board ALL-H3-CC H5"; + compatible = "libretech,all-h3-cc-h5", "allwinner,sun50i-h5"; }; diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 4c21a2fedfe8..ba36a09f5027 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -271,6 +271,7 @@ M: Chen-Yu Tsai wens@csie.org S: Maintained F: configs/libretech_all_h3_cc_h2_plus_defconfig F: configs/libretech_all_h3_cc_h3_defconfig +F: configs/libretech_all_h3_cc_h5_defconfig
NANOPI-M1 BOARD M: Mylène Josserand mylene.josserand@free-electrons.com diff --git a/configs/orangepi_one_defconfig b/configs/libretech_all_h3_cc_h5_defconfig similarity index 80% copy from configs/orangepi_one_defconfig copy to configs/libretech_all_h3_cc_h5_defconfig index 23f4973e5bab..061bddc8fd5e 100644 --- a/configs/orangepi_one_defconfig +++ b/configs/libretech_all_h3_cc_h5_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_SPL=y -CONFIG_MACH_SUN8I_H3=y +CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-one" +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-libretech-all-h3-cc" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set
On Tue, Apr 24, 2018 at 08:07:12PM +0800, Chen-Yu Tsai wrote:
This patch adds a device tree file for the H5 version of the Libre Computer Board ALL-H3-CC. It is the same board first introduced in commit afe27544125e ("sunxi: Add support for Libre Computer Board ALL-H3-CC H3 ver."), with the H3 SoC replaced with the H5 SoC, and has 4Gb DDR3 chips instead of 2Gb ones.
The device tree utilizes the common board design file for ALL-H3-CC, providing just the model strings and SoC specifics.
Signed-off-by: Chen-Yu Tsai wens@csie.org
Apart from the ongoing discussion on the DTSI name, for the whole serie Acked-by: Maxime Ripard maxime.ripard@bootlin.com
Maxime
The dts Makefile entries for the H3 are not ordered correctly. Move the Nano Pi entries before the Orange Pi so they are.
Signed-off-by: Chen-Yu Tsai wens@csie.org --- arch/arm/dts/Makefile | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 482ece6112f2..1d58e777b0a0 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -355,6 +355,10 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \ sun8i-h2-plus-orangepi-zero.dtb \ sun8i-h3-bananapi-m2-plus.dtb \ sun8i-h3-libretech-all-h3-cc.dtb \ + sun8i-h3-nanopi-m1.dtb \ + sun8i-h3-nanopi-m1-plus.dtb \ + sun8i-h3-nanopi-neo.dtb \ + sun8i-h3-nanopi-neo-air.dtb sun8i-h3-orangepi-2.dtb \ sun8i-h3-orangepi-lite.dtb \ sun8i-h3-orangepi-one.dtb \ @@ -362,10 +366,6 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \ sun8i-h3-orangepi-pc-plus.dtb \ sun8i-h3-orangepi-plus.dtb \ sun8i-h3-orangepi-plus2e.dtb \ - sun8i-h3-nanopi-m1.dtb \ - sun8i-h3-nanopi-m1-plus.dtb \ - sun8i-h3-nanopi-neo.dtb \ - sun8i-h3-nanopi-neo-air.dtb dtb-$(CONFIG_MACH_SUN8I_R40) += \ sun8i-r40-bananapi-m2-ultra.dtb dtb-$(CONFIG_MACH_SUN8I_V3S) += \
On Tue, Apr 24, 2018 at 08:07:13PM +0800, Chen-Yu Tsai wrote:
The dts Makefile entries for the H3 are not ordered correctly. Move the Nano Pi entries before the Orange Pi so they are.
Signed-off-by: Chen-Yu Tsai wens@csie.org
Acked-by: Maxime Ripard maxime.ripard@bootlin.com
Maxime
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