[U-Boot] [PATCH] armv8: ls1088aqds: support DSPI mode by hwconfig

BRDCFG4[USBOSC] and BRDCFG5[SPR] register field of Qixis device is used to control SPI and other IP signal routing.
USBOSC: 0= SPI_CLK used as external USB REFCLK input driven with 24.000 MHz. SPI devices are unusable in this mode. 1= SPI_CLK used as SPI clock. SPI devices are usable in this mode. USB block is clocked from internal sources
SPR[3:2]: SPI_CS / SDHC_DAT4:7 Routing (schematic net CFG_SPI_ROUTE[3:2]): 00= SDHC/eMMC 8-bit 01= SD Card Rev 2.0/3.0 10= SPI on-board memory 11= TDM Riser / SPI off-board connector. The default value is 00 if an SDCard/eMMC card is selected as the boot device.
SPR[1:0]: SPI_SIN/SOUT/SCK Routing (schematic net CFG_SPI_ROUTE[1:0]): 00= SDHC Sync loop 01= TDM Riser / SPI off-board connector. 10= SPI on-board memory. 11= SPI off-board connector.
By default, the SPI feature is not available, so we need to configure the above register fields to select the route to the SPI feature.
Signed-off-by: Chuanhua Han chuanhua.han@nxp.com --- board/freescale/ls1088a/ls1088a.c | 26 ++++++++++++++++++++++++++ board/freescale/ls1088a/ls1088a_qixis.h | 11 +++++++++++ include/configs/ls1088aqds.h | 2 ++ 3 files changed, 39 insertions(+)
diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c index a7af77d..12cc363 100644 --- a/board/freescale/ls1088a/ls1088a.c +++ b/board/freescale/ls1088a/ls1088a.c @@ -590,6 +590,32 @@ int misc_init_r(void) QIXIS_WRITE(brdcfg[5], brdcfg5); } #endif + +#ifdef CONFIG_TARGET_LS1088AQDS + u8 brdcfg4, brdcfg5; + + if (hwconfig("dspi-on-board")) { + brdcfg4 = QIXIS_READ(brdcfg[4]); + brdcfg4 &= ~BRDCFG4_USBOSC_MASK; + brdcfg4 |= BRDCFG4_SPI; + QIXIS_WRITE(brdcfg[4], brdcfg4); + + brdcfg5 = QIXIS_READ(brdcfg[5]); + brdcfg5 &= ~BRDCFG5_SPR_MASK; + brdcfg5 |= BRDCFG5_SPI_ON_BOARD; + QIXIS_WRITE(brdcfg[5], brdcfg5); + } else if (hwconfig("dspi-off-board")) { + brdcfg4 = QIXIS_READ(brdcfg[4]); + brdcfg4 &= ~BRDCFG4_USBOSC_MASK; + brdcfg4 |= BRDCFG4_SPI; + QIXIS_WRITE(brdcfg[4], brdcfg4); + + brdcfg5 = QIXIS_READ(brdcfg[5]); + brdcfg5 &= ~BRDCFG5_SPR_MASK; + brdcfg5 |= BRDCFG5_SPI_OFF_BOARD; + QIXIS_WRITE(brdcfg[5], brdcfg5); + } +#endif return 0; } #endif diff --git a/board/freescale/ls1088a/ls1088a_qixis.h b/board/freescale/ls1088a/ls1088a_qixis.h index c588526..e3502eb 100644 --- a/board/freescale/ls1088a/ls1088a_qixis.h +++ b/board/freescale/ls1088a/ls1088a_qixis.h @@ -41,4 +41,15 @@ #define BRDCFG5_SPISDHC_MASK 0x0C #define BRDCFG5_FORCE_SD 0x08
+/* Definitions of QIXIS Registers for LS1088AQDS */ + +/* BRDCFG4 */ +#define BRDCFG4_USBOSC_MASK 0x01 +#define BRDCFG4_SPI 0x01 + +/* BRDCFG5 */ +#define BRDCFG5_SPR_MASK 0x0f +#define BRDCFG5_SPI_ON_BOARD 0x0a +#define BRDCFG5_SPI_OFF_BOARD 0x0f + #endif diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index 8b62bbe..85e2061 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -17,6 +17,8 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_TFABOOT #define CONFIG_SYS_MMC_ENV_DEV 0
+#define CONFIG_MISC_INIT_R + #define CONFIG_ENV_SIZE 0x20000 #define CONFIG_ENV_OFFSET 0x500000 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \

-----Original Message----- From: Chuanhua Han chuanhua.han@nxp.com Sent: Thursday, August 1, 2019 2:07 PM To: Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; Ashish Kumar ashish.kumar@nxp.com; Rajesh Bhagat rajesh.bhagat@nxp.com Cc: u-boot@lists.denx.de; Chuanhua Han chuanhua.han@nxp.com Subject: [PATCH] armv8: ls1088aqds: support DSPI mode by hwconfig
BRDCFG4[USBOSC] and BRDCFG5[SPR] register field of Qixis device is used to control SPI and other IP signal routing.
USBOSC: 0= SPI_CLK used as external USB REFCLK input driven with 24.000 MHz. SPI devices are unusable in this mode. 1= SPI_CLK used as SPI clock. SPI devices are usable in this mode. USB block is clocked from internal sources
SPR[3:2]: SPI_CS / SDHC_DAT4:7 Routing (schematic net CFG_SPI_ROUTE[3:2]): 00= SDHC/eMMC 8-bit 01= SD Card Rev 2.0/3.0 10= SPI on-board memory 11= TDM Riser / SPI off-board connector. The default value is 00 if an SDCard/eMMC card is selected as the boot device.
SPR[1:0]: SPI_SIN/SOUT/SCK Routing (schematic net CFG_SPI_ROUTE[1:0]): 00= SDHC Sync loop 01= TDM Riser / SPI off-board connector. 10= SPI on-board memory. 11= SPI off-board connector.
By default, the SPI feature is not available, so we need to configure the above register fields to select the route to the SPI feature.
Signed-off-by: Chuanhua Han chuanhua.han@nxp.com
This patch has been applied to fsl-qoriq master, awaiting upstream.
--pk
participants (2)
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Chuanhua Han
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Prabhakar Kushwaha