[U-Boot] [PATCH] tegra: pinmux: fix FUNCMUX_NDFLASH_KBC_8_BIT

Even the 8bit case needs KBCB configured, as pin D7 is located in this pingroup. Also pingroup ATC seems to come out of reset with config set to NAND, so we need to explictly configure some other function to this group in order to avoid clashing settings.
Signed-off-by: Lucas Stach dev@lynxeye.de --- arch/arm/cpu/tegra20-common/funcmux.c | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/arch/arm/cpu/tegra20-common/funcmux.c b/arch/arm/cpu/tegra20-common/funcmux.c index a1c55a6..30fdf1c 100644 --- a/arch/arm/cpu/tegra20-common/funcmux.c +++ b/arch/arm/cpu/tegra20-common/funcmux.c @@ -266,17 +266,25 @@ int funcmux_select(enum periph_id id, int config) break; case FUNCMUX_NDFLASH_KBC_8_BIT: pinmux_set_func(PINGRP_KBCA, PMUX_FUNC_NAND); + pinmux_set_func(PINGRP_KBCB, PMUX_FUNC_NAND); pinmux_set_func(PINGRP_KBCC, PMUX_FUNC_NAND); pinmux_set_func(PINGRP_KBCD, PMUX_FUNC_NAND); pinmux_set_func(PINGRP_KBCE, PMUX_FUNC_NAND); pinmux_set_func(PINGRP_KBCF, PMUX_FUNC_NAND);
pinmux_tristate_disable(PINGRP_KBCA); + pinmux_tristate_disable(PINGRP_KBCB); pinmux_tristate_disable(PINGRP_KBCC); pinmux_tristate_disable(PINGRP_KBCD); pinmux_tristate_disable(PINGRP_KBCE); pinmux_tristate_disable(PINGRP_KBCF);
+ /* + * configure pingroup ATC to something unrelated to + * avoid ATC overriding KBC + */ + pinmux_set_func(PINGRP_ATC, PMUX_FUNC_GMI); + bad_config = 0; break; }

On 01/21/2013 05:20 PM, Lucas Stach wrote:
Even the 8bit case needs KBCB configured, as pin D7 is located in this pingroup. Also pingroup ATC seems to come out of reset with config set to NAND, so we need to explictly configure some other function to this group in order to avoid clashing settings.
diff --git a/arch/arm/cpu/tegra20-common/funcmux.c b/arch/arm/cpu/tegra20-common/funcmux.c
@@ -266,17 +266,25 @@ int funcmux_select(enum periph_id id, int config) break; case FUNCMUX_NDFLASH_KBC_8_BIT:
...
/*
* configure pingroup ATC to something unrelated to
* avoid ATC overriding KBC
*/
pinmux_set_func(PINGRP_ATC, PMUX_FUNC_GMI);
This gets a bit dangerous; what if pingroup ATC was already configured for some function other than NAND or GMI? This code will then break that setting. I would suggest one of the following alternatives:
1) Use the new pinmux_avoid_func() function implemented in the patch that I just sent.
2) Move Tegra20 over to the new board-wide pinmux style that Tegra30 uses, where the entire pinmux is initialized in one shot. This will completely avoid any kind of uninitialized pinmux settings, and to some extent is the only sensible thing to do on a device like Tegra which has the potential for conflicts like this patch tries to avoid.

Am Dienstag, den 22.01.2013, 09:24 -0700 schrieb Stephen Warren:
On 01/21/2013 05:20 PM, Lucas Stach wrote:
Even the 8bit case needs KBCB configured, as pin D7 is located in this pingroup. Also pingroup ATC seems to come out of reset with config set to NAND, so we need to explictly configure some other function to this group in order to avoid clashing settings.
diff --git a/arch/arm/cpu/tegra20-common/funcmux.c b/arch/arm/cpu/tegra20-common/funcmux.c
@@ -266,17 +266,25 @@ int funcmux_select(enum periph_id id, int config) break; case FUNCMUX_NDFLASH_KBC_8_BIT:
...
/*
* configure pingroup ATC to something unrelated to
* avoid ATC overriding KBC
*/
pinmux_set_func(PINGRP_ATC, PMUX_FUNC_GMI);
This gets a bit dangerous; what if pingroup ATC was already configured for some function other than NAND or GMI? This code will then break that setting. I would suggest one of the following alternatives:
- Use the new pinmux_avoid_func() function implemented in the patch
that I just sent.
- Move Tegra20 over to the new board-wide pinmux style that Tegra30
uses, where the entire pinmux is initialized in one shot. This will completely avoid any kind of uninitialized pinmux settings, and to some extent is the only sensible thing to do on a device like Tegra which has the potential for conflicts like this patch tries to avoid.
I'll take a look on how much work it is to implement option #2. If it isn't too much and I find some time in this U-Boot release cycle, I'm very much inclined to do this the ultimately right way.
Regards, Lucas

On Tue, Jan 22, 2013 at 02:27:30PM -0800, Lucas Stach wrote:
Am Dienstag, den 22.01.2013, 09:24 -0700 schrieb Stephen Warren:
On 01/21/2013 05:20 PM, Lucas Stach wrote:
Even the 8bit case needs KBCB configured, as pin D7 is located in this pingroup. Also pingroup ATC seems to come out of reset with config set to NAND, so we need to explictly configure some other function to this group in order to avoid clashing settings.
diff --git a/arch/arm/cpu/tegra20-common/funcmux.c b/arch/arm/cpu/tegra20-common/funcmux.c
@@ -266,17 +266,25 @@ int funcmux_select(enum periph_id id, int config) break; case FUNCMUX_NDFLASH_KBC_8_BIT:
...
/*
* configure pingroup ATC to something unrelated to
* avoid ATC overriding KBC
*/
pinmux_set_func(PINGRP_ATC, PMUX_FUNC_GMI);
This gets a bit dangerous; what if pingroup ATC was already configured for some function other than NAND or GMI? This code will then break that setting. I would suggest one of the following alternatives:
- Use the new pinmux_avoid_func() function implemented in the patch
that I just sent.
- Move Tegra20 over to the new board-wide pinmux style that Tegra30
uses, where the entire pinmux is initialized in one shot. This will completely avoid any kind of uninitialized pinmux settings, and to some extent is the only sensible thing to do on a device like Tegra which has the potential for conflicts like this patch tries to avoid.
I'll take a look on how much work it is to implement option #2. If it isn't too much and I find some time in this U-Boot release cycle, I'm very much inclined to do this the ultimately right way.
I think #2 really is the only way to do it. The reset state is full of conflicts and unless everything is initialized at once you end up chasing your tail where you fix conflict A, but that leads to new conflict B, and fixing that leads to C, etc.
-Allen
participants (3)
-
Allen Martin
-
Lucas Stach
-
Stephen Warren