Add information about which exact SoM variant is used on which PDK2 variant.

Signed-off-by: Marek Vasut marex@denx.de Cc: Fabio Estevam festevam@denx.de Cc: Peng Fan peng.fan@nxp.com Cc: Stefano Babic sbabic@denx.de Cc: uboot-imx uboot-imx@nxp.com --- arch/arm/dts/imx8mp-dhcom-pdk2.dts | 5 +++++ 1 file changed, 5 insertions(+)

diff --git a/arch/arm/dts/imx8mp-dhcom-pdk2.dts b/arch/arm/dts/imx8mp-dhcom-pdk2.dts index e95abfb3e89..7148234a4f1 100644 --- a/arch/arm/dts/imx8mp-dhcom-pdk2.dts +++ b/arch/arm/dts/imx8mp-dhcom-pdk2.dts @@ -1,6 +1,11 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (C) 2022 Marek Vasut marex@denx.de + * + * DHCOM iMX8MP variant: + * DHCM-iMX8ML8-C160-R409-F1638-SPI16-GE-CAN2-SD-RTC-WBTA-ADC-T-RGB-CSI2-HS-I-01D2 + * DHCOM PCB number: 660-100 or newer + * PDK2 PCB number: 516-400 or newer */

/dts-v1/;

This PHY is not used on PDK2, the header was added due to copy-paste error, drop it.

Signed-off-by: Marek Vasut marex@denx.de Cc: Fabio Estevam festevam@denx.de Cc: Peng Fan peng.fan@nxp.com Cc: Stefano Babic sbabic@denx.de Cc: uboot-imx uboot-imx@nxp.com --- arch/arm/dts/imx8mp-dhcom-pdk2.dts | 1 - 1 file changed, 1 deletion(-)

diff --git a/arch/arm/dts/imx8mp-dhcom-pdk2.dts b/arch/arm/dts/imx8mp-dhcom-pdk2.dts index 7148234a4f1..0fcead35879 100644 --- a/arch/arm/dts/imx8mp-dhcom-pdk2.dts +++ b/arch/arm/dts/imx8mp-dhcom-pdk2.dts @@ -11,7 +11,6 @@ /dts-v1/;

#include <dt-bindings/leds/common.h> -#include <dt-bindings/net/qca-ar803x.h> #include <dt-bindings/phy/phy-imx8-pcie.h> #include "imx8mp-dhcom-som.dtsi"

Add SoM compatible string into i.MX8MP DHCOM PDK2 compatible strings.

Signed-off-by: Marek Vasut marex@denx.de Cc: Fabio Estevam festevam@denx.de Cc: Peng Fan peng.fan@nxp.com Cc: Stefano Babic sbabic@denx.de Cc: uboot-imx uboot-imx@nxp.com --- arch/arm/dts/imx8mp-dhcom-pdk2.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/imx8mp-dhcom-pdk2.dts b/arch/arm/dts/imx8mp-dhcom-pdk2.dts index 0fcead35879..c9a481ac9a8 100644 --- a/arch/arm/dts/imx8mp-dhcom-pdk2.dts +++ b/arch/arm/dts/imx8mp-dhcom-pdk2.dts @@ -16,7 +16,8 @@

/ { model = "DH electronics i.MX8M Plus DHCOM Premium Developer Kit (2)"; - compatible = "dh,imx8mp-dhcom-pdk2", "fsl,imx8mp"; + compatible = "dh,imx8mp-dhcom-pdk2", "dh,imx8mp-dhcom-som", + "fsl,imx8mp";

chosen { stdout-path = &uart1;

Rename imx8mp-dhcom-pdk2-u-boot.dtsi to imx8mp-dhcom-u-boot.dtsi, since this file is shared by PDK2, PicoITX and DRC02. No functional change.

Signed-off-by: Marek Vasut marex@denx.de Cc: Fabio Estevam festevam@denx.de Cc: Peng Fan peng.fan@nxp.com Cc: Stefano Babic sbabic@denx.de Cc: uboot-imx uboot-imx@nxp.com --- arch/arm/dts/imx8mp-dhcom-pdk2-u-boot.dtsi | 137 +------------------- arch/arm/dts/imx8mp-dhcom-u-boot.dtsi | 141 +++++++++++++++++++++ 2 files changed, 142 insertions(+), 136 deletions(-) create mode 100644 arch/arm/dts/imx8mp-dhcom-u-boot.dtsi

diff --git a/arch/arm/dts/imx8mp-dhcom-pdk2-u-boot.dtsi b/arch/arm/dts/imx8mp-dhcom-pdk2-u-boot.dtsi index ae838caebcf..be2d4fb184a 100644 --- a/arch/arm/dts/imx8mp-dhcom-pdk2-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-dhcom-pdk2-u-boot.dtsi @@ -3,139 +3,4 @@ * Copyright (C) 2022 Marek Vasut marex@denx.de */

-#include "imx8mp-u-boot.dtsi" - -/ { - aliases { - eeprom0 = &eeprom0; - eeprom1 = &eeprom1; - mmc0 = &usdhc2; /* MicroSD */ - mmc1 = &usdhc3; /* eMMC */ - mmc2 = &usdhc1; /* SDIO */ - }; - - config { - dh,ram-coding-gpios = <&gpio3 22 0>, <&gpio3 23 0>, <&gpio3 24 0>; - }; - - wdt-reboot { - compatible = "wdt-reboot"; - wdt = <&wdog1>; - u-boot,dm-spl; - }; -}; - -&buck4 { - u-boot,dm-spl; -}; - -&buck5 { - u-boot,dm-spl; -}; - -&eqos { - /delete-property/ assigned-clocks; - /delete-property/ assigned-clock-parents; - /delete-property/ assigned-clock-rates; -}; - -&gpio1 { - u-boot,dm-spl; -}; - -&gpio2 { - u-boot,dm-spl; -}; - -&gpio3 { - u-boot,dm-spl; -}; - -&gpio4 { - u-boot,dm-spl; -}; - -&gpio5 { - u-boot,dm-spl; -}; - -&i2c3 { - u-boot,dm-spl; -}; - -&pinctrl_i2c3 { - u-boot,dm-spl; -}; - -&pinctrl_i2c3_gpio { - u-boot,dm-spl; -}; - -&pinctrl_pmic { - u-boot,dm-spl; -}; - -&pinctrl_uart1 { - u-boot,dm-spl; -}; - -&pinctrl_usdhc2 { - u-boot,dm-spl; -}; - -&pinctrl_usdhc2_100mhz { - u-boot,dm-spl; -}; - -&pinctrl_usdhc2_200mhz { - u-boot,dm-spl; -}; - -&pinctrl_usdhc2_vmmc { - u-boot,dm-spl; -}; - -&pinctrl_usdhc3 { - u-boot,dm-spl; -}; - -&pinctrl_usdhc3_100mhz { - u-boot,dm-spl; -}; - -&pinctrl_usdhc3_100mhz { - u-boot,dm-spl; -}; - -&pmic { - u-boot,dm-spl; - - regulators { - u-boot,dm-spl; - }; -}; - -&reg_usdhc2_vmmc { - u-boot,dm-spl; -}; - -&uart1 { - u-boot,dm-spl; -}; - -/* SDIO WiFi */ -&usdhc1 { - status = "disabled"; -}; - -&usdhc2 { - u-boot,dm-spl; -}; - -&usdhc3 { - u-boot,dm-spl; -}; - -&wdog1 { - u-boot,dm-spl; -}; +#include "imx8mp-dhcom-u-boot.dtsi" diff --git a/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi b/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi new file mode 100644 index 00000000000..ae838caebcf --- /dev/null +++ b/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi @@ -0,0 +1,141 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2022 Marek Vasut marex@denx.de + */ + +#include "imx8mp-u-boot.dtsi" + +/ { + aliases { + eeprom0 = &eeprom0; + eeprom1 = &eeprom1; + mmc0 = &usdhc2; /* MicroSD */ + mmc1 = &usdhc3; /* eMMC */ + mmc2 = &usdhc1; /* SDIO */ + }; + + config { + dh,ram-coding-gpios = <&gpio3 22 0>, <&gpio3 23 0>, <&gpio3 24 0>; + }; + + wdt-reboot { + compatible = "wdt-reboot"; + wdt = <&wdog1>; + u-boot,dm-spl; + }; +}; + +&buck4 { + u-boot,dm-spl; +}; + +&buck5 { + u-boot,dm-spl; +}; + +&eqos { + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-parents; + /delete-property/ assigned-clock-rates; +}; + +&gpio1 { + u-boot,dm-spl; +}; + +&gpio2 { + u-boot,dm-spl; +}; + +&gpio3 { + u-boot,dm-spl; +}; + +&gpio4 { + u-boot,dm-spl; +}; + +&gpio5 { + u-boot,dm-spl; +}; + +&i2c3 { + u-boot,dm-spl; +}; + +&pinctrl_i2c3 { + u-boot,dm-spl; +}; + +&pinctrl_i2c3_gpio { + u-boot,dm-spl; +}; + +&pinctrl_pmic { + u-boot,dm-spl; +}; + +&pinctrl_uart1 { + u-boot,dm-spl; +}; + +&pinctrl_usdhc2 { + u-boot,dm-spl; +}; + +&pinctrl_usdhc2_100mhz { + u-boot,dm-spl; +}; + +&pinctrl_usdhc2_200mhz { + u-boot,dm-spl; +}; + +&pinctrl_usdhc2_vmmc { + u-boot,dm-spl; +}; + +&pinctrl_usdhc3 { + u-boot,dm-spl; +}; + +&pinctrl_usdhc3_100mhz { + u-boot,dm-spl; +}; + +&pinctrl_usdhc3_100mhz { + u-boot,dm-spl; +}; + +&pmic { + u-boot,dm-spl; + + regulators { + u-boot,dm-spl; + }; +}; + +&reg_usdhc2_vmmc { + u-boot,dm-spl; +}; + +&uart1 { + u-boot,dm-spl; +}; + +/* SDIO WiFi */ +&usdhc1 { + status = "disabled"; +}; + +&usdhc2 { + u-boot,dm-spl; +}; + +&usdhc3 { + u-boot,dm-spl; +}; + +&wdog1 { + u-boot,dm-spl; +};

The ECSPI1 is on I2C1/I2C2 pins of the SoC, update the pinmux accordingly.

Signed-off-by: Marek Vasut marex@denx.de Cc: Fabio Estevam festevam@denx.de Cc: Peng Fan peng.fan@nxp.com Cc: Stefano Babic sbabic@denx.de Cc: uboot-imx uboot-imx@nxp.com --- arch/arm/dts/imx8mp-dhcom-som.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm/dts/imx8mp-dhcom-som.dtsi b/arch/arm/dts/imx8mp-dhcom-som.dtsi index 63cc6c92c41..0960c238871 100644 --- a/arch/arm/dts/imx8mp-dhcom-som.dtsi +++ b/arch/arm/dts/imx8mp-dhcom-som.dtsi @@ -70,7 +70,7 @@ &ecspi1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi1>; - cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; + cs-gpios = <&gpio5 17 GPIO_ACTIVE_LOW>; status = "disabled"; };

@@ -660,10 +660,10 @@

pinctrl_ecspi1: dhcom-ecspi1-grp { fsl,pins = < - MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK 0x44 - MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI 0x44 - MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO 0x44 - MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09 0x40 + MX8MP_IOMUXC_I2C1_SCL__ECSPI1_SCLK 0x44 + MX8MP_IOMUXC_I2C1_SDA__ECSPI1_MOSI 0x44 + MX8MP_IOMUXC_I2C2_SCL__ECSPI1_MISO 0x44 + MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17 0x40 >; };

Fix copy-paste error of the I2C5 bus recovery GPIO assignment, the I2C5 GPIOs are on gpio3 instead of gpio5.

Signed-off-by: Marek Vasut marex@denx.de Cc: Fabio Estevam festevam@denx.de Cc: Peng Fan peng.fan@nxp.com Cc: Stefano Babic sbabic@denx.de Cc: uboot-imx uboot-imx@nxp.com --- arch/arm/dts/imx8mp-dhcom-som.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/imx8mp-dhcom-som.dtsi b/arch/arm/dts/imx8mp-dhcom-som.dtsi index 0960c238871..197840d1a6a 100644 --- a/arch/arm/dts/imx8mp-dhcom-som.dtsi +++ b/arch/arm/dts/imx8mp-dhcom-som.dtsi @@ -415,8 +415,8 @@ pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c5>; pinctrl-1 = <&pinctrl_i2c5_gpio>; - scl-gpios = <&gpio5 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio5 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpio3 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio3 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status = "okay"; };