[PATCH V2 1/2] arm: mach-imx: move snvs module
Commit 723f8359c1 ("imx: mx7: snvs: Add an SNVS init routine") noted that the init_snvs() call likely applies to other i.MX processors, and this has been found to be true for i.MX8MP.
Move snvs module for future re-use.
Signed-off-by: Ian Ray ian.ray@gehealthcare.com --- arch/arm/mach-imx/Makefile | 2 ++ arch/arm/mach-imx/mx7/Makefile | 2 +- arch/arm/mach-imx/{mx7 => }/snvs.c | 0 arch/arm/mach-imx/snvs.h | 6 ++++++ 4 files changed, 9 insertions(+), 1 deletion(-) rename arch/arm/mach-imx/{mx7 => }/snvs.c (100%) create mode 100644 arch/arm/mach-imx/snvs.h
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 21d955b4ae..0de207c068 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -293,3 +293,5 @@ obj-$(CONFIG_ARCH_IMXRT) += imxrt/
obj-$(CONFIG_SPL_BOOTROM_SUPPORT) += spl_imx_romapi.o obj-$(CONFIG_IMX8_ROMAPI) += romapi.o + +obj-$(CONFIG_MX7) += snvs.o diff --git a/arch/arm/mach-imx/mx7/Makefile b/arch/arm/mach-imx/mx7/Makefile index f1436e2d0d..fec228a616 100644 --- a/arch/arm/mach-imx/mx7/Makefile +++ b/arch/arm/mach-imx/mx7/Makefile @@ -3,5 +3,5 @@ # (C) Copyright 2015 Freescale Semiconductor, Inc. #
-obj-y := soc.o clock.o clock_slice.o ddr.o snvs.o +obj-y := soc.o clock.o clock_slice.o ddr.o obj-$(CONFIG_ARMV7_PSCI) += psci-mx7.o psci-suspend.o diff --git a/arch/arm/mach-imx/mx7/snvs.c b/arch/arm/mach-imx/snvs.c similarity index 100% rename from arch/arm/mach-imx/mx7/snvs.c rename to arch/arm/mach-imx/snvs.c diff --git a/arch/arm/mach-imx/snvs.h b/arch/arm/mach-imx/snvs.h new file mode 100644 index 0000000000..4ce9781ca6 --- /dev/null +++ b/arch/arm/mach-imx/snvs.h @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018 Linaro + */ + +void init_snvs(void);
Working with HAB on the i.MX8MP we've encountered a case where a board that successfully authenticates u-boot when booting Linux subsequently fails to properly bring up the RTC.
The RTC registers live in the low-power block of the Secure Non-Volatile Storage (SNVS) block.
The root cause of the error has been traced to the HAB handing off the SNVS-RTC in a state where HPCOMR::NPSWA_EN = 0 in other words where the Non-Privileged Software Access Enable bit is zero.
Configure SNVS to allow unpriv access to SNVS LP for imx8m and imx8mp.
This commit generalizes 723f8359c1 ("imx: mx7: snvs: Add an SNVS init routine") to also be used on i.MX8M SoCs, and was testeed on i.MX8MP.
Signed-off-by: Ian Ray ian.ray@gehealthcare.com --- arch/arm/mach-imx/Makefile | 2 +- arch/arm/mach-imx/imx8m/soc.c | 4 ++++ 2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 0de207c068..011cca5d97 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -294,4 +294,4 @@ obj-$(CONFIG_ARCH_IMXRT) += imxrt/ obj-$(CONFIG_SPL_BOOTROM_SUPPORT) += spl_imx_romapi.o obj-$(CONFIG_IMX8_ROMAPI) += romapi.o
-obj-$(CONFIG_MX7) += snvs.o +obj-$(CONFIG_MX7)$(CONFIG_IMX8M) += snvs.o diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index a72329ea91..459503b0d6 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -34,6 +34,8 @@ #include <linux/bitfield.h> #include <linux/sizes.h>
+#include "../snvs.h" + DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_IMX_HAB) @@ -571,6 +573,8 @@ static void imx8m_setup_snvs(void) writel(SNVS_LPPGDR_INIT, SNVS_BASE_ADDR + SNVS_LPLVDR); /* Clear interrupt status */ writel(0xffffffff, SNVS_BASE_ADDR + SNVS_LPSR); + + init_snvs(); }
static void imx8m_setup_csu_tzasc(void)
On Fri, Nov 8, 2024 at 11:04 AM Ian Ray ian.ray@gehealthcare.com wrote:
Commit 723f8359c1 ("imx: mx7: snvs: Add an SNVS init routine") noted that the init_snvs() call likely applies to other i.MX processors, and this has been found to be true for i.MX8MP.
Move snvs module for future re-use.
Signed-off-by: Ian Ray ian.ray@gehealthcare.com
Applied both, thanks.
participants (2)
-
Fabio Estevam -
Ian Ray