[U-Boot] [PATCH 1/3] ARM: imx6q_logic: Enable 256KB OCRAM
Since this board config only supports, the i.MX6D/i.MX6Q configurations, 256K of on-chip RAM is available which increases the space available to SPL to help further reduce board code and further enable device tree functions.
This patch enables 256K of RAM.
Signed-off-by: Adam Ford aford173@gmail.com
diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index 6125ee2bc2..a9e8cbea94 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_MX6_OCRAM_256KB=y CONFIG_TARGET_MX6LOGICPD=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y
With the 256KB of OCRAM available to SPL now, there should be enough room to enable the pinmuxing in SPL from the device tree.
This patch enables SPL_PINCTRL et al and adds the serial and usdhc pin mux references to the -u-boot.dtsi file so the pins can be configured from the device tree.
Signed-off-by: Adam Ford aford173@gmail.com
diff --git a/arch/arm/dts/imx6q-logicpd-u-boot.dtsi b/arch/arm/dts/imx6q-logicpd-u-boot.dtsi index 625bed8f7d..ee44ed91fe 100644 --- a/arch/arm/dts/imx6q-logicpd-u-boot.dtsi +++ b/arch/arm/dts/imx6q-logicpd-u-boot.dtsi @@ -16,3 +16,15 @@ &usdhc2 { u-boot,dm-spl; }; + +&pinctrl_uart1 { + u-boot,dm-spl; +}; + +&pinctrl_usdhc1 { + u-boot,dm-spl; +}; + +&pinctrl_usdhc2 { + u-boot,dm-spl; +}; diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index a9e8cbea94..c120cb2f54 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -78,6 +78,7 @@ CONFIG_PHY_ATHEROS=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_PMIC_PFUZE100=y CONFIG_DM_REGULATOR=y
On Wed, Oct 9, 2019 at 2:54 PM Adam Ford aford173@gmail.com wrote:
With the 256KB of OCRAM available to SPL now, there should be enough room to enable the pinmuxing in SPL from the device tree.
This patch enables SPL_PINCTRL et al and adds the serial and usdhc pin mux references to the -u-boot.dtsi file so the pins can be configured from the device tree.
Signed-off-by: Adam Ford aford173@gmail.com
Reviewed-by: Fabio Estevam festevam@gmail.com
Subject: [PATCH 2/3] ARM: imx6q_logic: Enable Pin muxing in SPL
With the 256KB of OCRAM available to SPL now, there should be enough room to enable the pinmuxing in SPL from the device tree.
This patch enables SPL_PINCTRL et al and adds the serial and usdhc pin mux references to the -u-boot.dtsi file so the pins can be configured from the device tree.
Signed-off-by: Adam Ford aford173@gmail.com
diff --git a/arch/arm/dts/imx6q-logicpd-u-boot.dtsi b/arch/arm/dts/imx6q-logicpd-u-boot.dtsi index 625bed8f7d..ee44ed91fe 100644 --- a/arch/arm/dts/imx6q-logicpd-u-boot.dtsi +++ b/arch/arm/dts/imx6q-logicpd-u-boot.dtsi @@ -16,3 +16,15 @@ &usdhc2 { u-boot,dm-spl; };
+&pinctrl_uart1 {
- u-boot,dm-spl;
+};
+&pinctrl_usdhc1 {
- u-boot,dm-spl;
+};
+&pinctrl_usdhc2 {
- u-boot,dm-spl;
+}; diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index a9e8cbea94..c120cb2f54 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -78,6 +78,7 @@ CONFIG_PHY_ATHEROS=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_PMIC_PFUZE100=y CONFIG_DM_REGULATOR=y
Reviewed-by: Peng Fan peng.fan@nxp.com
-- 2.17.1
With the 256KB of OCRAM available to SPL now, there should be enough room to enable the pinmuxing in SPL from the device tree. This patch enables SPL_PINCTRL et al and adds the serial and usdhc pin mux references to the -u-boot.dtsi file so the pins can be configured from the device tree. Signed-off-by: Adam Ford aford173@gmail.com Reviewed-by: Fabio Estevam festevam@gmail.com Reviewed-by: Peng Fan peng.fan@nxp.com diff --git a/arch/arm/dts/imx6q-logicpd-u-boot.dtsi b/arch/arm/dts/imx6q-logicpd-u-boot.dtsi index 625bed8f7d..ee44ed91fe 100644 --- a/arch/arm/dts/imx6q-logicpd-u-boot.dtsi +++ b/arch/arm/dts/imx6q-logicpd-u-boot.dtsi @@ -16,3 +16,15 @@ &usdhc2 { u-boot,dm-spl; };
+&pinctrl_uart1 {
- u-boot,dm-spl;
+};
+&pinctrl_usdhc1 {
- u-boot,dm-spl;
+};
+&pinctrl_usdhc2 {
- u-boot,dm-spl;
+}; diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index a9e8cbea94..c120cb2f54 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -78,6 +78,7 @@ CONFIG_PHY_ATHEROS=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_PMIC_PFUZE100=y CONFIG_DM_REGULATOR=y
Applied to u-boot-imx, master, thanks !
Best regards, Stefano Babic
With the OCRAM expanded to 256KB and the SPL_PINCTRL enabled with -u-boot.dtsi entries to include the pinmuxing in SPL, the manual code setting up the pinmux can go away.
This patch removes the legacy pinmuxing code from the board file.
Signed-off-by: Adam Ford aford173@gmail.com
diff --git a/board/logicpd/imx6/imx6logic.c b/board/logicpd/imx6/imx6logic.c index 4bacd8660a..3c1a3a9fa2 100644 --- a/board/logicpd/imx6/imx6logic.c +++ b/board/logicpd/imx6/imx6logic.c @@ -42,32 +42,6 @@ int dram_init(void) return 0; }
-static iomux_v3_cfg_t const uart1_pads[] = { - MX6_PAD_SD3_DAT7__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_SD3_DAT6__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - -static iomux_v3_cfg_t const uart2_pads[] = { - MX6_PAD_SD4_DAT4__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_SD4_DAT5__UART2_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_SD4_DAT6__UART2_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_SD4_DAT7__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - -static iomux_v3_cfg_t const uart3_pads[] = { - MX6_PAD_EIM_D23__UART3_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_EIM_D24__UART3_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_EIM_D25__UART3_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_EIM_EB3__UART3_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - -static void setup_iomux_uart(void) -{ - imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); - imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); - imx_iomux_v3_setup_multiple_pads(uart3_pads, ARRAY_SIZE(uart3_pads)); -} - static iomux_v3_cfg_t const nand_pads[] = { MX6_PAD_NANDF_CS0__NAND_CE0_B | MUX_PAD_CTRL(NAND_PAD_CTRL), MX6_PAD_NANDF_ALE__NAND_ALE | MUX_PAD_CTRL(NAND_PAD_CTRL), @@ -135,7 +109,6 @@ int overwrite_console(void)
int board_early_init_f(void) { - setup_iomux_uart(); setup_nand_pins(); return 0; } @@ -177,36 +150,6 @@ int spl_start_uboot(void) } #endif
-/* SD interface */ -#define USDHC_PAD_CTRL \ - (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ - PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -static iomux_v3_cfg_t const usdhc1_pads[] = { - MX6_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -}; - -static iomux_v3_cfg_t const usdhc2_pads[] = { - MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ -}; - -#ifdef CONFIG_FSL_ESDHC_IMX -struct fsl_esdhc_cfg usdhc_cfg[] = { - {USDHC1_BASE_ADDR}, /* SOM */ - {USDHC2_BASE_ADDR} /* Baseboard */ -}; - void board_boot_order(u32 *spl_boot_list) { struct src *psrc = (struct src *)SRC_BASE_ADDR; @@ -236,34 +179,6 @@ void board_boot_order(u32 *spl_boot_list) spl_boot_list[2] = BOOT_DEVICE_BOARD; }
-int board_mmc_init(bd_t *bis) -{ - struct src *psrc = (struct src *)SRC_BASE_ADDR; - unsigned int reg = readl(&psrc->sbmr1) >> 11; - /* - * Upon reading BOOT_CFG register the following map is done: - * Bit 11 and 12 of BOOT_CFG register can determine the current - * mmc port - * 0x1 SD1-SOM - * 0x2 SD2-Baseboard - */ - - reg &= 0x3; /* Only care about bottom 2 bits */ - - switch (reg) { - case 0: - SETUP_IOMUX_PADS(usdhc1_pads); - break; - case 1: - SETUP_IOMUX_PADS(usdhc2_pads); - break; - } - - return 0; -} - -#endif - static void ccgr_init(void) { struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
On Wed, Oct 9, 2019 at 2:54 PM Adam Ford aford173@gmail.com wrote:
With the OCRAM expanded to 256KB and the SPL_PINCTRL enabled with -u-boot.dtsi entries to include the pinmuxing in SPL, the manual code setting up the pinmux can go away.
This patch removes the legacy pinmuxing code from the board file.
Signed-off-by: Adam Ford aford173@gmail.com
Reviewed-by: Fabio Estevam festevam@gmail.com
With the OCRAM expanded to 256KB and the SPL_PINCTRL enabled with -u-boot.dtsi entries to include the pinmuxing in SPL, the manual code setting up the pinmux can go away. This patch removes the legacy pinmuxing code from the board file. Signed-off-by: Adam Ford aford173@gmail.com Reviewed-by: Fabio Estevam festevam@gmail.com diff --git a/board/logicpd/imx6/imx6logic.c b/board/logicpd/imx6/imx6logic.c index 4bacd8660a..3c1a3a9fa2 100644 --- a/board/logicpd/imx6/imx6logic.c +++ b/board/logicpd/imx6/imx6logic.c @@ -42,32 +42,6 @@ int dram_init(void) return 0; }
-static iomux_v3_cfg_t const uart1_pads[] = {
- MX6_PAD_SD3_DAT7__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_SD3_DAT6__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-static iomux_v3_cfg_t const uart2_pads[] = {
- MX6_PAD_SD4_DAT4__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_SD4_DAT5__UART2_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_SD4_DAT6__UART2_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_SD4_DAT7__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-static iomux_v3_cfg_t const uart3_pads[] = {
- MX6_PAD_EIM_D23__UART3_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_EIM_D24__UART3_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_EIM_D25__UART3_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_EIM_EB3__UART3_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-static void setup_iomux_uart(void) -{
- imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
- imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads));
- imx_iomux_v3_setup_multiple_pads(uart3_pads, ARRAY_SIZE(uart3_pads));
-}
static iomux_v3_cfg_t const nand_pads[] = { MX6_PAD_NANDF_CS0__NAND_CE0_B | MUX_PAD_CTRL(NAND_PAD_CTRL), MX6_PAD_NANDF_ALE__NAND_ALE | MUX_PAD_CTRL(NAND_PAD_CTRL), @@ -135,7 +109,6 @@ int overwrite_console(void)
int board_early_init_f(void) {
- setup_iomux_uart(); setup_nand_pins(); return 0;
} @@ -177,36 +150,6 @@ int spl_start_uboot(void) } #endif
-/* SD interface */ -#define USDHC_PAD_CTRL \
- (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
PAD_CTL_SRE_FAST | PAD_CTL_HYS)-static iomux_v3_cfg_t const usdhc1_pads[] = {
- MX6_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-};
-static iomux_v3_cfg_t const usdhc2_pads[] = {
- MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
-};
-#ifdef CONFIG_FSL_ESDHC_IMX -struct fsl_esdhc_cfg usdhc_cfg[] = {
- {USDHC1_BASE_ADDR}, /* SOM */
- {USDHC2_BASE_ADDR} /* Baseboard */
-};
void board_boot_order(u32 *spl_boot_list) { struct src *psrc = (struct src *)SRC_BASE_ADDR; @@ -236,34 +179,6 @@ void board_boot_order(u32 *spl_boot_list) spl_boot_list[2] = BOOT_DEVICE_BOARD; }
-int board_mmc_init(bd_t *bis) -{
- struct src *psrc = (struct src *)SRC_BASE_ADDR;
- unsigned int reg = readl(&psrc->sbmr1) >> 11;
- /*
* Upon reading BOOT_CFG register the following map is done:* Bit 11 and 12 of BOOT_CFG register can determine the current* mmc port* 0x1 SD1-SOM* 0x2 SD2-Baseboard*/- reg &= 0x3; /* Only care about bottom 2 bits */
- switch (reg) {
- case 0:
SETUP_IOMUX_PADS(usdhc1_pads);break;- case 1:
SETUP_IOMUX_PADS(usdhc2_pads);break;- }
- return 0;
-}
-#endif
static void ccgr_init(void) { struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
Applied to u-boot-imx, master, thanks !
Best regards, Stefano Babic
On Wed, Oct 9, 2019 at 2:54 PM Adam Ford aford173@gmail.com wrote:
Since this board config only supports, the i.MX6D/i.MX6Q configurations, 256K of on-chip RAM is available which increases the space available to SPL to help further reduce board code and further enable device tree functions.
This patch enables 256K of RAM.
Signed-off-by: Adam Ford aford173@gmail.com
Reviewed-by: Fabio Estevam festevam@gmail.com
Since this board config only supports, the i.MX6D/i.MX6Q configurations, 256K of on-chip RAM is available which increases the space available to SPL to help further reduce board code and further enable device tree functions. This patch enables 256K of RAM. Signed-off-by: Adam Ford aford173@gmail.com Reviewed-by: Fabio Estevam festevam@gmail.com diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index 6125ee2bc2..a9e8cbea94 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_MX6_OCRAM_256KB=y CONFIG_TARGET_MX6LOGICPD=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y
Applied to u-boot-imx, master, thanks !
Best regards, Stefano Babic
participants (4)
-
Adam Ford -
Fabio Estevam -
Peng Fan -
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