Hi to all,
I'm currently porting the u-boot on the FADS860T board and I have started the activity only few days ago.
I have used the FADS860t.h that comes with u-boot-0.3.0 by changing only the clock related defines. I have a problem during the early initialization of the console; when the board starts from power up the first part of the message is corrupted as follow:
áÙÁááiA¹¹Á¹Í¹Á.ÑÑå¹áÁÁ5!éé 4 kB I-Cache 4 kB D-Cache FEC present *** Warning: CPU Core has Silicon Bugs -- Check the Errata *** Board: FADS with db MPC821, MPC860 / MPC860SAR / MPC860T rev ENG or PILOT ... ...
while if I reset the board without switch it off, the message is correct.
CPU: XPC860xxZPnnB at 49.800 MHz: 4 kB I-Cache 4 kB D-Cache FEC present *** Warning: CPU Core has Silicon Bugs -- Check the Errata *** Board: FADS with db MPC821, MPC860 / MPC860SAR / MPC860T rev ENG or PILOT ... ...
Does anybody have any idea if or where I missed some stuff ?
Any help would be appreciated
Gianfranco
Dear Gianfranco,
in message 004601c352d3$904628c0$0700a8c0@eurostudio.local you wrote:
I'm currently porting the u-boot on the FADS860T board and I have started the activity only few days ago.
What do you mean with "porting"? The port to the FADS860T board has been performed many moths ago and is considered to be complete.
I have used the FADS860t.h that comes with u-boot-0.3.0 by changing only
And why are you using an old code base for any new work?
5!éé 4 kB I-Cache 4 kB D-Cache FEC present *** Warning: CPU Core has Silicon Bugs -- Check the Errata *** Board: FADS with db MPC821, MPC860 / MPC860SAR / MPC860T rev ENG or PILOT
Arghhh... is this really a rev. ENG or PILOT board?
Does anybody have any idea if or where I missed some stuff ?
Probably your hardware is broken? I would not waste any minute of work on a ENG or PILOT board.
Best regards,
Wolfgang Denk
participants (2)
-
Ing.Gianfranco Morandi -
Wolfgang Denk