[U-Boot] [PATCH 5/5] msm7x30: Add support for msm7630_surf board

From: Mohamed Haneef mohamed.haneef@lntinfotech.com
*Support for msm7630_surf board
Signed-off-by: Mohamed Haneef mohamed.haneef@lntinfotech.com --- board/qcom/msm7630_surf/Makefile | 55 +++++++++++ board/qcom/msm7630_surf/msm7630_surf.c | 155 ++++++++++++++++++++++++++++++++ board/qcom/msm7630_surf/msm7630_surf.h | 30 ++++++ boards.cfg | 1 + include/configs/msm7630_surf.h | 131 +++++++++++++++++++++++++++ 5 files changed, 372 insertions(+), 0 deletions(-) create mode 100644 board/qcom/msm7630_surf/Makefile create mode 100644 board/qcom/msm7630_surf/msm7630_surf.c create mode 100644 board/qcom/msm7630_surf/msm7630_surf.h create mode 100644 include/configs/msm7630_surf.h
diff --git a/board/qcom/msm7630_surf/Makefile b/board/qcom/msm7630_surf/Makefile new file mode 100644 index 0000000..f9dec32 --- /dev/null +++ b/board/qcom/msm7630_surf/Makefile @@ -0,0 +1,55 @@ +# +# (C) Copyright 2012 +# LARSEN & TOUBRO INFOTECH LTD <www.lntinfotech.com> +# +# (C) Copyright 2010,2011 +# NVIDIA Corporation <www.nvidia.com> +# +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk +ifneq ($(OBJTREE),$(SRCTREE)) +$(shell mkdir -p $(obj)../../qcom/msm7630_surf/) +endif + +LIB = $(obj)lib$(BOARD).o + +COBJS := $(BOARD).o +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +clean: + rm -f $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/qcom/msm7630_surf/msm7630_surf.c b/board/qcom/msm7630_surf/msm7630_surf.c new file mode 100644 index 0000000..eb941c7 --- /dev/null +++ b/board/qcom/msm7630_surf/msm7630_surf.c @@ -0,0 +1,155 @@ +/* + * (C) Copyright 2012 + * LARSEN & TOUBRO INFOTECH LTD <www.lntinfotech.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#include <common.h> +#include <asm/arch/iomap.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/gpio.h> +#include <asm/io.h> +#include <malloc.h> +#include <asm/arch/mmc.h> +#include <linux/string.h> +#include <asm/mach-types.h> +#include <asm/arch/proc_comm.h> +#include "msm7630_surf.h" + +static struct msm_gpio uart2_gpio_table[] = { + { + .gpio_cfg = GPIO_CFG(49, 2, GPIO_OUTPUT, GPIO_PULL_DOWN, GPIO_2MA), + .label = NULL, + }, + { + .gpio_cfg = GPIO_CFG(50, 2, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), + .label = NULL, + }, + { + .gpio_cfg = GPIO_CFG(51, 2, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), + .label = NULL, + }, + { + .gpio_cfg = GPIO_CFG(52, 2, GPIO_OUTPUT, GPIO_PULL_DOWN, GPIO_2MA), + .label = NULL, + }, +}; + + + +DECLARE_GLOBAL_DATA_PTR; + +void uart2_mux_init(void) +{ + platform_gpios_enable(uart2_gpio_table, ARRAY_SIZE(uart2_gpio_table)); +} + +#ifdef CONFIG_BOARD_EARLY_INIT_F +int board_early_init_f() +{ + uart2_mux_init(); + uart2_clock_init(); + return 0; +} +#endif +int board_init() +{ + unsigned long new_addr; + unsigned long offset; + offset = gd->relocaddr - CONFIG_SYS_TEXT_BASE; + new_addr = CONFIG_SYS_TEXT_BASE + offset; + set_vector_base(new_addr); + bd_t *bd = gd->bd; + bd->bi_arch_number = MACH_TYPE_MSM7X30_SURF; + acpu_clock_init(); + adm_enable_clock(); + return 0; +} + +#ifdef CONFIG_QC_MMC + +/* called during the scan of each mmc device */ +int qc_board_mmc_init(struct mmc *mmc) +{ + + struct mmc_priv *sd = (struct mmc_priv *)mmc->priv; + u32 smem_val; + do { + smem_val = 0; + smem_val = readl(MSM_SHARED_BASE + 0x14); + } while (smem_val != 1); + + if (sd->instance == 2 || sd->instance == 4) { + mmc_boot_main(mmc); + return 0; + } else + /* this board does not have an sd/mmc card on this interface. */ + return 1; + } +int board_mmc_init(bd_t *bis) +{ +#ifdef QC_SD + struct mmc *mmc_4; + struct mmc_priv *sdcc_4; + mmc_4 = (struct mmc *) malloc(sizeof(struct mmc)); + if (!mmc_4) + return 1; + sdcc_4 = (struct mmc_priv *) malloc(sizeof(struct mmc_priv)); + if (!sdcc_4) { + free(mmc_4); + return 1; + } + sdcc_4->instance = 4; + sdcc_4->base = MSM_SDC4_BASE; + mmc_4->priv = sdcc_4; + mmc_4->send_cmd = mmc_boot_send_command_map; + mmc_4->set_ios = mmc_boot_set_ios; + mmc_4->init = qc_board_mmc_init; + mmc_4->voltages = MMC_VDD_29_30|MMC_VDD_165_195; + mmc_4->host_caps = MMC_MODE_4BIT|MMC_MODE_HS; + mmc_4->f_min = MMC_CLK_400KHZ; + mmc_4->f_max = MMC_CLK_48MHZ; + sprintf(mmc_4->name, "External_Card"); + mmc_register(mmc_4); +#else + struct mmc *mmc_2; + struct mmc_priv *sdcc_2; + mmc_2 = (struct mmc *) malloc(sizeof(struct mmc)); + if (!mmc_2) + return 1; + sdcc_2 = (struct mmc_priv *) malloc(sizeof(struct mmc_priv)); + if (!sdcc_2) { + free(mmc_2); + return 1; + } + sdcc_2->instance = 2; + sdcc_2->base = MSM_SDC2_BASE; + mmc_2->priv = sdcc_2; + mmc_2->send_cmd = mmc_boot_send_command_map; + mmc_2->set_ios = mmc_boot_set_ios; + mmc_2->init = qc_board_mmc_init; + mmc_2->voltages = MMC_VDD_29_30|MMC_VDD_165_195; + mmc_2->host_caps = MMC_MODE_4BIT|MMC_MODE_HS|MMC_MODE_8BIT| + MMC_MODE_HS_52MHz; + mmc_2->f_min = MMC_CLK_400KHZ; + mmc_2->f_max = MMC_CLK_48MHZ; + sprintf(mmc_2->name, "Internal_Card"); + mmc_register(mmc_2); +#endif + return 0; +} +#endif diff --git a/board/qcom/msm7630_surf/msm7630_surf.h b/board/qcom/msm7630_surf/msm7630_surf.h new file mode 100644 index 0000000..a3d4bde --- /dev/null +++ b/board/qcom/msm7630_surf/msm7630_surf.h @@ -0,0 +1,30 @@ +/* + * (C) Copyright 2012 + * LARSEN & TOUBRO INFOTECH LTD <www.lntinfotech.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#ifndef __MSM7630_SURF_H_ +#define __MSM7630_SURF_H_ +#include <asm/arch/gpio_hw.h> + +extern void set_vector_base(unsigned long); +extern void adm_enable_clock(void); +extern void acpu_clock_init(void); +extern void uart2_clock_init(void); +extern int platform_gpios_enable(const struct msm_gpio *table, int size); +#endif diff --git a/boards.cfg b/boards.cfg index bf71a66..4ab9330 100644 --- a/boards.cfg +++ b/boards.cfg @@ -190,6 +190,7 @@ integratorcp_cm946es arm arm946es integrator armltd ca9x4_ct_vxp arm armv7 vexpress armltd am335x_evm arm armv7 am335x ti am33xx highbank arm armv7 highbank - highbank +msm7630_surf arm armv7 msm7630_surf qcom msm7630 efikamx arm armv7 efikamx - mx5 efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKAMX,IMX_CONFIG=board/efikamx/imximage_mx.cfg efikasb arm armv7 efikamx - mx5 efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKASB,IMX_CONFIG=board/efikamx/imximage_sb.cfg mx51evk arm armv7 mx51evk freescale mx5 mx51evk:IMX_CONFIG=board/freescale/mx51evk/imximage.cfg diff --git a/include/configs/msm7630_surf.h b/include/configs/msm7630_surf.h new file mode 100644 index 0000000..3356611 --- /dev/null +++ b/include/configs/msm7630_surf.h @@ -0,0 +1,131 @@ +/* + * (C) Copyright 2012 + * LARSEN & TOUBRO INFOTECH LTD <www.lntinfotech.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <asm/sizes.h> +#define PLATFORM_MSM7X30 1 +#define CONFIG_MSM_UART +#define CONFIG_SYS_NO_FLASH +#define CONFIG_L2_OFF +#define CONFIG_SKIP_LOWLEVEL_INIT +/* Environment */ +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_SIZE 0x20000 /* Total Size Environment */ +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MSM_PCOMM +#define CONFIG_ARCH_CPU_INIT +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (4 * 1024) /* 4KB */ +#define CONFIG_MSM7630 + +/* + * select serial console configuration + */ +#define CONFIG_CONS_INDEX 1 + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ + 115200} + +#include <config_cmd_default.h> + +/* remove unused commands */ +#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ +#undef CONFIG_CMD_FPGA /* FPGA configuration support */ +#undef CONFIG_CMD_IMI +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_NFS /* NFS support */ +#undef CONFIG_CMD_NET /* network support */ +#undef CONFIG_SYS_MAX_FLASH_SECT +#define CONFIG_EXTRA_ENV_SETTINGS \ + "console=ttyS0,115200n8\0" \ + +#define CONFIG_BOOTDELAY 2 /* -1 to disable auto boot */ + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define V_PROMPT "(MSM 7x30) # " +#define CONFIG_SYS_PROMPT V_PROMPT +/* + * Increasing the size of the IO buffer as default nfsargs size is more + * than 256 and so it is not possible to edit it + */ +#define CONFIG_SYS_CBSIZE (256 * 2) /* Console I/O Buffer Size */ +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) + +#define CONFIG_SYS_HZ 1000 +#define CONFIG_SYS_LOAD_ADDR 0x00208000 +#define CONFIG_SYS_MEMTEST_START 0x08008000 +#define CONFIG_SYS_MEMTEST_END 0x08008001 + +#define CONFIG_DOS_PARTITION +#define CONFIG_MMC +#define CONFIG_CMD_MMC + +#define CONFIG_GENERIC_MMC +#define CONFIG_QC_MMC + +/*--------------------------------------------------------------------- + * IRQ Settings + */ + +#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ +#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ + +/*----------------------------------------------------------------------- + * Physical Memory Map + */ + + +#define CONFIG_NR_DRAM_BANKS 2 + +#define PHYS_SDRAM_1 0x00200000 +#define PHYS_SDRAM_1_SIZE (60*1024*1024) /* 512M */ + + +#define PHYS_SDRAM_2 0x07A00000 +#define PHYS_SDRAM_2_SIZE (134*1024*1024) + +#define CONFIG_SYS_TEXT_BASE 0x00000000 +#define CONFIG_SYS_INIT_RAM_ADDR 0x00000000 +#define CONFIG_SYS_INIT_RAM_SIZE 0x00100000 + + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) + +#endif -- 1.7.1
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Hi Mohamed,
There never seemed to be a 4/5 patch in this set, neither on the list nor in patchwork. Was it lost somehow?
Also, could you please not append this to your mails to the list?
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Amicalement,
participants (2)
-
Albert ARIBAUD
-
mohamed.haneef@lntinfotech.com