[U-Boot] [PATCH V2 1/2] [NEXT] orion5x: fix relocation-incompatible code
Signed-off-by: Albert Aribaud albert.aribaud@free.fr --- SUMMARY
Device address window mapping code would not run from FLASH due to cutting access to BOOTCS. Fixed by reordering code.
Timer initialization would write globals, thus would not run correctly from FLASH. Fixed by moving the writes to a later phase in RAM.
PATCHSET HISTORY
V1 Initial submission V2 Removed useless blank line in config.mk Fixed typo in config file Reordered window inits in cpu.c Added newline at end of timer.c
These patches show 0 error or warning with checkpatch.pl --no-tree and have been tested on edminiv2.
arch/arm/cpu/arm926ejs/orion5x/cpu.c | 78 +++++++++++++++++++----------- arch/arm/cpu/arm926ejs/orion5x/timer.c | 6 ++- arch/arm/include/asm/arch-orion5x/cpu.h | 1 + 3 files changed, 54 insertions(+), 31 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/orion5x/cpu.c b/arch/arm/cpu/arm926ejs/orion5x/cpu.c index 260f88b..c36d7bf 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/cpu.c +++ b/arch/arm/cpu/arm926ejs/orion5x/cpu.c @@ -77,6 +77,17 @@ unsigned int orion5x_winctrl_calcsize(unsigned int sizeval) * * If remap function not used, remap_lo must be set as base * + * NOTES: + * + * 1) in order to avoid windows with inconsistent control and base values + * (which could prevent access to BOOTCS and hence execution from FLASH) + * always disable window before writing the base value then reenable it + * by writing the control value. + * + * 2) in order to avoid losing access to BOOTCS when disabling window 7, + * first configure window 6 for BOOTCS, then configure window 7 for BOOTCS, + * then configure windows 6 for its own target. + * * Reference Documentation: * Mbus-L to Mbus Bridge Registers Configuration. * (Sec 25.1 and 25.3 of Datasheet) @@ -86,57 +97,64 @@ int orion5x_config_adr_windows(void) struct orion5x_win_registers *winregs = (struct orion5x_win_registers *)ORION5X_CPU_WIN_BASE;
- /* Window 0: PCIE MEM address space */ - writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_PCIE_MEM, - ORION5X_TARGET_PCIE, ORION5X_ATTR_PCIE_MEM, - ORION5X_WIN_ENABLE), &winregs[0].ctrl); +/* Disable window 0, configure it for its intended target, enable it. */ + writel(0, &winregs[0].ctrl); writel(ORION5X_ADR_PCIE_MEM, &winregs[0].base); writel(ORION5X_ADR_PCIE_MEM_REMAP_LO, &winregs[0].remap_lo); writel(ORION5X_ADR_PCIE_MEM_REMAP_HI, &winregs[0].remap_hi); - - /* Window 1: PCIE IO address space */ - writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_PCIE_IO, - ORION5X_TARGET_PCIE, ORION5X_ATTR_PCIE_IO, - ORION5X_WIN_ENABLE), &winregs[1].ctrl); + writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_PCIE_MEM, + ORION5X_TARGET_PCIE, ORION5X_ATTR_PCIE_MEM, + ORION5X_WIN_ENABLE), &winregs[0].ctrl); +/* Disable window 1, configure it for its intended target, enable it. */ + writel(0, &winregs[1].ctrl); writel(ORION5X_ADR_PCIE_IO, &winregs[1].base); writel(ORION5X_ADR_PCIE_IO_REMAP_LO, &winregs[1].remap_lo); writel(ORION5X_ADR_PCIE_IO_REMAP_HI, &winregs[1].remap_hi); - - /* Window 2: PCI MEM address space */ + writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_PCIE_IO, + ORION5X_TARGET_PCIE, ORION5X_ATTR_PCIE_IO, + ORION5X_WIN_ENABLE), &winregs[1].ctrl); +/* Disable window 2, configure it for its intended target, enable it. */ + writel(0, &winregs[2].ctrl); + writel(ORION5X_ADR_PCI_MEM, &winregs[2].base); writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_PCI_MEM, ORION5X_TARGET_PCI, ORION5X_ATTR_PCI_MEM, ORION5X_WIN_ENABLE), &winregs[2].ctrl); - writel(ORION5X_ADR_PCI_MEM, &winregs[2].base); - - /* Window 3: PCI IO address space */ +/* Disable window 3, configure it for its intended target, enable it. */ + writel(0, &winregs[3].ctrl); + writel(ORION5X_ADR_PCI_IO, &winregs[3].base); writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_PCI_IO, ORION5X_TARGET_PCI, ORION5X_ATTR_PCI_IO, ORION5X_WIN_ENABLE), &winregs[3].ctrl); - writel(ORION5X_ADR_PCI_IO, &winregs[3].base); - - /* Window 4: DEV_CS0 address space */ +/* Disable window 4, configure it for its intended target, enable it. */ + writel(0, &winregs[4].ctrl); + writel(ORION5X_ADR_DEV_CS0, &winregs[4].base); writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_DEV_CS0, ORION5X_TARGET_DEVICE, ORION5X_ATTR_DEV_CS0, ORION5X_WIN_ENABLE), &winregs[4].ctrl); - writel(ORION5X_ADR_DEV_CS0, &winregs[4].base); - - /* Window 5: DEV_CS1 address space */ +/* Disable window 5, configure it for its intended target, enable it. */ + writel(0, &winregs[5].ctrl); + writel(ORION5X_ADR_DEV_CS1, &winregs[5].base); writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_DEV_CS1, ORION5X_TARGET_DEVICE, ORION5X_ATTR_DEV_CS1, ORION5X_WIN_ENABLE), &winregs[5].ctrl); - writel(ORION5X_ADR_DEV_CS1, &winregs[5].base); - - /* Window 6: DEV_CS2 address space */ - writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_DEV_CS2, - ORION5X_TARGET_DEVICE, ORION5X_ATTR_DEV_CS2, +/* Disable window 6, configure it for FLASH, enable it. */ + writel(0, &winregs[6].ctrl); + writel(ORION5X_ADR_BOOTROM, &winregs[6].base); + writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_BOOTROM, + ORION5X_TARGET_DEVICE, ORION5X_ATTR_BOOTROM, ORION5X_WIN_ENABLE), &winregs[6].ctrl); - writel(ORION5X_ADR_DEV_CS2, &winregs[6].base); - - /* Window 7: BOOT Memory address space */ +/* Disable window 7, configure it for FLASH, enable it. */ + writel(0, &winregs[7].ctrl); + writel(ORION5X_ADR_BOOTROM, &winregs[7].base); writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_BOOTROM, ORION5X_TARGET_DEVICE, ORION5X_ATTR_BOOTROM, ORION5X_WIN_ENABLE), &winregs[7].ctrl); - writel(ORION5X_ADR_BOOTROM, &winregs[7].base); +/* Disable window 6, configure it for its intended target, enable it. */ + writel(0, &winregs[6].ctrl); + writel(ORION5X_ADR_DEV_CS2, &winregs[6].base); + writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_DEV_CS2, + ORION5X_TARGET_DEVICE, ORION5X_ATTR_DEV_CS2, + ORION5X_WIN_ENABLE), &winregs[6].ctrl);
return 0; } @@ -265,6 +283,8 @@ int arch_misc_init(void) writel(ORION5X_MPP16_23, ORION5X_MPP_BASE+0x50); writel(ORION5X_GPIO_OUT_ENABLE, ORION5X_GPIO_BASE+0x04);
+ /* initialize timer */ + timer_init_r(); return 0; } #endif /* CONFIG_ARCH_MISC_INIT */ diff --git a/arch/arm/cpu/arm926ejs/orion5x/timer.c b/arch/arm/cpu/arm926ejs/orion5x/timer.c index 115448f..089ef47 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/timer.c +++ b/arch/arm/cpu/arm926ejs/orion5x/timer.c @@ -173,9 +173,11 @@ int timer_init(void) cntmrctrl |= CTCR_ARM_TIMER_EN(UBOOT_CNTR); cntmrctrl |= CTCR_ARM_TIMER_AUTO_EN(UBOOT_CNTR); writel(cntmrctrl, CNTMR_CTRL_REG); + return 0; +}
+void timer_init_r(void) +{ /* init the timestamp and lastdec value */ reset_timer_masked(); - - return 0; } diff --git a/arch/arm/include/asm/arch-orion5x/cpu.h b/arch/arm/include/asm/arch-orion5x/cpu.h index 6ce02a9..c84efaf 100644 --- a/arch/arm/include/asm/arch-orion5x/cpu.h +++ b/arch/arm/include/asm/arch-orion5x/cpu.h @@ -255,5 +255,6 @@ void reset_cpu(unsigned long ignored); u32 orion5x_device_id(void); u32 orion5x_device_rev(void); unsigned int orion5x_winctrl_calcsize(unsigned int sizeval); +void timer_init_r(void); #endif /* __ASSEMBLY__ */ #endif /* _ORION5X_CPU_H */
Signed-off-by: Albert Aribaud albert.aribaud@free.fr --- board/LaCie/edminiv2/config.mk | 3 ++- include/configs/edminiv2.h | 6 ++++++ 2 files changed, 8 insertions(+), 1 deletions(-)
diff --git a/board/LaCie/edminiv2/config.mk b/board/LaCie/edminiv2/config.mk index 3dec1aa..bb444b5 100644 --- a/board/LaCie/edminiv2/config.mk +++ b/board/LaCie/edminiv2/config.mk @@ -24,4 +24,5 @@ # MA 02110-1301 USA #
-TEXT_BASE = 0x00100000 +# with relocation TEXT_BASE now *must* be in FLASH +TEXT_BASE = 0xfff90000 diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index ccfc660..e6537fc 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -223,4 +223,10 @@ #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 #define CONFIG_SYS_MAXARGS 16
+/* additions for new relocation code, must be added to all boards */ +#undef CONFIG_SYS_ARM_WITHOUT_RELOC +#define CONFIG_SYS_SDRAM_BASE 0 +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_SDRAM_BASE + 0x1000 - CONFIG_SYS_GBL_DATA_SIZE) + #endif /* _CONFIG_EDMINIV2_H */
Dear Albert Aribaud,
In message 1285271364-21302-2-git-send-email-albert.aribaud@free.fr you wrote:
Signed-off-by: Albert Aribaud albert.aribaud@free.fr
board/LaCie/edminiv2/config.mk | 3 ++- include/configs/edminiv2.h | 6 ++++++ 2 files changed, 8 insertions(+), 1 deletions(-)
Is it correct to assume this patch has been obsoleted by the recent "[ELF_RELOC] [PATCH V3 2/2] edminiv2: add support for ELF" submission?
If yes, then how about the other part of this series, "[PATCH V2 1/2] [NEXT] orion5x: fix relocation-incompatible c..." ?
Best regards,
Wolfgang Denk
Le 11/10/2010 13:30, Wolfgang Denk a écrit :
Dear Albert Aribaud,
In message1285271364-21302-2-git-send-email-albert.aribaud@free.fr you wrote:
Signed-off-by: Albert Aribaudalbert.aribaud@free.fr
board/LaCie/edminiv2/config.mk | 3 ++- include/configs/edminiv2.h | 6 ++++++ 2 files changed, 8 insertions(+), 1 deletions(-)
Is it correct to assume this patch has been obsoleted by the recent "[ELF_RELOC] [PATCH V3 2/2] edminiv2: add support for ELF" submission?
Yes, it is correct.
If yes, then how about the other part of this series, "[PATCH V2 1/2] [NEXT] orion5x: fix relocation-incompatible c..." ?
I'd forgotten this one -- somehow I thought it was already applied since it was a fix made above Heiko's GOT relocation patches before they were merged from next to master.
So yes, it is needed for relocation, but it is not ELF specific. It should thus go to the arm master branch, and the ELF branch should be based at or above it.
Apologies for missing this.
Best regards,
Wolfgang Denk
Amicalement,
Le 11/10/2010 13:42, Albert ARIBAUD a écrit :
So yes, it is needed for relocation, but it is not ELF specific. It should thus go to the arm master branch, and the ELF branch should be based at or above it.
BTW: do you want me to resubmit it formally as a standalone patch?
Amicalement,
Dear Albert ARIBAUD,
In message 4CB2F968.8040901@free.fr you wrote:
Le 11/10/2010 13:42, Albert ARIBAUD a =E9crit :
So yes, it is needed for relocation, but it is not ELF specific. It should thus go to the arm master branch, and the ELF branch should be based at or above it.
BTW: do you want me to resubmit it formally as a standalone patch?
No, thanks, not needed.
Best regards,
Wolfgang Denk
Dear Albert ARIBAUD,
In message 4CB2F82F.2090803@free.fr you wrote:
If yes, then how about the other part of this series, "[PATCH V2 1/2] [NEXT] orion5x: fix relocation-incompatible c..." ?
I'd forgotten this one -- somehow I thought it was already applied since it was a fix made above Heiko's GOT relocation patches before they were merged from next to master.
So yes, it is needed for relocation, but it is not ELF specific. It should thus go to the arm master branch, and the ELF branch should be based at or above it.
OK, will do.
Best regards,
Wolfgang Denk
-----Original Message----- From: u-boot-bounces@lists.denx.de [mailto:u-boot-bounces@lists.denx.de] On Behalf Of Albert Aribaud Sent: Friday, September 24, 2010 1:19 AM To: u-boot@lists.denx.de Subject: [U-Boot] [PATCH V2 1/2] [NEXT] orion5x: fix relocation-incompatible code
Signed-off-by: Albert Aribaud albert.aribaud@free.fr
SUMMARY
Device address window mapping code would not run from FLASH due to cutting access to BOOTCS. Fixed by reordering code.
Timer initialization would write globals, thus would not run correctly from FLASH. Fixed by moving the writes to a later phase in RAM.
PATCHSET HISTORY
V1 Initial submission V2 Removed useless blank line in config.mk Fixed typo in config file Reordered window inits in cpu.c Added newline at end of timer.c
These patches show 0 error or warning with checkpatch.pl --no-tree and have been tested on edminiv2.
arch/arm/cpu/arm926ejs/orion5x/cpu.c | 78 +++++++++++++++++++----------- arch/arm/cpu/arm926ejs/orion5x/timer.c | 6 ++- arch/arm/include/asm/arch-orion5x/cpu.h | 1 + 3 files changed, 54 insertions(+), 31 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/orion5x/cpu.c b/arch/arm/cpu/arm926ejs/orion5x/cpu.c index 260f88b..c36d7bf 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/cpu.c +++ b/arch/arm/cpu/arm926ejs/orion5x/cpu.c @@ -77,6 +77,17 @@ unsigned int orion5x_winctrl_calcsize(unsigned int sizeval)
- If remap function not used, remap_lo must be set as base
- NOTES:
- in order to avoid windows with inconsistent control
and base values
- (which could prevent access to BOOTCS and hence
execution from FLASH)
- always disable window before writing the base value
then reenable it
- by writing the control value.
- in order to avoid losing access to BOOTCS when
disabling window 7,
- first configure window 6 for BOOTCS, then configure
window 7 for BOOTCS,
- then configure windows 6 for its own target.
- Reference Documentation:
- Mbus-L to Mbus Bridge Registers Configuration.
- (Sec 25.1 and 25.3 of Datasheet)
@@ -86,57 +97,64 @@ int orion5x_config_adr_windows(void) struct orion5x_win_registers *winregs = (struct orion5x_win_registers *)ORION5X_CPU_WIN_BASE;
- /* Window 0: PCIE MEM address space */
- writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_PCIE_MEM,
ORION5X_TARGET_PCIE, ORION5X_ATTR_PCIE_MEM,ORION5X_WIN_ENABLE), &winregs[0].ctrl);+/* Disable window 0, configure it for its intended target, enable it. */
- writel(0, &winregs[0].ctrl); writel(ORION5X_ADR_PCIE_MEM, &winregs[0].base); writel(ORION5X_ADR_PCIE_MEM_REMAP_LO, &winregs[0].remap_lo); writel(ORION5X_ADR_PCIE_MEM_REMAP_HI, &winregs[0].remap_hi);
- /* Window 1: PCIE IO address space */
- writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_PCIE_IO,
ORION5X_TARGET_PCIE, ORION5X_ATTR_PCIE_IO,ORION5X_WIN_ENABLE), &winregs[1].ctrl);
- writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_PCIE_MEM,
ORION5X_TARGET_PCIE, ORION5X_ATTR_PCIE_MEM,ORION5X_WIN_ENABLE), &winregs[0].ctrl);+/* Disable window 1, configure it for its intended target, enable it. */
- writel(0, &winregs[1].ctrl); writel(ORION5X_ADR_PCIE_IO, &winregs[1].base); writel(ORION5X_ADR_PCIE_IO_REMAP_LO, &winregs[1].remap_lo); writel(ORION5X_ADR_PCIE_IO_REMAP_HI, &winregs[1].remap_hi);
- /* Window 2: PCI MEM address space */
- writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_PCIE_IO,
ORION5X_TARGET_PCIE, ORION5X_ATTR_PCIE_IO,ORION5X_WIN_ENABLE), &winregs[1].ctrl);+/* Disable window 2, configure it for its intended target, enable it. */
- writel(0, &winregs[2].ctrl);
- writel(ORION5X_ADR_PCI_MEM, &winregs[2].base); writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_PCI_MEM, ORION5X_TARGET_PCI, ORION5X_ATTR_PCI_MEM, ORION5X_WIN_ENABLE), &winregs[2].ctrl);
- writel(ORION5X_ADR_PCI_MEM, &winregs[2].base);
- /* Window 3: PCI IO address space */
+/* Disable window 3, configure it for its intended target, enable it. */
- writel(0, &winregs[3].ctrl);
- writel(ORION5X_ADR_PCI_IO, &winregs[3].base); writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_PCI_IO, ORION5X_TARGET_PCI, ORION5X_ATTR_PCI_IO, ORION5X_WIN_ENABLE), &winregs[3].ctrl);
- writel(ORION5X_ADR_PCI_IO, &winregs[3].base);
- /* Window 4: DEV_CS0 address space */
+/* Disable window 4, configure it for its intended target, enable it. */
- writel(0, &winregs[4].ctrl);
- writel(ORION5X_ADR_DEV_CS0, &winregs[4].base); writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_DEV_CS0, ORION5X_TARGET_DEVICE, ORION5X_ATTR_DEV_CS0, ORION5X_WIN_ENABLE), &winregs[4].ctrl);
- writel(ORION5X_ADR_DEV_CS0, &winregs[4].base);
- /* Window 5: DEV_CS1 address space */
+/* Disable window 5, configure it for its intended target, enable it. */
- writel(0, &winregs[5].ctrl);
- writel(ORION5X_ADR_DEV_CS1, &winregs[5].base); writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_DEV_CS1, ORION5X_TARGET_DEVICE, ORION5X_ATTR_DEV_CS1, ORION5X_WIN_ENABLE), &winregs[5].ctrl);
- writel(ORION5X_ADR_DEV_CS1, &winregs[5].base);
- /* Window 6: DEV_CS2 address space */
- writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_DEV_CS2,
ORION5X_TARGET_DEVICE, ORION5X_ATTR_DEV_CS2,+/* Disable window 6, configure it for FLASH, enable it. */
- writel(0, &winregs[6].ctrl);
- writel(ORION5X_ADR_BOOTROM, &winregs[6].base);
- writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_BOOTROM,
ORION5X_TARGET_DEVICE, ORION5X_ATTR_BOOTROM,
- writel(ORION5X_ADR_DEV_CS2, &winregs[6].base);
- /* Window 7: BOOT Memory address space */
+/* Disable window 7, configure it for FLASH, enable it. */
- writel(0, &winregs[7].ctrl);
- writel(ORION5X_ADR_BOOTROM, &winregs[7].base); writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_BOOTROM, ORION5X_TARGET_DEVICE, ORION5X_ATTR_BOOTROM, ORION5X_WIN_ENABLE), &winregs[7].ctrl);
- writel(ORION5X_ADR_BOOTROM, &winregs[7].base);
+/* Disable window 6, configure it for its intended target, enable it. */
- writel(0, &winregs[6].ctrl);
This conflicts with above win6 configuration. If done purposely then pls provide comments.
Regards.. Prafulla . .
Le 27/09/2010 07:52, Prafulla Wadaskar a écrit :
- NOTES:
- in order to avoid losing access to BOOTCS when
disabling window 7,
- first configure window 6 for BOOTCS, then configure
window 7 for BOOTCS,
- then configure windows 6 for its own target.
+/* Disable window 6, configure it for FLASH, enable it. */
- writel(0,&winregs[6].ctrl);
- writel(ORION5X_ADR_BOOTROM,&winregs[6].base);
- writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_BOOTROM,
ORION5X_TARGET_DEVICE, ORION5X_ATTR_BOOTROM,
- writel(ORION5X_ADR_DEV_CS2,&winregs[6].base);
- /* Window 7: BOOT Memory address space */
+/* Disable window 7, configure it for FLASH, enable it. */
- writel(0,&winregs[7].ctrl);
- writel(ORION5X_ADR_BOOTROM,&winregs[7].base); writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_BOOTROM, ORION5X_TARGET_DEVICE, ORION5X_ATTR_BOOTROM, ORION5X_WIN_ENABLE),&winregs[7].ctrl);
- writel(ORION5X_ADR_BOOTROM,&winregs[7].base);
+/* Disable window 6, configure it for its intended target, enable it. */
- writel(0,&winregs[6].ctrl);
This conflicts with above win6 configuration. If done purposely then pls provide comments.
Regards.. Prafulla . .
Er... The comment *is* there, right before the sequence.
Amicalement,
-----Original Message----- From: Albert ARIBAUD [mailto:albert.aribaud@free.fr] Sent: Monday, September 27, 2010 12:05 PM To: Prafulla Wadaskar Cc: u-boot@lists.denx.de; Ashish Karkare; Prabhanjan Sarnaik Subject: Re: [U-Boot] [PATCH V2 1/2] [NEXT] orion5x: fix relocation-incompatible code
Le 27/09/2010 07:52, Prafulla Wadaskar a écrit :
- NOTES:
- in order to avoid losing access to BOOTCS when
disabling window 7,
- first configure window 6 for BOOTCS, then configure
window 7 for BOOTCS,
- then configure windows 6 for its own target.
+/* Disable window 6, configure it for FLASH, enable it. */
- writel(0,&winregs[6].ctrl);
- writel(ORION5X_ADR_BOOTROM,&winregs[6].base);
- writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_BOOTROM,
ORION5X_TARGET_DEVICE, ORION5X_ATTR_BOOTROM,
- writel(ORION5X_ADR_DEV_CS2,&winregs[6].base);
- /* Window 7: BOOT Memory address space */
+/* Disable window 7, configure it for FLASH, enable it. */
- writel(0,&winregs[7].ctrl);
- writel(ORION5X_ADR_BOOTROM,&winregs[7].base); writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_BOOTROM, ORION5X_TARGET_DEVICE, ORION5X_ATTR_BOOTROM, ORION5X_WIN_ENABLE),&winregs[7].ctrl);
- writel(ORION5X_ADR_BOOTROM,&winregs[7].base);
+/* Disable window 6, configure it for its intended target, enable it. */
- writel(0,&winregs[6].ctrl);
This conflicts with above win6 configuration. If done purposely then pls provide comments.
Regards.. Prafulla . .
Er... The comment *is* there, right before the sequence.
Why do you need to configure win6 twice?
Regards.. Prafulla . .
Le 27/09/2010 08:36, Prafulla Wadaskar a écrit :
-----Original Message----- From: Albert ARIBAUD [mailto:albert.aribaud@free.fr] Sent: Monday, September 27, 2010 12:05 PM To: Prafulla Wadaskar Cc: u-boot@lists.denx.de; Ashish Karkare; Prabhanjan Sarnaik Subject: Re: [U-Boot] [PATCH V2 1/2] [NEXT] orion5x: fix relocation-incompatible code
Le 27/09/2010 07:52, Prafulla Wadaskar a écrit :
- NOTES:
- in order to avoid losing access to BOOTCS when
disabling window 7,
- first configure window 6 for BOOTCS, then configure
window 7 for BOOTCS,
- then configure windows 6 for its own target.
+/* Disable window 6, configure it for FLASH, enable it. */
- writel(0,&winregs[6].ctrl);
- writel(ORION5X_ADR_BOOTROM,&winregs[6].base);
- writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_BOOTROM,
ORION5X_TARGET_DEVICE, ORION5X_ATTR_BOOTROM, ORION5X_WIN_ENABLE),&winregs[6].ctrl);
- writel(ORION5X_ADR_DEV_CS2,&winregs[6].base);
- /* Window 7: BOOT Memory address space */
+/* Disable window 7, configure it for FLASH, enable it. */
- writel(0,&winregs[7].ctrl);
- writel(ORION5X_ADR_BOOTROM,&winregs[7].base); writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_BOOTROM, ORION5X_TARGET_DEVICE, ORION5X_ATTR_BOOTROM, ORION5X_WIN_ENABLE),&winregs[7].ctrl);
- writel(ORION5X_ADR_BOOTROM,&winregs[7].base);
+/* Disable window 6, configure it for its intended target, enable it. */
- writel(0,&winregs[6].ctrl);
This conflicts with above win6 configuration. If done purposely then pls provide comments.
Regards.. Prafulla . .
Er... The comment *is* there, right before the sequence.
Why do you need to configure win6 twice?
Because if I don't set a window beside 7 to access BOOTCS, then reconfiguring window 7 (BOOTCs, i.e. FLASH) leaves the system with no access to BOOT CS thus no access to FLASH thus no way to continue executing this code, which runs from FLASH.
Thus I chose window 6 (I could have chosen any other, of course) and set it up for flash so that code can still run while reconfiguring window 7; then window 6 must, and can safely, be reconfigured for its own target.
(This issue of FLASH access does not happen on designs where boot is from NAND, of course; but the fix would be harmless even on these)
Regards.. Prafulla . .
Amicalement,
Dear Albert Aribaud,
In message 1285271364-21302-1-git-send-email-albert.aribaud@free.fr you wrote:
Signed-off-by: Albert Aribaud albert.aribaud@free.fr
SUMMARY
Device address window mapping code would not run from FLASH due to cutting access to BOOTCS. Fixed by reordering code.
Timer initialization would write globals, thus would not run correctly from FLASH. Fixed by moving the writes to a later phase in RAM.
PATCHSET HISTORY
V1 Initial submission V2 Removed useless blank line in config.mk Fixed typo in config file Reordered window inits in cpu.c Added newline at end of timer.c
These patches show 0 error or warning with checkpatch.pl --no-tree and have been tested on edminiv2.
arch/arm/cpu/arm926ejs/orion5x/cpu.c | 78 +++++++++++++++++++----------- arch/arm/cpu/arm926ejs/orion5x/timer.c | 6 ++- arch/arm/include/asm/arch-orion5x/cpu.h | 1 + 3 files changed, 54 insertions(+), 31 deletions(-)
Applied to "u-boot-arm" repo, "master" branch.
"elf_reloc"-Branch rebased against master.
Best regards,
Wolfgang Denk
participants (4)
-
Albert ARIBAUD -
Albert Aribaud
-
Prafulla Wadaskar -
Wolfgang Denk