[PATCH 0/2] AM64: Update the locations of various elements in SRAM
The following series of patches, - Update the location of TF-A - Indicate reserved locations for DMSC code and secure proxy
Aswath Govindraju (2): configs: am64x_evm_a53_defconfig: Move TF-A load address to 0x701c4000 arm: dts: k3-am64-main: Indicate the memory reserved for DMSC-lite code and secure proxy communication buffer
arch/arm/dts/k3-am64-main.dtsi | 12 ++++++++++-- configs/am64x_evm_a53_defconfig | 2 +- 2 files changed, 11 insertions(+), 3 deletions(-)
Earlier, the region 0x701C0000 to 0x701DFFFF was firewalled off because of a bug in SYSFW. In the v2021.05 release of SYSFW this bug has been fixed and this region can now be used for other allocations.
Therefore, move TF-A's load address to 0x701C4000 and update its location in the device tree node.
Fixes: defd62ca137b ("arm: dts: k3-am64-main: Update the location of ATF in SRAM and increase its max size") Signed-off-by: Aswath Govindraju a-govindraju@ti.com --- arch/arm/dts/k3-am64-main.dtsi | 4 ++-- configs/am64x_evm_a53_defconfig | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/k3-am64-main.dtsi b/arch/arm/dts/k3-am64-main.dtsi index 6b5ebec6b1fe..9c04690e410a 100644 --- a/arch/arm/dts/k3-am64-main.dtsi +++ b/arch/arm/dts/k3-am64-main.dtsi @@ -13,8 +13,8 @@ #size-cells = <1>; ranges = <0x0 0x00 0x70000000 0x200000>;
- atf-sram@0 { - reg = <0x1a0000 0x1c000>; + tfa-sram@1c4000 { + reg = <0x1c4000 0x1c000>; }; };
diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig index fbce9e96748f..464b496c816a 100644 --- a/configs/am64x_evm_a53_defconfig +++ b/configs/am64x_evm_a53_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM642=y -CONFIG_K3_ATF_LOAD_ADDR=0x701a0000 +CONFIG_K3_ATF_LOAD_ADDR=0x701c4000 CONFIG_TARGET_AM642_A53_EVM=y CONFIG_ENV_SIZE=0x20000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
The final 128KB in SRAM is reserved by default for DMSC-lite code and secure proxy communication buffer. The memory region used for DMSC-lite code can be optionally freed up by secure firmware API[1]. However, the buffer for secure proxy communication is not configurable. This default hardware configuration is unique for AM64.
Therefore, indicate the area reserved for DMSC-lite code and secure proxy communication buffer in the oc_sram device tree node.
[1] - http://downloads.ti.com/tisci/esd/latest/6_topic_user_guides/security_handov...
Signed-off-by: Aswath Govindraju a-govindraju@ti.com --- arch/arm/dts/k3-am64-main.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/arch/arm/dts/k3-am64-main.dtsi b/arch/arm/dts/k3-am64-main.dtsi index 9c04690e410a..9c4b3cd2a98f 100644 --- a/arch/arm/dts/k3-am64-main.dtsi +++ b/arch/arm/dts/k3-am64-main.dtsi @@ -16,6 +16,14 @@ tfa-sram@1c4000 { reg = <0x1c4000 0x1c000>; }; + + dmsc-sram@1e0000 { + reg = <0x1e0000 0x1c000>; + }; + + sproxy-sram@1fc000 { + reg = <0x1fc000 0x4000>; + }; };
gic500: interrupt-controller@1800000 {
participants (1)
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Aswath Govindraju