[U-Boot] [PATCH] Bits reversed in ppc4xx.h
The bits in ppc440.h for the SDR0_DDRCFG register are incorrect. The register is numbered in big-endian mode, so for example, the LT2 bit (bit 23) should be represented as 0x00000100 rather than 0x01000000.
Signed-off-by: Steven A. Falco sfalco@harris.com ---
diff --git a/include/ppc440.h b/include/ppc440.h index c581f1b..520b0d9 100644 --- a/include/ppc440.h +++ b/include/ppc440.h @@ -174,13 +174,13 @@ #define sdr_ddrdl 0x00e0 #else #define sdr_cfg 0x00e0 -#define SDR_CFG_LT2_MASK 0x01000000 /* Leakage test 2*/ -#define SDR_CFG_64_32BITS_MASK 0x01000000 /* Switch DDR 64 bits or 32 bits */ +#define SDR_CFG_LT2_MASK 0x00000100 /* Leakage test 2*/ +#define SDR_CFG_64_32BITS_MASK 0x00000080 /* Switch DDR 64 bits or 32 bits */ #define SDR_CFG_32BITS 0x00000000 /* 32 bits */ -#define SDR_CFG_64BITS 0x01000000 /* 64 bits */ -#define SDR_CFG_MC_V2518_MASK 0x02000000 /* Low VDD2518 (2.5 or 1.8V) */ +#define SDR_CFG_64BITS 0x00000080 /* 64 bits */ +#define SDR_CFG_MC_V2518_MASK 0x00000040 /* Low VDD2518 (2.5 or 1.8V) */ #define SDR_CFG_MC_V25 0x00000000 /* 2.5 V */ -#define SDR_CFG_MC_V18 0x02000000 /* 1.8 V */ +#define SDR_CFG_MC_V18 0x00000040 /* 1.8 V */ #endif /* !defined(CONFIG_440EPX) && !defined(CONFIG_440GRX) */ #define sdr_ebc 0x0100 #define sdr_uart0 0x0120 /* UART0 Config */
On Wednesday 19 November 2008, Steven A. Falco wrote:
The bits in ppc440.h for the SDR0_DDRCFG register are incorrect. The register is numbered in big-endian mode, so for example, the LT2 bit (bit 23) should be represented as 0x00000100 rather than 0x01000000.
Those defines are not used anywhere currently. So I would really prefer to remove those defines completely. A patch for this would be really appreciated. Thanks.
Please note that all 4xx-SDRAM related defines should be placed in include/asm-ppc/ppc4xx-sdram.h now.
Thanks.
Best regards, Stefan
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office@denx.de =====================================================================
The definitions of bits in SDR_CFG are incorrect, and not used within U-Boot. Therefore, they can be removed.
Signed-off-by: Steven A. Falco sfalco@harris.com ---
As per Stefan's request, here is a patch removing the unused, incorrect definitions.
Note that the AMCC DDR spreadsheet does calculate a value for the sdr_cfg register, so I am leaving the "#define sdr_cfg 0x00e0" in place, to make it easier for boards that have to set this register.
diff --git a/include/ppc440.h b/include/ppc440.h index c581f1b..a644f99 100644 --- a/include/ppc440.h +++ b/include/ppc440.h @@ -174,13 +174,6 @@ #define sdr_ddrdl 0x00e0 #else #define sdr_cfg 0x00e0 -#define SDR_CFG_LT2_MASK 0x01000000 /* Leakage test 2*/ -#define SDR_CFG_64_32BITS_MASK 0x01000000 /* Switch DDR 64 bits or 32 bits */ -#define SDR_CFG_32BITS 0x00000000 /* 32 bits */ -#define SDR_CFG_64BITS 0x01000000 /* 64 bits */ -#define SDR_CFG_MC_V2518_MASK 0x02000000 /* Low VDD2518 (2.5 or 1.8V) */ -#define SDR_CFG_MC_V25 0x00000000 /* 2.5 V */ -#define SDR_CFG_MC_V18 0x02000000 /* 1.8 V */ #endif /* !defined(CONFIG_440EPX) && !defined(CONFIG_440GRX) */ #define sdr_ebc 0x0100 #define sdr_uart0 0x0120 /* UART0 Config */
On Thursday 20 November 2008, Steven A. Falco wrote:
The definitions of bits in SDR_CFG are incorrect, and not used within U-Boot. Therefore, they can be removed.
Signed-off-by: Steven A. Falco sfalco@harris.com
As per Stefan's request, here is a patch removing the unused, incorrect definitions.
Note that the AMCC DDR spreadsheet does calculate a value for the sdr_cfg register, so I am leaving the "#define sdr_cfg 0x00e0" in place, to make it easier for boards that have to set this register.
Since the register naming is not really correct (SDR0_DDRCFG instead of sdr_cfg on 440EPx) I would really like you to remove this define too. And sdr_ddrdl too please. If somebody needs them they can be added quickly and with the correct naming please (and upper case this time).
Thanks.
Best regards, Stefan
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office@denx.de =====================================================================
The definitions of bits in SDR_CFG are incorrect, and not used within U-Boot. Therefore, they can be removed.
The naming of the sdr_ddrdl/sdr_cfg registers do not follow conventions, and are unused, so they can be removed too.
A definition for SDR0_DDRCFG is added.
Signed-off-by: Steven A. Falco sfalco@harris.com ---
As per Stefan's request, here is a patch removing the unused, incorrect definitions.
Note that the AMCC DDR spreadsheet does calculate a value for the sdr_cfg register, and I want to use that in a new board design (not yet ready for submission), so I've added the SDR0_DDRCFG definition.
diff --git a/include/ppc440.h b/include/ppc440.h index c581f1b..2d64ed6 100644 --- a/include/ppc440.h +++ b/include/ppc440.h @@ -170,18 +170,9 @@ #define sdr_ecid1 0x0081 #define sdr_ecid2 0x0082 #define sdr_jtag 0x00c0 -#if !defined(CONFIG_440EPX) && !defined(CONFIG_440GRX) -#define sdr_ddrdl 0x00e0 -#else -#define sdr_cfg 0x00e0 -#define SDR_CFG_LT2_MASK 0x01000000 /* Leakage test 2*/ -#define SDR_CFG_64_32BITS_MASK 0x01000000 /* Switch DDR 64 bits or 32 bits */ -#define SDR_CFG_32BITS 0x00000000 /* 32 bits */ -#define SDR_CFG_64BITS 0x01000000 /* 64 bits */ -#define SDR_CFG_MC_V2518_MASK 0x02000000 /* Low VDD2518 (2.5 or 1.8V) */ -#define SDR_CFG_MC_V25 0x00000000 /* 2.5 V */ -#define SDR_CFG_MC_V18 0x02000000 /* 1.8 V */ -#endif /* !defined(CONFIG_440EPX) && !defined(CONFIG_440GRX) */ +#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) +#define SDR0_DDRCFG 0x00e0 +#endif /* defined(CONFIG_440EPX) || defined(CONFIG_440GRX) */ #define sdr_ebc 0x0100 #define sdr_uart0 0x0120 /* UART0 Config */ #define sdr_uart1 0x0121 /* UART1 Config */
On Thursday 20 November 2008, Steven A. Falco wrote:
The definitions of bits in SDR_CFG are incorrect, and not used within U-Boot. Therefore, they can be removed.
The naming of the sdr_ddrdl/sdr_cfg registers do not follow conventions, and are unused, so they can be removed too.
A definition for SDR0_DDRCFG is added.
Signed-off-by: Steven A. Falco sfalco@harris.com
Applied to 4xx/master. Thanks.
Best regards, Stefan
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office@denx.de =====================================================================
participants (2)
-
Stefan Roese -
Steven A. Falco