[U-Boot] [PATCH v2 1/4] imx: mx6sabresd/sabreauto: Move MX6Q/DL DDR and FDT configs to defconfig
To support more iMX6 variants, 1. Make the DDR size configurable based on the defconfig file 2. Make the FDT file configurable based on the defconfig file
Signed-off-by: Ye.Li B37916@freescale.com --- Changes since v1: - Rework the short log subject
board/freescale/mx6qsabreauto/mx6qsabreauto.c | 2 +- board/freescale/mx6sabresd/mx6sabresd.c | 2 +- configs/mx6dlsabreauto_defconfig | 2 +- configs/mx6dlsabresd_defconfig | 2 +- configs/mx6qsabreauto_defconfig | 2 +- configs/mx6qsabresd_defconfig | 2 +- include/configs/mx6qsabreauto.h | 9 ++------- include/configs/mx6sabresd.h | 8 +------- 8 files changed, 9 insertions(+), 20 deletions(-)
diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c index 928dadf..bfb9b6a 100644 --- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c +++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c @@ -45,7 +45,7 @@ DECLARE_GLOBAL_DATA_PTR;
int dram_init(void) { - gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); + gd->ram_size = (phys_size_t)CONFIG_DDR_MB * 1024 * 1024;
return 0; } diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index 80c8ebd..5f65f1b 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -53,7 +53,7 @@ DECLARE_GLOBAL_DATA_PTR;
int dram_init(void) { - gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); + gd->ram_size = (phys_size_t)CONFIG_DDR_MB * 1024 * 1024;
return 0; } diff --git a/configs/mx6dlsabreauto_defconfig b/configs/mx6dlsabreauto_defconfig index b649935..ce755d1 100644 --- a/configs/mx6dlsabreauto_defconfig +++ b/configs/mx6dlsabreauto_defconfig @@ -1,3 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6DL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6DL,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=2048" CONFIG_ARM=y CONFIG_TARGET_MX6QSABREAUTO=y diff --git a/configs/mx6dlsabresd_defconfig b/configs/mx6dlsabresd_defconfig index 9ce960e..b8e6d29 100644 --- a/configs/mx6dlsabresd_defconfig +++ b/configs/mx6dlsabresd_defconfig @@ -1,3 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL,DEFAULT_FDT_FILE="imx6dl-sabresd.dtb",DDR_MB=1024" CONFIG_ARM=y CONFIG_TARGET_MX6SABRESD=y diff --git a/configs/mx6qsabreauto_defconfig b/configs/mx6qsabreauto_defconfig index 7d86700..25085a9 100644 --- a/configs/mx6qsabreauto_defconfig +++ b/configs/mx6qsabreauto_defconfig @@ -1,3 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/imximage.cfg,MX6Q" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/imximage.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabreauto.dtb",DDR_MB=2048" CONFIG_ARM=y CONFIG_TARGET_MX6QSABREAUTO=y diff --git a/configs/mx6qsabresd_defconfig b/configs/mx6qsabresd_defconfig index dc8e254..edfb988 100644 --- a/configs/mx6qsabresd_defconfig +++ b/configs/mx6qsabresd_defconfig @@ -1,3 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabresd.dtb",DDR_MB=1024" CONFIG_ARM=y CONFIG_TARGET_MX6SABRESD=y diff --git a/include/configs/mx6qsabreauto.h b/include/configs/mx6qsabreauto.h index d1639c4..e8580e6 100644 --- a/include/configs/mx6qsabreauto.h +++ b/include/configs/mx6qsabreauto.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2012 Freescale Semiconductor, Inc. + * Copyright (C) 2014 Freescale Semiconductor, Inc. * * Configuration settings for the Freescale i.MX6Q SabreAuto board. * @@ -12,13 +12,8 @@ #define CONFIG_MACH_TYPE 3529 #define CONFIG_MXC_UART_BASE UART4_BASE #define CONFIG_CONSOLE_DEV "ttymxc3" -#if defined CONFIG_MX6Q -#define CONFIG_DEFAULT_FDT_FILE "imx6q-sabreauto.dtb" -#elif defined CONFIG_MX6DL -#define CONFIG_DEFAULT_FDT_FILE "imx6dl-sabreauto.dtb" -#endif + #define CONFIG_MMCROOT "/dev/mmcblk0p2" -#define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024)
/* USB Configs */ #define CONFIG_CMD_USB diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index e666ebb..c8ac5aa 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2012 Freescale Semiconductor, Inc. + * Copyright (C) 2014 Freescale Semiconductor, Inc. * * Configuration settings for the Freescale i.MX6Q SabreSD board. * @@ -16,12 +16,6 @@ #define CONFIG_MXC_UART_BASE UART1_BASE #define CONFIG_CONSOLE_DEV "ttymxc0" #define CONFIG_MMCROOT "/dev/mmcblk1p2" -#if defined(CONFIG_MX6Q) -#define CONFIG_DEFAULT_FDT_FILE "imx6q-sabresd.dtb" -#elif defined(CONFIG_MX6DL) -#define CONFIG_DEFAULT_FDT_FILE "imx6dl-sabresd.dtb" -#endif -#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
Rename the imximage.cfg to mx6q.cfg. No function change at all
Signed-off-by: Ye.Li B37916@freescale.com --- Changes since v1: - Use format-patch -M to detect renames - Rework the short log subject
.../mx6qsabreauto/{imximage.cfg => mx6q.cfg} | 2 +- configs/mx6qsabreauto_defconfig | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) rename board/freescale/mx6qsabreauto/{imximage.cfg => mx6q.cfg} (98%)
diff --git a/board/freescale/mx6qsabreauto/imximage.cfg b/board/freescale/mx6qsabreauto/mx6q.cfg similarity index 98% rename from board/freescale/mx6qsabreauto/imximage.cfg rename to board/freescale/mx6qsabreauto/mx6q.cfg index 16bf473..075d51a 100644 --- a/board/freescale/mx6qsabreauto/imximage.cfg +++ b/board/freescale/mx6qsabreauto/mx6q.cfg @@ -1,5 +1,5 @@ /* - * Copyright (C) 2012 Freescale Semiconductor, Inc. + * Copyright (C) 2014 Freescale Semiconductor, Inc. * * SPDX-License-Identifier: GPL-2.0+ * diff --git a/configs/mx6qsabreauto_defconfig b/configs/mx6qsabreauto_defconfig index 25085a9..82b0b8e 100644 --- a/configs/mx6qsabreauto_defconfig +++ b/configs/mx6qsabreauto_defconfig @@ -1,3 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/imximage.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabreauto.dtb",DDR_MB=2048" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/mx6q.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabreauto.dtb",DDR_MB=2048" CONFIG_ARM=y CONFIG_TARGET_MX6QSABREAUTO=y
The i.MX6solo SABRE-SD board configuration has the following difference with i.MX6dl sabre-sd:
- DDR bus width: 32bit - DDR capacity: 512M
Signed-off-by: Ye.Li B37916@freescale.com --- Changes since v1: - Remove the "nosmp" kernel parameter, since kernel can detect cores number by SCU. - Rework the short log subject
board/freescale/mx6sabresd/mx6solo_4x_mt41j128.cfg | 106 ++++++++++++++++++++ configs/mx6solosabresd_defconfig | 3 + include/configs/mx6sabre_common.h | 4 + 3 files changed, 113 insertions(+), 0 deletions(-) create mode 100644 board/freescale/mx6sabresd/mx6solo_4x_mt41j128.cfg create mode 100644 configs/mx6solosabresd_defconfig
diff --git a/board/freescale/mx6sabresd/mx6solo_4x_mt41j128.cfg b/board/freescale/mx6sabresd/mx6solo_4x_mt41j128.cfg new file mode 100644 index 0000000..c886d66 --- /dev/null +++ b/board/freescale/mx6sabresd/mx6solo_4x_mt41j128.cfg @@ -0,0 +1,106 @@ +/* + * Copyright (C) 2014 Freescale Semiconductor, Inc. + * Jason Liu r64343@freescale.com + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM sd + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +DATA 4 0x020e0774 0x000C0000 +DATA 4 0x020e0754 0x00000000 +DATA 4 0x020e04ac 0x00000030 +DATA 4 0x020e04b0 0x00000030 +DATA 4 0x020e0464 0x00000030 +DATA 4 0x020e0490 0x00000030 +DATA 4 0x020e074c 0x00000030 +DATA 4 0x020e0494 0x00000030 +DATA 4 0x020e04a0 0x00000000 +DATA 4 0x020e04b4 0x00000030 +DATA 4 0x020e04b8 0x00000030 +DATA 4 0x020e076c 0x00000030 +DATA 4 0x020e0750 0x00020000 +DATA 4 0x020e04bc 0x00000030 +DATA 4 0x020e04c0 0x00000030 +DATA 4 0x020e04c4 0x00000030 +DATA 4 0x020e04c8 0x00000030 +DATA 4 0x020e0760 0x00020000 +DATA 4 0x020e0764 0x00000030 +DATA 4 0x020e0770 0x00000030 +DATA 4 0x020e0778 0x00000030 +DATA 4 0x020e077c 0x00000030 +DATA 4 0x020e0470 0x00000030 +DATA 4 0x020e0474 0x00000030 +DATA 4 0x020e0478 0x00000030 +DATA 4 0x020e047c 0x00000030 +DATA 4 0x021b0800 0xa1390003 +DATA 4 0x021b080c 0x001F001F +DATA 4 0x021b0810 0x001F001F +DATA 4 0x021b083c 0x42190219 +DATA 4 0x021b0840 0x017B0177 +DATA 4 0x021b0848 0x4B4D4E4D +DATA 4 0x021b0850 0x3F3E2D36 +DATA 4 0x021b081c 0x33333333 +DATA 4 0x021b0820 0x33333333 +DATA 4 0x021b0824 0x33333333 +DATA 4 0x021b0828 0x33333333 +DATA 4 0x021b08b8 0x00000800 +DATA 4 0x021b0004 0x0002002D +DATA 4 0x021b0008 0x00333030 +DATA 4 0x021b000c 0x3F435313 +DATA 4 0x021b0010 0xB66E8B63 +DATA 4 0x021b0014 0x01FF00DB +DATA 4 0x021b0018 0x00001740 +DATA 4 0x021b001c 0x00008000 +DATA 4 0x021b002c 0x000026d2 +DATA 4 0x021b0030 0x00431023 +DATA 4 0x021b0040 0x00000017 +DATA 4 0x021b0000 0x83190000 +DATA 4 0x021b001c 0x04008032 +DATA 4 0x021b001c 0x00008033 +DATA 4 0x021b001c 0x00048031 +DATA 4 0x021b001c 0x05208030 +DATA 4 0x021b001c 0x04008040 +DATA 4 0x021b0020 0x00005800 +DATA 4 0x021b0818 0x00011117 +DATA 4 0x021b0004 0x0002556D +DATA 4 0x021b0404 0x00011006 +DATA 4 0x021b001c 0x00000000 + +/* set the default clock gate to save power */ +DATA 4 0x020c4068 0x00C03F3F +DATA 4 0x020c406c 0x0030FC03 +DATA 4 0x020c4070 0x0FFFC000 +DATA 4 0x020c4074 0x3FF00000 +DATA 4 0x020c4078 0x00FFF300 +DATA 4 0x020c407c 0x0F0000C3 +DATA 4 0x020c4080 0x000003FF + +/* enable AXI cache for VDOA/VPU/IPU */ +DATA 4 0x020e0010 0xF00000CF +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ +DATA 4 0x020e0018 0x007F007F +DATA 4 0x020e001c 0x007F007F diff --git a/configs/mx6solosabresd_defconfig b/configs/mx6solosabresd_defconfig new file mode 100644 index 0000000..d41754d --- /dev/null +++ b/configs/mx6solosabresd_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sabresd/mx6solo_4x_mt41j128.cfg,MX6S,DEFAULT_FDT_FILE="imx6dl-sabresd.dtb",DDR_MB=512" +CONFIG_ARM=y +CONFIG_TARGET_MX6SABRESD=y diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index e59a3b4..cf43404 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -11,6 +11,10 @@
#define CONFIG_MX6
+#ifdef CONFIG_MX6S +#define CONFIG_MX6DL +#endif + #include "mx6_common.h" #include <linux/sizes.h>
This patch is to add the i.MX6solo sabreauto support,
The i.MX6solo sabreauto board configuration has the following difference with i.MX6dl sabreauto:
- DDR bus width: 32bit - DDR capacity: 1024M
Signed-off-by: Ye.Li B37916@freescale.com --- Changes since v1: - Rework the short log subject
board/freescale/mx6qsabreauto/mx6solo.cfg | 106 +++++++++++++++++++++++++++++ configs/mx6solosabreauto_defconfig | 3 + 2 files changed, 109 insertions(+), 0 deletions(-) create mode 100644 board/freescale/mx6qsabreauto/mx6solo.cfg create mode 100644 configs/mx6solosabreauto_defconfig
diff --git a/board/freescale/mx6qsabreauto/mx6solo.cfg b/board/freescale/mx6qsabreauto/mx6solo.cfg new file mode 100644 index 0000000..4311f68 --- /dev/null +++ b/board/freescale/mx6qsabreauto/mx6solo.cfg @@ -0,0 +1,106 @@ +/* + * Copyright (C) 2014 Freescale Semiconductor, Inc. + * Jason Liu r64343@freescale.com + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ +/* image version */ + +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM sd + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +DATA 4 0x020e0774 0x000C0000 +DATA 4 0x020e0754 0x00000000 +DATA 4 0x020e04ac 0x00000030 +DATA 4 0x020e04b0 0x00000030 +DATA 4 0x020e0464 0x00000030 +DATA 4 0x020e0490 0x00000030 +DATA 4 0x020e074c 0x00000030 +DATA 4 0x020e0494 0x00000030 +DATA 4 0x020e04a0 0x00000000 +DATA 4 0x020e04b4 0x00000030 +DATA 4 0x020e04b8 0x00000030 +DATA 4 0x020e076c 0x00000030 +DATA 4 0x020e0750 0x00020000 +DATA 4 0x020e04bc 0x00000028 +DATA 4 0x020e04c0 0x00000028 +DATA 4 0x020e04c4 0x00000028 +DATA 4 0x020e04c8 0x00000028 +DATA 4 0x020e0760 0x00020000 +DATA 4 0x020e0764 0x00000028 +DATA 4 0x020e0770 0x00000028 +DATA 4 0x020e0778 0x00000028 +DATA 4 0x020e077c 0x00000028 +DATA 4 0x020e0470 0x00000028 +DATA 4 0x020e0474 0x00000028 +DATA 4 0x020e0478 0x00000028 +DATA 4 0x020e047c 0x00000028 +DATA 4 0x021b0800 0xa1390003 +DATA 4 0x021b080c 0x001F001F +DATA 4 0x021b0810 0x001F001F +DATA 4 0x021b083c 0x421C0216 +DATA 4 0x021b0840 0x017B017A +DATA 4 0x021b0848 0x4B4A4E4C +DATA 4 0x021b0850 0x3F3F3334 +DATA 4 0x021b081c 0x33333333 +DATA 4 0x021b0820 0x33333333 +DATA 4 0x021b0824 0x33333333 +DATA 4 0x021b0828 0x33333333 +DATA 4 0x021b08b8 0x00000800 +DATA 4 0x021b0004 0x00020025 +DATA 4 0x021b0008 0x00333030 +DATA 4 0x021b000c 0x676B5313 +DATA 4 0x021b0010 0xB66E8B63 +DATA 4 0x021b0014 0x01FF00DB +DATA 4 0x021b0018 0x00001740 +DATA 4 0x021b001c 0x00008000 +DATA 4 0x021b002c 0x000026d2 +DATA 4 0x021b0030 0x006B1023 +DATA 4 0x021b0040 0x00000027 +DATA 4 0x021b0000 0x84190000 +DATA 4 0x021b001c 0x04008032 +DATA 4 0x021b001c 0x00008033 +DATA 4 0x021b001c 0x00048031 +DATA 4 0x021b001c 0x05208030 +DATA 4 0x021b001c 0x04008040 +DATA 4 0x021b0020 0x00005800 +DATA 4 0x021b0818 0x00011117 +DATA 4 0x021b0004 0x00025565 +DATA 4 0x021b0404 0x00011006 +DATA 4 0x021b001c 0x00000000 + +/* set the default clock gate to save power */ +DATA 4 0x020c4068 0x00C03F3F +DATA 4 0x020c406c 0x0030FC03 +DATA 4 0x020c4070 0x0FFFC000 +DATA 4 0x020c4074 0x3FF00000 +DATA 4 0x020c4078 0xFFFFF300 +DATA 4 0x020c407c 0x0F0000C3 +DATA 4 0x020c4080 0x00000FFF + +/* enable AXI cache for VDOA/VPU/IPU */ +DATA 4 0x020e0010 0xF00000CF +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ +DATA 4 0x020e0018 0x007F007F +DATA 4 0x020e001c 0x007F007F diff --git a/configs/mx6solosabreauto_defconfig b/configs/mx6solosabreauto_defconfig new file mode 100644 index 0000000..17610c6 --- /dev/null +++ b/configs/mx6solosabreauto_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/mx6solo.cfg,MX6S,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=1024" +CONFIG_ARM=y +CONFIG_TARGET_MX6QSABREAUTO=y
Hi Stefano,
On 9/9/2014 2:50 PM, Ye.Li wrote:
To support more iMX6 variants,
- Make the DDR size configurable based on the defconfig file
- Make the FDT file configurable based on the defconfig file
Signed-off-by: Ye.Li B37916@freescale.com
Changes since v1:
- Rework the short log subject
board/freescale/mx6qsabreauto/mx6qsabreauto.c | 2 +- board/freescale/mx6sabresd/mx6sabresd.c | 2 +- configs/mx6dlsabreauto_defconfig | 2 +- configs/mx6dlsabresd_defconfig | 2 +- configs/mx6qsabreauto_defconfig | 2 +- configs/mx6qsabresd_defconfig | 2 +- include/configs/mx6qsabreauto.h | 9 ++------- include/configs/mx6sabresd.h | 8 +------- 8 files changed, 9 insertions(+), 20 deletions(-)
diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c index 928dadf..bfb9b6a 100644 --- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c +++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c @@ -45,7 +45,7 @@ DECLARE_GLOBAL_DATA_PTR;
int dram_init(void) {
- gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
gd->ram_size = (phys_size_t)CONFIG_DDR_MB * 1024 * 1024;
return 0;
} diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index 80c8ebd..5f65f1b 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -53,7 +53,7 @@ DECLARE_GLOBAL_DATA_PTR;
int dram_init(void) {
- gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
gd->ram_size = (phys_size_t)CONFIG_DDR_MB * 1024 * 1024;
return 0;
} diff --git a/configs/mx6dlsabreauto_defconfig b/configs/mx6dlsabreauto_defconfig index b649935..ce755d1 100644 --- a/configs/mx6dlsabreauto_defconfig +++ b/configs/mx6dlsabreauto_defconfig @@ -1,3 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6DL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6DL,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=2048" CONFIG_ARM=y CONFIG_TARGET_MX6QSABREAUTO=y diff --git a/configs/mx6dlsabresd_defconfig b/configs/mx6dlsabresd_defconfig index 9ce960e..b8e6d29 100644 --- a/configs/mx6dlsabresd_defconfig +++ b/configs/mx6dlsabresd_defconfig @@ -1,3 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL,DEFAULT_FDT_FILE="imx6dl-sabresd.dtb",DDR_MB=1024" CONFIG_ARM=y CONFIG_TARGET_MX6SABRESD=y diff --git a/configs/mx6qsabreauto_defconfig b/configs/mx6qsabreauto_defconfig index 7d86700..25085a9 100644 --- a/configs/mx6qsabreauto_defconfig +++ b/configs/mx6qsabreauto_defconfig @@ -1,3 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/imximage.cfg,MX6Q" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/imximage.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabreauto.dtb",DDR_MB=2048" CONFIG_ARM=y CONFIG_TARGET_MX6QSABREAUTO=y diff --git a/configs/mx6qsabresd_defconfig b/configs/mx6qsabresd_defconfig index dc8e254..edfb988 100644 --- a/configs/mx6qsabresd_defconfig +++ b/configs/mx6qsabresd_defconfig @@ -1,3 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabresd.dtb",DDR_MB=1024" CONFIG_ARM=y CONFIG_TARGET_MX6SABRESD=y diff --git a/include/configs/mx6qsabreauto.h b/include/configs/mx6qsabreauto.h index d1639c4..e8580e6 100644 --- a/include/configs/mx6qsabreauto.h +++ b/include/configs/mx6qsabreauto.h @@ -1,5 +1,5 @@ /*
- Copyright (C) 2012 Freescale Semiconductor, Inc.
- Copyright (C) 2014 Freescale Semiconductor, Inc.
- Configuration settings for the Freescale i.MX6Q SabreAuto board.
@@ -12,13 +12,8 @@ #define CONFIG_MACH_TYPE 3529 #define CONFIG_MXC_UART_BASE UART4_BASE #define CONFIG_CONSOLE_DEV "ttymxc3" -#if defined CONFIG_MX6Q -#define CONFIG_DEFAULT_FDT_FILE "imx6q-sabreauto.dtb" -#elif defined CONFIG_MX6DL -#define CONFIG_DEFAULT_FDT_FILE "imx6dl-sabreauto.dtb" -#endif
#define CONFIG_MMCROOT "/dev/mmcblk0p2" -#define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024)
/* USB Configs */ #define CONFIG_CMD_USB diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index e666ebb..c8ac5aa 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -1,5 +1,5 @@ /*
- Copyright (C) 2012 Freescale Semiconductor, Inc.
- Copyright (C) 2014 Freescale Semiconductor, Inc.
- Configuration settings for the Freescale i.MX6Q SabreSD board.
@@ -16,12 +16,6 @@ #define CONFIG_MXC_UART_BASE UART1_BASE #define CONFIG_CONSOLE_DEV "ttymxc0" #define CONFIG_MMCROOT "/dev/mmcblk1p2" -#if defined(CONFIG_MX6Q) -#define CONFIG_DEFAULT_FDT_FILE "imx6q-sabresd.dtb" -#elif defined(CONFIG_MX6DL) -#define CONFIG_DEFAULT_FDT_FILE "imx6dl-sabresd.dtb" -#endif -#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
Could you help to review this patch set? It is pending for long time.
Best regards, Ye Li
participants (2)
-
Li Ye-B37916 -
Ye.Li