[U-Boot] [PATCH v2] powerpc/t1024: add serdes protocol 0x40 and 0x5f

Add serdes protocol 0x40 and 0x5f.
Signed-off-by: Shengzhou Liu Shengzhou.Liu@freescale.com --- v2: fix a typo.
arch/powerpc/cpu/mpc85xx/t1024_serdes.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/cpu/mpc85xx/t1024_serdes.c b/arch/powerpc/cpu/mpc85xx/t1024_serdes.c index 7dc8385..2ba314a 100644 --- a/arch/powerpc/cpu/mpc85xx/t1024_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/t1024_serdes.c @@ -11,6 +11,7 @@
static u8 serdes_cfg_tbl[][4] = { + [0x40] = {PCIE1, PCIE1, PCIE1, PCIE1}, [0xD5] = {QSGMII_FM1_A, PCIE3, PCIE2, PCIE1}, [0xD6] = {QSGMII_FM1_A, PCIE3, PCIE2, SATA1}, [0x95] = {XFI_FM1_MAC1, PCIE3, PCIE2, PCIE1}, @@ -20,6 +21,7 @@ static u8 serdes_cfg_tbl[][4] = { [0x56] = {PCIE1, PCIE3, PCIE2, SATA1}, [0x5A] = {PCIE1, PCIE3, SGMII_FM1_DTSEC2, SATA1}, [0x5B] = {PCIE1, PCIE3, SGMII_FM1_DTSEC2, SGMII_FM1_DTSEC1}, + [0x5F] = {PCIE1, PCIE3, SGMII_2500_FM1_DTSEC2, SGMII_2500_FM1_DTSEC1}, [0x6A] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC2, SATA1}, [0x6B] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC2, SGMII_FM1_DTSEC1}, [0x6F] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_2500_FM1_DTSEC2,

On 12/17/2014 01:38 AM, Shengzhou Liu wrote:
Add serdes protocol 0x40 and 0x5f.
Signed-off-by: Shengzhou Liu Shengzhou.Liu@freescale.com
v2: fix a typo.
Applied to u-boot-mpc85xx master branch, awaiting upstream.
York
participants (2)
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Shengzhou Liu
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York Sun