[U-Boot] [PATCH 0/5] QSPI: Falcon or single stage boot mode support

This patch series fixes the Falcon or single stage boot mode for dra7xx platform.
FDT fixup is added to update the memory DT node based DDR configuration for specific platform.
Test verfied on dra7xx paltforms.
Lokesh Vutla (2): spl: reorder the assignment of board info to global data arch: arm: omap: Declare size of ddr very early
Ravi Babu (3): qspi: dra7xx: enable qspi-boot for dra7x paltform spl: fdt: support for fdt fixup for falcon boot boot: fdt: fixup the memory dt nodes falcon boot
arch/arm/lib/Makefile | 1 + arch/arm/lib/bootm-fdt.c | 7 ++++++- arch/arm/mach-omap2/am33xx/board.c | 4 ++++ arch/arm/mach-omap2/hwinit-common.c | 1 + common/Makefile | 2 +- common/spl/spl.c | 42 ++++++++++++++++++++++++++++++++++++- configs/dra7xx_evm_defconfig | 6 ++++++ 7 files changed, 60 insertions(+), 3 deletions(-)

From: Lokesh Vutla lokeshvutla@ti.com
Move the assignment of board info to global data a bit early which is safe, so that ram details can be used to enable caches.
Signed-off-by: Lokesh Vutla lokeshvutla@ti.com Signed-off-by: Ravi Babu ravibabu@ti.com --- common/spl/spl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common/spl/spl.c b/common/spl/spl.c index a3e73b8..f11b370 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -322,6 +322,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2) struct spl_image_info spl_image;
debug(">>spl:board_init_r()\n"); + gd->bd = &bdata;
#if defined(CONFIG_SYS_SPL_MALLOC_START) mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START, @@ -383,7 +384,6 @@ void board_init_r(gd_t *dummy1, ulong dummy2) */ void preloader_console_init(void) { - gd->bd = &bdata; gd->baudrate = CONFIG_BAUDRATE;
serial_init(); /* serial communications setup */

Hi Ravi,
From: Lokesh Vutla lokeshvutla@ti.com
Move the assignment of board info to global data a bit early which is safe, so that ram details can be used to enable caches.
Signed-off-by: Lokesh Vutla lokeshvutla@ti.com Signed-off-by: Ravi Babu ravibabu@ti.com
common/spl/spl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common/spl/spl.c b/common/spl/spl.c index a3e73b8..f11b370 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -322,6 +322,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2) struct spl_image_info spl_image;
debug(">>spl:board_init_r()\n");
- gd->bd = &bdata;
#if defined(CONFIG_SYS_SPL_MALLOC_START) mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START, @@ -383,7 +384,6 @@ void board_init_r(gd_t *dummy1, ulong dummy2) */ void preloader_console_init(void) {
gd->bd = &bdata; gd->baudrate = CONFIG_BAUDRATE;
serial_init(); /* serial communications setup
*/
Reviewed-by: Lukasz Majewski lukma@denx.de
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de

On Tue, Apr 18, 2017 at 05:27:23PM +0530, Ravi Babu wrote:
From: Lokesh Vutla lokeshvutla@ti.com
Move the assignment of board info to global data a bit early which is safe, so that ram details can be used to enable caches.
Signed-off-by: Lokesh Vutla lokeshvutla@ti.com Signed-off-by: Ravi Babu ravibabu@ti.com
Reviewed-by: Tom Rini trini@konsulko.com

On Tue, Apr 18, 2017 at 05:27:23PM +0530, B, Ravi wrote:
From: Lokesh Vutla lokeshvutla@ti.com
Move the assignment of board info to global data a bit early which is safe, so that ram details can be used to enable caches.
Signed-off-by: Lokesh Vutla lokeshvutla@ti.com Signed-off-by: Ravi Babu ravibabu@ti.com Reviewed-by: Lukasz Majewski lukma@denx.de Reviewed-by: Tom Rini trini@konsulko.com
Applied to u-boot/master, thanks!

On 04/18/2017 04:57 AM, B, Ravi wrote:
From: Lokesh Vutla lokeshvutla@ti.com
Move the assignment of board info to global data a bit early which is safe, so that ram details can be used to enable caches.
Signed-off-by: Lokesh Vutla lokeshvutla@ti.com Signed-off-by: Ravi Babu ravibabu@ti.com Reviewed-by: Lukasz Majewski lukma@denx.de Reviewed-by: Tom Rini trini@konsulko.com
common/spl/spl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common/spl/spl.c b/common/spl/spl.c index a3e73b8..f11b370 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -322,6 +322,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2) struct spl_image_info spl_image;
debug(">>spl:board_init_r()\n");
gd->bd = &bdata;
#if defined(CONFIG_SYS_SPL_MALLOC_START) mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START,
@@ -383,7 +384,6 @@ void board_init_r(gd_t *dummy1, ulong dummy2) */ void preloader_console_init(void) {
gd->bd = &bdata; gd->baudrate = CONFIG_BAUDRATE;
serial_init(); /* serial communications setup */
Guys,
I have a crash for SPL boot on at least two platforms. Git bisect points to this change. I have confirmed reverting this commit fixes my crash.
I don't quite understand the change. The commit message says to move the assignment a bit early. However, the preloader_console_init() is called during board_init_f() for many boards. This change actually moves it much later. Do I get it backward?
York

From: Lokesh Vutla lokeshvutla@ti.com
Declare the size of ddr very early in spl, so that this can be used to enable cache.
Signed-off-by: Lokesh Vutla lokeshvutla@ti.com Signed-off-by: Ravi Babu ravibabu@ti.com --- arch/arm/mach-omap2/am33xx/board.c | 4 ++++ arch/arm/mach-omap2/hwinit-common.c | 1 + 2 files changed, 5 insertions(+)
diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c index 2bfc864..568f36f 100644 --- a/arch/arm/mach-omap2/am33xx/board.c +++ b/arch/arm/mach-omap2/am33xx/board.c @@ -327,6 +327,10 @@ void board_init_f(ulong dummy) early_system_init(); board_early_init_f(); sdram_init(); + /* dram_init must store complete ramsize in gd->ram_size */ + gd->ram_size = get_ram_size( + (void *)CONFIG_SYS_SDRAM_BASE, + CONFIG_MAX_RAM_BANK_SIZE); } #endif
diff --git a/arch/arm/mach-omap2/hwinit-common.c b/arch/arm/mach-omap2/hwinit-common.c index f317293..cac3274 100644 --- a/arch/arm/mach-omap2/hwinit-common.c +++ b/arch/arm/mach-omap2/hwinit-common.c @@ -171,6 +171,7 @@ void board_init_f(ulong dummy) #endif /* For regular u-boot sdram_init() is called from dram_init() */ sdram_init(); + gd->ram_size = omap_sdram_size(); } #endif

Hi Ravi,
From: Lokesh Vutla lokeshvutla@ti.com
Declare the size of ddr very early in spl, so that this can be used to enable cache.
Signed-off-by: Lokesh Vutla lokeshvutla@ti.com Signed-off-by: Ravi Babu ravibabu@ti.com
arch/arm/mach-omap2/am33xx/board.c | 4 ++++ arch/arm/mach-omap2/hwinit-common.c | 1 + 2 files changed, 5 insertions(+)
diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c index 2bfc864..568f36f 100644 --- a/arch/arm/mach-omap2/am33xx/board.c +++ b/arch/arm/mach-omap2/am33xx/board.c @@ -327,6 +327,10 @@ void board_init_f(ulong dummy) early_system_init(); board_early_init_f(); sdram_init();
- /* dram_init must store complete ramsize in gd->ram_size */
- gd->ram_size = get_ram_size(
(void *)CONFIG_SYS_SDRAM_BASE,
CONFIG_MAX_RAM_BANK_SIZE);
The above call is a bit strange, since the sdram_init() function sets the DDR (EMIF) controller to use the whole SDRAM available.
Why one cannot take this info directly from EMIF controller?
} #endif
diff --git a/arch/arm/mach-omap2/hwinit-common.c b/arch/arm/mach-omap2/hwinit-common.c index f317293..cac3274 100644 --- a/arch/arm/mach-omap2/hwinit-common.c +++ b/arch/arm/mach-omap2/hwinit-common.c @@ -171,6 +171,7 @@ void board_init_f(ulong dummy) #endif /* For regular u-boot sdram_init() is called from dram_init() */ sdram_init();
- gd->ram_size = omap_sdram_size();
} #endif
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de

Hi
diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c index 2bfc864..568f36f 100644 --- a/arch/arm/mach-omap2/am33xx/board.c +++ b/arch/arm/mach-omap2/am33xx/board.c @@ -327,6 +327,10 @@ void board_init_f(ulong dummy) early_system_init(); board_early_init_f(); sdram_init();
- /* dram_init must store complete ramsize in gd->ram_size */
- gd->ram_size = get_ram_size(
(void *)CONFIG_SYS_SDRAM_BASE,
CONFIG_MAX_RAM_BANK_SIZE);
The above call is a bit strange, since the sdram_init() function sets the DDR (EMIF) controller to use the whole SDRAM available.
Why one cannot take this info directly from EMIF controller?
Lokesh, Can you comment for am335x ?
Regards Ravi

On Tuesday 18 April 2017 07:03 PM, Lukasz Majewski wrote:
Hi Ravi,
From: Lokesh Vutla lokeshvutla@ti.com
Declare the size of ddr very early in spl, so that this can be used to enable cache.
Signed-off-by: Lokesh Vutla lokeshvutla@ti.com Signed-off-by: Ravi Babu ravibabu@ti.com
arch/arm/mach-omap2/am33xx/board.c | 4 ++++ arch/arm/mach-omap2/hwinit-common.c | 1 + 2 files changed, 5 insertions(+)
diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c index 2bfc864..568f36f 100644 --- a/arch/arm/mach-omap2/am33xx/board.c +++ b/arch/arm/mach-omap2/am33xx/board.c @@ -327,6 +327,10 @@ void board_init_f(ulong dummy) early_system_init(); board_early_init_f(); sdram_init();
- /* dram_init must store complete ramsize in gd->ram_size */
- gd->ram_size = get_ram_size(
(void *)CONFIG_SYS_SDRAM_BASE,
CONFIG_MAX_RAM_BANK_SIZE);
The above call is a bit strange, since the sdram_init() function sets the DDR (EMIF) controller to use the whole SDRAM available.
Why one cannot take this info directly from EMIF controller?
I guess you are talking about calling omap_sdram_size() which uses DMM to determine the DDR mapped sections. There is no DMM for amx3xx SoCs. Also get_ram_size() checks memory range for valid RAM. A simple memory test determines the actually available RAM size between addresses `base' and `base + maxsize' and widely being used by entire U-Boot.
Thanks and regards, Lokesh

On Tue, Apr 18, 2017 at 05:27:24PM +0530, B, Ravi wrote:
From: Lokesh Vutla lokeshvutla@ti.com
Declare the size of ddr very early in spl, so that this can be used to enable cache.
Signed-off-by: Lokesh Vutla lokeshvutla@ti.com Signed-off-by: Ravi Babu ravibabu@ti.com
Applied to u-boot/master, thanks!

Enables qspi boot configuration for dra7xx platform.
Signed-off-by: Ravi Babu ravibabu@ti.com --- configs/dra7xx_evm_defconfig | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index 42f87b3..c510146 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -59,6 +59,12 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIST="dra7-evm dra72-evm dra72-evm-revc dra71-evm" CONFIG_DM=y CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_OF_TRANSLATE=y # CONFIG_BLK is not set CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y

Hi Ravi,
Enables qspi boot configuration for dra7xx platform.
Signed-off-by: Ravi Babu ravibabu@ti.com
configs/dra7xx_evm_defconfig | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index 42f87b3..c510146 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -59,6 +59,12 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIST="dra7-evm dra72-evm dra72-evm-revc dra71-evm" CONFIG_DM=y CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_OF_TRANSLATE=y # CONFIG_BLK is not set CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y
Reviewed-by: Lukasz Majewski lukma@denx.de
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de

On Tue, Apr 18, 2017 at 05:27:25PM +0530, B, Ravi wrote:
Enables qspi boot configuration for dra7xx platform.
Signed-off-by: Ravi Babu ravibabu@ti.com Reviewed-by: Lukasz Majewski lukma@denx.de
Applied to u-boot/master, thanks!

Adding support for fdt fixup to update the memory node in device tree for falcon boot.
This is needed for single stage or falcon bootmode, to pass memory configuration to kernel through DT memory node.
Signed-off-by: Ravi Babu ravibabu@ti.com --- arch/arm/lib/Makefile | 1 + arch/arm/lib/bootm-fdt.c | 7 ++++++- common/Makefile | 2 +- 3 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 6e96cfb..53d4ed2 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -33,6 +33,7 @@ obj-$(CONFIG_SYS_L2_PL310) += cache-pl310.o else obj-$(CONFIG_SPL_FRAMEWORK) += spl.o obj-$(CONFIG_SPL_FRAMEWORK) += zimage.o +obj-$(CONFIG_OF_LIBFDT) += bootm-fdt.o endif obj-$(CONFIG_$(SPL_)USE_ARCH_MEMSET) += memset.o obj-$(CONFIG_$(SPL_)USE_ARCH_MEMCPY) += memcpy.o diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c index d84789c..eaa817b 100644 --- a/arch/arm/lib/bootm-fdt.c +++ b/arch/arm/lib/bootm-fdt.c @@ -27,8 +27,10 @@ DECLARE_GLOBAL_DATA_PTR;
int arch_fixup_fdt(void *blob) { + int ret = 0; +#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_OF_LIBFDT) bd_t *bd = gd->bd; - int bank, ret; + int bank; u64 start[CONFIG_NR_DRAM_BANKS]; u64 size[CONFIG_NR_DRAM_BANKS];
@@ -42,9 +44,11 @@ int arch_fixup_fdt(void *blob) #endif }
+#ifdef CONFIG_OF_LIBFDT ret = fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS); if (ret) return ret; +#endif
#ifdef CONFIG_ARMV8_SPIN_TABLE ret = spin_table_update_dt(blob); @@ -58,6 +62,7 @@ int arch_fixup_fdt(void *blob) if (ret) return ret; #endif +#endif
return 0; } diff --git a/common/Makefile b/common/Makefile index 86225f1..bcd2486 100644 --- a/common/Makefile +++ b/common/Makefile @@ -95,7 +95,7 @@ obj-$(CONFIG_SPL_HASH_SUPPORT) += hash.o obj-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o obj-$(CONFIG_SPL_YMODEM_SUPPORT) += xyzModem.o obj-$(CONFIG_SPL_NET_SUPPORT) += miiphyutil.o -obj-$(CONFIG_SPL_OF_TRANSLATE) += fdt_support.o +obj-$(CONFIG_SPL_OF_LIBFDT) += fdt_support.o ifdef CONFIG_SPL_USB_HOST_SUPPORT obj-$(CONFIG_SPL_USB_SUPPORT) += usb.o usb_hub.o obj-$(CONFIG_USB_STORAGE) += usb_storage.o

Hi Ravi,
Adding support for fdt fixup to update the memory node in device tree for falcon boot.
This is needed for single stage or falcon bootmode, to pass memory configuration to kernel through DT memory node.
Signed-off-by: Ravi Babu ravibabu@ti.com
arch/arm/lib/Makefile | 1 + arch/arm/lib/bootm-fdt.c | 7 ++++++- common/Makefile | 2 +- 3 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 6e96cfb..53d4ed2 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -33,6 +33,7 @@ obj-$(CONFIG_SYS_L2_PL310) += cache-pl310.o else obj-$(CONFIG_SPL_FRAMEWORK) += spl.o obj-$(CONFIG_SPL_FRAMEWORK) += zimage.o +obj-$(CONFIG_OF_LIBFDT) += bootm-fdt.o endif obj-$(CONFIG_$(SPL_)USE_ARCH_MEMSET) += memset.o obj-$(CONFIG_$(SPL_)USE_ARCH_MEMCPY) += memcpy.o diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c index d84789c..eaa817b 100644 --- a/arch/arm/lib/bootm-fdt.c +++ b/arch/arm/lib/bootm-fdt.c @@ -27,8 +27,10 @@ DECLARE_GLOBAL_DATA_PTR;
int arch_fixup_fdt(void *blob) {
- int ret = 0;
+#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_OF_LIBFDT) bd_t *bd = gd->bd;
- int bank, ret;
- int bank; u64 start[CONFIG_NR_DRAM_BANKS]; u64 size[CONFIG_NR_DRAM_BANKS];
@@ -42,9 +44,11 @@ int arch_fixup_fdt(void *blob) #endif }
+#ifdef CONFIG_OF_LIBFDT ret = fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS); if (ret) return ret; +#endif
#ifdef CONFIG_ARMV8_SPIN_TABLE ret = spin_table_update_dt(blob); @@ -58,6 +62,7 @@ int arch_fixup_fdt(void *blob) if (ret) return ret; #endif +#endif
return 0; } diff --git a/common/Makefile b/common/Makefile index 86225f1..bcd2486 100644 --- a/common/Makefile +++ b/common/Makefile @@ -95,7 +95,7 @@ obj-$(CONFIG_SPL_HASH_SUPPORT) += hash.o obj-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o obj-$(CONFIG_SPL_YMODEM_SUPPORT) += xyzModem.o obj-$(CONFIG_SPL_NET_SUPPORT) += miiphyutil.o -obj-$(CONFIG_SPL_OF_TRANSLATE) += fdt_support.o +obj-$(CONFIG_SPL_OF_LIBFDT) += fdt_support.o ifdef CONFIG_SPL_USB_HOST_SUPPORT obj-$(CONFIG_SPL_USB_SUPPORT) += usb.o usb_hub.o obj-$(CONFIG_USB_STORAGE) += usb_storage.o
Reviewed-by: Lukasz Majewski lukma@denx.de
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de

On Tue, Apr 18, 2017 at 05:27:26PM +0530, B, Ravi wrote:
Adding support for fdt fixup to update the memory node in device tree for falcon boot.
This is needed for single stage or falcon bootmode, to pass memory configuration to kernel through DT memory node.
Signed-off-by: Ravi Babu ravibabu@ti.com Reviewed-by: Lukasz Majewski lukma@denx.de
Applied to u-boot/master, thanks!

In single stage bootmode or falcon boot mode, the SPL shall update the memory dt nodes spl_fixup_fdt() based on DDR configuration for specific platform.
Signed-off-by: Ravi Babu ravibabu@ti.com --- common/spl/spl.c | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+)
diff --git a/common/spl/spl.c b/common/spl/spl.c index f11b370..b9b1331 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -17,6 +17,7 @@ #include <malloc.h> #include <dm/root.h> #include <linux/compiler.h> +#include <fdt_support.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -56,6 +57,14 @@ __weak int spl_start_uboot(void) return 1; }
+/* weak default platform specific function to initialize + * dram banks + */ +__weak int dram_init_banksize(void) +{ + return 0; +} + /* * Weak default function for arch specific zImage check. Return zero * and fill start and end address if image is recognized. @@ -66,6 +75,33 @@ int __weak bootz_setup(ulong image, ulong *start, ulong *end) } #endif
+void spl_fixup_fdt(void) +{ +#if defined(CONFIG_SPL_OF_LIBFDT) && defined(CONFIG_SYS_SPL_ARGS_ADDR) + void *fdt_blob = (void *)CONFIG_SYS_SPL_ARGS_ADDR; + int err; + + err = fdt_check_header(fdt_blob); + if (err < 0) { + printf("fdt_root: %s\n", fdt_strerror(err)); + return; + } + + /* fixup the memory dt node */ + err = fdt_shrink_to_minimum(fdt_blob, 0); + if (err == 0) { + printf("spl: fdt_shrink_to_minimum err - %d\n", err); + return; + } + + err = arch_fixup_fdt(fdt_blob); + if (err) { + printf("spl: arch_fixup_fdt err - %d\n", err); + return; + } +#endif +} + /* * Weak default function for board specific cleanup/preparation before * Linux boot. Some boards/platforms might not need it, so just provide @@ -323,6 +359,9 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
debug(">>spl:board_init_r()\n"); gd->bd = &bdata; +#ifdef CONFIG_SPL_OS_BOOT + dram_init_banksize(); +#endif
#if defined(CONFIG_SYS_SPL_MALLOC_START) mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START, @@ -361,6 +400,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2) #ifdef CONFIG_SPL_OS_BOOT case IH_OS_LINUX: debug("Jumping to Linux\n"); + spl_fixup_fdt(); spl_board_prepare_for_linux(); jump_to_image_linux(&spl_image, (void *)CONFIG_SYS_SPL_ARGS_ADDR);

Hi Ravi,
In single stage bootmode or falcon boot mode, the SPL shall update the memory dt nodes spl_fixup_fdt() based on DDR configuration for specific platform.
Signed-off-by: Ravi Babu ravibabu@ti.com
common/spl/spl.c | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+)
diff --git a/common/spl/spl.c b/common/spl/spl.c index f11b370..b9b1331 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -17,6 +17,7 @@ #include <malloc.h> #include <dm/root.h> #include <linux/compiler.h> +#include <fdt_support.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -56,6 +57,14 @@ __weak int spl_start_uboot(void) return 1; }
+/* weak default platform specific function to initialize
- dram banks
- */
+__weak int dram_init_banksize(void) +{
- return 0;
+}
/*
- Weak default function for arch specific zImage check. Return zero
- and fill start and end address if image is recognized.
@@ -66,6 +75,33 @@ int __weak bootz_setup(ulong image, ulong *start, ulong *end) } #endif
+void spl_fixup_fdt(void) +{ +#if defined(CONFIG_SPL_OF_LIBFDT) && defined(CONFIG_SYS_SPL_ARGS_ADDR)
- void *fdt_blob = (void *)CONFIG_SYS_SPL_ARGS_ADDR;
- int err;
- err = fdt_check_header(fdt_blob);
- if (err < 0) {
printf("fdt_root: %s\n", fdt_strerror(err));
return;
- }
- /* fixup the memory dt node */
- err = fdt_shrink_to_minimum(fdt_blob, 0);
- if (err == 0) {
printf("spl: fdt_shrink_to_minimum err - %d\n", err);
return;
- }
- err = arch_fixup_fdt(fdt_blob);
- if (err) {
printf("spl: arch_fixup_fdt err - %d\n", err);
return;
- }
+#endif +}
/*
- Weak default function for board specific cleanup/preparation
before
- Linux boot. Some boards/platforms might not need it, so just
provide @@ -323,6 +359,9 @@ void board_init_r(gd_t *dummy1, ulong dummy2) debug(">>spl:board_init_r()\n"); gd->bd = &bdata; +#ifdef CONFIG_SPL_OS_BOOT
- dram_init_banksize();
What is the purpose of this function? In this point the SDRAM should be already configured.
In patch 2/5 you already configured TI's specific "board_init_f" to add some memory related information to gd struct.
+#endif
#if defined(CONFIG_SYS_SPL_MALLOC_START) mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START, @@ -361,6 +400,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2) #ifdef CONFIG_SPL_OS_BOOT case IH_OS_LINUX: debug("Jumping to Linux\n");
spl_board_prepare_for_linux(); jump_to_image_linux(&spl_image, (voidspl_fixup_fdt();
*)CONFIG_SYS_SPL_ARGS_ADDR);
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de

Hi Lukasz
/*
- Weak default function for board specific cleanup/preparation
before
- Linux boot. Some boards/platforms might not need it, so just
provide @@ -323,6 +359,9 @@ void board_init_r(gd_t *dummy1, ulong dummy2) debug(">>spl:board_init_r()\n"); gd->bd = &bdata; +#ifdef CONFIG_SPL_OS_BOOT
- dram_init_banksize();
What is the purpose of this function? In this point the SDRAM should be already configured.
Lokesh can comment more on this.
AFAIK, the dram_init_bankszie() is platform specific function to populate the dram banks (start address & size). For dra7xx its defined in board/ti/dra7xx/evm.c.
In patch 2/5 you already configured TI's specific "board_init_f" to add some memory related information to gd struct.
I think board_init_f() is for u-boot right ?
Regards Ravi

Hi Lukasz,
On Tuesday 18 April 2017 06:55 PM, Lukasz Majewski wrote:
Hi Ravi,
In single stage bootmode or falcon boot mode, the SPL shall update the memory dt nodes spl_fixup_fdt() based on DDR configuration for specific platform.
Signed-off-by: Ravi Babu ravibabu@ti.com
common/spl/spl.c | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+)
diff --git a/common/spl/spl.c b/common/spl/spl.c index f11b370..b9b1331 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -17,6 +17,7 @@ #include <malloc.h> #include <dm/root.h> #include <linux/compiler.h> +#include <fdt_support.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -56,6 +57,14 @@ __weak int spl_start_uboot(void) return 1; }
+/* weak default platform specific function to initialize
- dram banks
- */
+__weak int dram_init_banksize(void) +{
- return 0;
+}
/*
- Weak default function for arch specific zImage check. Return zero
- and fill start and end address if image is recognized.
@@ -66,6 +75,33 @@ int __weak bootz_setup(ulong image, ulong *start, ulong *end) } #endif
+void spl_fixup_fdt(void) +{ +#if defined(CONFIG_SPL_OF_LIBFDT) && defined(CONFIG_SYS_SPL_ARGS_ADDR)
- void *fdt_blob = (void *)CONFIG_SYS_SPL_ARGS_ADDR;
- int err;
- err = fdt_check_header(fdt_blob);
- if (err < 0) {
printf("fdt_root: %s\n", fdt_strerror(err));
return;
- }
- /* fixup the memory dt node */
- err = fdt_shrink_to_minimum(fdt_blob, 0);
- if (err == 0) {
printf("spl: fdt_shrink_to_minimum err - %d\n", err);
return;
- }
- err = arch_fixup_fdt(fdt_blob);
- if (err) {
printf("spl: arch_fixup_fdt err - %d\n", err);
return;
- }
+#endif +}
/*
- Weak default function for board specific cleanup/preparation
before
- Linux boot. Some boards/platforms might not need it, so just
provide @@ -323,6 +359,9 @@ void board_init_r(gd_t *dummy1, ulong dummy2) debug(">>spl:board_init_r()\n"); gd->bd = &bdata; +#ifdef CONFIG_SPL_OS_BOOT
- dram_init_banksize();
What is the purpose of this function? In this point the SDRAM should be already configured.
So dram_init_banksize() initializes each base address and size of each bank. Before jumping to kernel, these values will be used to update memory nodes in DT(done by arch_fixup_fdt()). This is how it is being done in U-boot as well.
Thanks and regards, Lokesh
In patch 2/5 you already configured TI's specific "board_init_f" to add some memory related information to gd struct.
+#endif
#if defined(CONFIG_SYS_SPL_MALLOC_START) mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START, @@ -361,6 +400,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2) #ifdef CONFIG_SPL_OS_BOOT case IH_OS_LINUX: debug("Jumping to Linux\n");
spl_board_prepare_for_linux(); jump_to_image_linux(&spl_image, (voidspl_fixup_fdt();
*)CONFIG_SYS_SPL_ARGS_ADDR);
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot

On Tue, Apr 18, 2017 at 05:27:27PM +0530, B, Ravi wrote:
In single stage bootmode or falcon boot mode, the SPL shall update the memory dt nodes spl_fixup_fdt() based on DDR configuration for specific platform.
Signed-off-by: Ravi Babu ravibabu@ti.com
Applied to u-boot/master, thanks!

On 04/18/2017 04:57 AM, B, Ravi wrote:
In single stage bootmode or falcon boot mode, the SPL shall update the memory dt nodes spl_fixup_fdt() based on DDR configuration for specific platform.
Signed-off-by: Ravi Babu ravibabu@ti.com
common/spl/spl.c | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+)
Clearly I am late for this thread. I only notice this change when I try to merge my FIT improvement for falcon boot.
Why do we need to fixup the device tree for falcon boot at all? The device tree is static, saved as argument when exporting it, isn't it? As far as the normal boot fixes up the device tree, the exported device tree is correct.
York

On Wed, Aug 02, 2017 at 07:10:51PM +0000, York Sun wrote:
On 04/18/2017 04:57 AM, B, Ravi wrote:
In single stage bootmode or falcon boot mode, the SPL shall update the memory dt nodes spl_fixup_fdt() based on DDR configuration for specific platform.
Signed-off-by: Ravi Babu ravibabu@ti.com
common/spl/spl.c | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+)
Clearly I am late for this thread. I only notice this change when I try to merge my FIT improvement for falcon boot.
Why do we need to fixup the device tree for falcon boot at all? The device tree is static, saved as argument when exporting it, isn't it? As far as the normal boot fixes up the device tree, the exported device tree is correct.
So, the further argument here is that if you have to edit the dts to include a valid amount of memory so that the dtb the kernel spits out is useful in falcon mode, it's not at all useful in development.

On Thu, Aug 3, 2017 at 1:02 AM, Tom Rini trini@konsulko.com wrote:
On Wed, Aug 02, 2017 at 07:10:51PM +0000, York Sun wrote:
On 04/18/2017 04:57 AM, B, Ravi wrote:
In single stage bootmode or falcon boot mode, the SPL shall update the memory dt nodes spl_fixup_fdt() based on DDR configuration for specific platform.
Signed-off-by: Ravi Babu ravibabu@ti.com
common/spl/spl.c | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+)
Clearly I am late for this thread. I only notice this change when I try to merge my FIT improvement for falcon boot.
Why do we need to fixup the device tree for falcon boot at all? The device tree is static, saved as argument when exporting it, isn't it? As far as the normal boot fixes up the device tree, the exported device tree is correct.
So, the further argument here is that if you have to edit the dts to include a valid amount of memory so that the dtb the kernel spits out is useful in falcon mode, it's not at all useful in development.
Anyone noticed! this change is breaking falcon mode (tried in i.MX6 and rk3288) even if we forcibly disable CONFIG_SPL_OF_LIBFDT the SPL need to revert back to use SPL_OF_PLATDATA.
thanks!

On 08/26/2017 04:50 AM, Jagan Teki wrote:
On Thu, Aug 3, 2017 at 1:02 AM, Tom Rini trini@konsulko.com wrote:
On Wed, Aug 02, 2017 at 07:10:51PM +0000, York Sun wrote:
On 04/18/2017 04:57 AM, B, Ravi wrote:
In single stage bootmode or falcon boot mode, the SPL shall update the memory dt nodes spl_fixup_fdt() based on DDR configuration for specific platform.
Signed-off-by: Ravi Babu ravibabu@ti.com
common/spl/spl.c | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+)
Clearly I am late for this thread. I only notice this change when I try to merge my FIT improvement for falcon boot.
Why do we need to fixup the device tree for falcon boot at all? The device tree is static, saved as argument when exporting it, isn't it? As far as the normal boot fixes up the device tree, the exported device tree is correct.
So, the further argument here is that if you have to edit the dts to include a valid amount of memory so that the dtb the kernel spits out is useful in falcon mode, it's not at all useful in development.
Anyone noticed! this change is breaking falcon mode (tried in i.MX6 and rk3288) even if we forcibly disable CONFIG_SPL_OF_LIBFDT the SPL need to revert back to use SPL_OF_PLATDATA.
It broke falcon boot for ls1043ardb and ls1043ardb (and probably all my ARMv8 platforms) due to the way we reserve secure memory. I have added a patch (not upstreamed yet) to prevent dram_init_banksize() to run twice for my boards.
York

On Mon, Aug 28, 2017 at 10:17 PM, York Sun york.sun@nxp.com wrote:
On 08/26/2017 04:50 AM, Jagan Teki wrote:
On Thu, Aug 3, 2017 at 1:02 AM, Tom Rini trini@konsulko.com wrote:
On Wed, Aug 02, 2017 at 07:10:51PM +0000, York Sun wrote:
On 04/18/2017 04:57 AM, B, Ravi wrote:
In single stage bootmode or falcon boot mode, the SPL shall update the memory dt nodes spl_fixup_fdt() based on DDR configuration for specific platform.
Signed-off-by: Ravi Babu ravibabu@ti.com
common/spl/spl.c | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+)
Clearly I am late for this thread. I only notice this change when I try to merge my FIT improvement for falcon boot.
Why do we need to fixup the device tree for falcon boot at all? The device tree is static, saved as argument when exporting it, isn't it? As far as the normal boot fixes up the device tree, the exported device tree is correct.
So, the further argument here is that if you have to edit the dts to include a valid amount of memory so that the dtb the kernel spits out is useful in falcon mode, it's not at all useful in development.
Anyone noticed! this change is breaking falcon mode (tried in i.MX6 and rk3288) even if we forcibly disable CONFIG_SPL_OF_LIBFDT the SPL need to revert back to use SPL_OF_PLATDATA.
It broke falcon boot for ls1043ardb and ls1043ardb (and probably all my ARMv8 platforms) due to the way we reserve secure memory. I have added a patch (not upstreamed yet) to prevent dram_init_banksize() to run twice for my boards.
In-fact I too send patches for dram_init_banksize addition on i.MX6 and rk3288 for fixing falcon, wonder why we need to add explicit function here just to prevent DDR re-config or something similar. I think this spl_fixup_fdt should have board or soc specific routine.?
thanks!

On 08/29/2017 12:30 PM, Jagan Teki wrote:
On Mon, Aug 28, 2017 at 10:17 PM, York Sun york.sun@nxp.com wrote:
On 08/26/2017 04:50 AM, Jagan Teki wrote:
On Thu, Aug 3, 2017 at 1:02 AM, Tom Rini trini@konsulko.com wrote:
On Wed, Aug 02, 2017 at 07:10:51PM +0000, York Sun wrote:
On 04/18/2017 04:57 AM, B, Ravi wrote:
In single stage bootmode or falcon boot mode, the SPL shall update the memory dt nodes spl_fixup_fdt() based on DDR configuration for specific platform.
Signed-off-by: Ravi Babu ravibabu@ti.com
common/spl/spl.c | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+)
Clearly I am late for this thread. I only notice this change when I try to merge my FIT improvement for falcon boot.
Why do we need to fixup the device tree for falcon boot at all? The device tree is static, saved as argument when exporting it, isn't it? As far as the normal boot fixes up the device tree, the exported device tree is correct.
So, the further argument here is that if you have to edit the dts to include a valid amount of memory so that the dtb the kernel spits out is useful in falcon mode, it's not at all useful in development.
Anyone noticed! this change is breaking falcon mode (tried in i.MX6 and rk3288) even if we forcibly disable CONFIG_SPL_OF_LIBFDT the SPL need to revert back to use SPL_OF_PLATDATA.
It broke falcon boot for ls1043ardb and ls1043ardb (and probably all my ARMv8 platforms) due to the way we reserve secure memory. I have added a patch (not upstreamed yet) to prevent dram_init_banksize() to run twice for my boards.
In-fact I too send patches for dram_init_banksize addition on i.MX6 and rk3288 for fixing falcon, wonder why we need to add explicit function here just to prevent DDR re-config or something similar. I think this spl_fixup_fdt should have board or soc specific routine.?
I would prefer to call board/soc routine.
York
participants (7)
-
B, Ravi
-
Jagan Teki
-
Lokesh Vutla
-
Lukasz Majewski
-
Ravi Babu
-
Tom Rini
-
York Sun