[U-Boot] [U-boot] regression: bootaux doesn't work with DCACHE enabled

Hi all,
U-boot imx-specific bootaux command doesn't work properly with the old legacy binary format if the DCACHE is enabled (I've tested only executing from OCRAM) in the mainline U-boot.
Interesting thing is that invocation of `dcache flush` before bootaux doesn't help, but only full disabling it with `dcache off`.
To reproduce:
tftpboot ${loadaddr} ${board_name}/hello_world.bin cp.b ${loadaddr} 0x7F8000 $filesize bootaux 0x7F8000
However this works:
tftpboot ${loadaddr} ${board_name}/hello_world.bin cp.b ${loadaddr} 0x7F8000 $filesize dcache off bootaux 0x7F8000
Any ideas and suggestions? Thanks

On Thu, Nov 28, 2019 at 12:52 PM Igor Opaniuk igor.opaniuk@gmail.com wrote:
Hi all,
U-boot imx-specific bootaux command doesn't work properly with the old legacy binary format if the DCACHE is enabled (I've tested only executing from OCRAM) in the mainline U-boot.
Interesting thing is that invocation of `dcache flush` before bootaux doesn't help, but only full disabling it with `dcache off`.
To reproduce:
tftpboot ${loadaddr} ${board_name}/hello_world.bin cp.b ${loadaddr} 0x7F8000 $filesize bootaux 0x7F8000
However this works:
tftpboot ${loadaddr} ${board_name}/hello_world.bin cp.b ${loadaddr} 0x7F8000 $filesize dcache off bootaux 0x7F8000
Any ideas and suggestions? Thanks
-- Best regards - Freundliche Grüsse - Meilleures salutations
Igor Opaniuk
mailto: igor.opaniuk@gmail.com skype: igor.opanyuk +380 (93) 836 40 67 http://ua.linkedin.com/in/iopaniuk
Flushing dcache just after enabling M4 core helps:
diff --git a/arch/arm/mach-imx/imx_bootaux.c b/arch/arm/mach-imx/imx_bootaux.c index 7f4bbfe885..86eb0c7902 100644 --- a/arch/arm/mach-imx/imx_bootaux.c +++ b/arch/arm/mach-imx/imx_bootaux.c @@ -100,6 +100,8 @@ int arch_auxiliary_core_up(u32 core_id, ulong addr) writel(stack, M4_BOOTROM_BASE_ADDR); writel(pc, M4_BOOTROM_BASE_ADDR + 4);
+ flush_dcache_all(); + /* Enable M4 */ #ifdef CONFIG_IMX8M call_imx_sip(IMX_SIP_SRC, IMX_SIP_SRC_M4_START, 0, 0, 0);
Will send a patch soon.
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Igor Opaniuk