[PATC 1/2H] board: fsl: ls2088ardb: Program GIC LPI configuration table
From: Nikhil Gupta nikhil.gupta@nxp.com
Add programming of GIC LPI configuration table: 1. Program Redistributor PROCBASER configuration table which is common for all redistributors. 2. Program Redistributor pending table (PENDBASER), for all the available redistributors. 3. Reserve DDR memory region used for GIC LPI configuration table.
Signed-off-by: Nikhil Gupta nikhil.gupta@nxp.com Signed-off-by: Priyanka Jain priyanka.jain@nxp.com --- board/freescale/ls2080ardb/ls2080ardb.c | 27 ++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index c7e9c1dacf..1c54bac529 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2015 Freescale Semiconductor - * Copyright 2017 NXP + * Copyright 2017-2020 NXP */ #include <common.h> #include <env.h> @@ -24,7 +24,10 @@ #include <asm/arch/ppa.h> #include <fsl_sec.h> #include <asm/arch-fsl-layerscape/fsl_icid.h> +#include <asm/gic-v3.h> +#include <cpu_func.h>
+#define GIC_LPI_SIZE 0x200000 #ifdef CONFIG_FSL_QIXIS #include "../common/qixis.h" #include "ls2080ardb_qixis.h" @@ -352,6 +355,21 @@ void board_quiesce_devices(void) } #endif
+#ifdef CONFIG_GIC_V3_ITS +void fdt_fixup_gic_lpi_memory(void *blob, u64 gic_lpi_base) +{ + u32 phandle; + int err; + struct fdt_memory gic_lpi; + + gic_lpi.start = gic_lpi_base; + gic_lpi.end = gic_lpi_base + GIC_LPI_SIZE - 1; + err = fdtdec_add_reserved_memory(blob, "gic-lpi", &gic_lpi, &phandle); + if (err < 0) + debug("failed to add reserved memory: %d\n", err); +} +#endif + #ifdef CONFIG_OF_BOARD_SETUP void fsl_fdt_fixup_flash(void *fdt) { @@ -426,6 +444,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) u64 mc_memory_base = 0; u64 mc_memory_size = 0; u16 total_memory_banks; + u64 gic_lpi_base;
ft_cpu_setup(blob, bd);
@@ -445,6 +464,12 @@ int ft_board_setup(void *blob, struct bd_info *bd) base[1] = gd->bd->bi_dram[1].start; size[1] = gd->bd->bi_dram[1].size;
+#ifdef CONFIG_GIC_V3_ITS + gic_lpi_base = gd->arch.resv_ram - GIC_LPI_SIZE; + gic_lpi_tables_init(gic_lpi_base, cpu_numcores()); + fdt_fixup_gic_lpi_memory(blob, gic_lpi_base); +#endif + #ifdef CONFIG_RESV_RAM /* reduce size if reserved memory is within this bank */ if (gd->arch.resv_ram >= base[0] &&
-----Original Message----- From: Priyanka Jain priyanka.jain@nxp.com Sent: Monday, December 7, 2020 12:45 PM To: u-boot@lists.denx.de Cc: Nikhil Gupta nikhil.gupta@nxp.com; Priyanka Jain priyanka.jain@nxp.com Subject: [PATC 1/2H] board: fsl: ls2088ardb: Program GIC LPI configuration table
From: Nikhil Gupta nikhil.gupta@nxp.com
Add programming of GIC LPI configuration table:
- Program Redistributor PROCBASER configuration table
which is common for all redistributors. 2. Program Redistributor pending table (PENDBASER), for all the available redistributors. 3. Reserve DDR memory region used for GIC LPI configuration table.
Signed-off-by: Nikhil Gupta nikhil.gupta@nxp.com Signed-off-by: Priyanka Jain priyanka.jain@nxp.com
board/freescale/ls2080ardb/ls2080ardb.c | 27 ++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index c7e9c1dacf..1c54bac529 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /*
- Copyright 2015 Freescale Semiconductor
- Copyright 2017 NXP
- Copyright 2017-2020 NXP
*/ #include <common.h> #include <env.h> @@ -24,7 +24,10 @@ #include <asm/arch/ppa.h> #include <fsl_sec.h> #include <asm/arch-fsl-layerscape/fsl_icid.h> +#include <asm/gic-v3.h> +#include <cpu_func.h>
+#define GIC_LPI_SIZE 0x200000 #ifdef CONFIG_FSL_QIXIS #include "../common/qixis.h" #include "ls2080ardb_qixis.h" @@ -352,6 +355,21 @@ void board_quiesce_devices(void) } #endif
+#ifdef CONFIG_GIC_V3_ITS +void fdt_fixup_gic_lpi_memory(void *blob, u64 gic_lpi_base) {
- u32 phandle;
- int err;
- struct fdt_memory gic_lpi;
- gic_lpi.start = gic_lpi_base;
- gic_lpi.end = gic_lpi_base + GIC_LPI_SIZE - 1;
- err = fdtdec_add_reserved_memory(blob, "gic-lpi", &gic_lpi,
&phandle);
- if (err < 0)
debug("failed to add reserved memory: %d\n", err); } #endif#ifdef CONFIG_OF_BOARD_SETUP void fsl_fdt_fixup_flash(void *fdt) { @@ -426,6 +444,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) u64 mc_memory_base = 0; u64 mc_memory_size = 0; u16 total_memory_banks;
u64 gic_lpi_base;
ft_cpu_setup(blob, bd);
@@ -445,6 +464,12 @@ int ft_board_setup(void *blob, struct bd_info *bd) base[1] = gd->bd->bi_dram[1].start; size[1] = gd->bd->bi_dram[1].size;
+#ifdef CONFIG_GIC_V3_ITS
- gic_lpi_base = gd->arch.resv_ram - GIC_LPI_SIZE;
- gic_lpi_tables_init(gic_lpi_base, cpu_numcores());
- fdt_fixup_gic_lpi_memory(blob, gic_lpi_base); #endif
#ifdef CONFIG_RESV_RAM /* reduce size if reserved memory is within this bank */ if (gd->arch.resv_ram >= base[0] && -- 2.17.1
This patch needs to be rebased. Below build error with upstream code.
board: fsl: ls2088ardb: Program GIC LPI configuration table aarch64: + ls2080ardb_SECURE_BOOT +===================== WARNING ====================== +This board does not use CONFIG_DM_ETH (Driver Model +for Ethernet drivers). Please update the board to use +CONFIG_DM_ETH before the v2020.07 release. Failure to +update by the deadline may result in board removal. +See doc/driver-model/migration.rst for more info. +==================================================== +../board/freescale/ls2080ardb/ls2080ardb.c: In function âfdt_fixup_gic_lpi_memoryâ: +../board/freescale/ls2080ardb/ls2080ardb.c:367:8: error: too few arguments to function âfdtdec_add_reserved_memoryâ + err = fdtdec_add_reserved_memory(blob, "gic-lpi", &gic_lpi, &phandle); + ^~~~~~~~~~~~~~~~~~~~~~~~~~ +In file included from ../include/asm-generic/global_data.h:23:0, + from ../arch/arm/include/asm/global_data.h:87, + from ../include/common.h:26, + from ../board/freescale/ls2080ardb/ls2080ardb.c:6: +../include/fdtdec.h:1062:5: note: declared here + int fdtdec_add_reserved_memory(void *blob, const char *basename, + ^~~~~~~~~~~~~~~~~~~~~~~~~~ +../board/freescale/ls2080ardb/ls2080ardb.c: In function âft_board_setupâ: +../board/freescale/ls2080ardb/ls2080ardb.c:469:2: error: too many arguments to function âgic_lpi_tables_initâ + gic_lpi_tables_init(gic_lpi_base, cpu_numcores()); + ^~~~~~~~~~~~~~~~~~~ +In file included from ../board/freescale/ls2080ardb/ls2080ardb.c:27:0: +../arch/arm/include/asm/gic-v3.h:130:5: note: declared here + int gic_lpi_tables_init(void); + ^~~~~~~~~~~~~~~~~~~ +make[2]: *** [board/freescale/ls2080ardb/ls2080ardb.o] Error 1 +make[1]: *** [board/freescale/ls2080ardb] Error 2 +make: *** [sub-make] Error 2
Regards Priyanka
On 2020-12-07 07:14, Priyanka Jain wrote:
From: Nikhil Gupta nikhil.gupta@nxp.com
Add programming of GIC LPI configuration table:
- Program Redistributor PROCBASER configuration table
The register name is GICR_PROPBASER.
which is common for all redistributors. 2. Program Redistributor pending table (PENDBASER), for all the available redistributors. 3. Reserve DDR memory region used for GIC LPI configuration table.
I'm not convinced that's a good idea, but hey, why not.
Signed-off-by: Nikhil Gupta nikhil.gupta@nxp.com Signed-off-by: Priyanka Jain priyanka.jain@nxp.com
board/freescale/ls2080ardb/ls2080ardb.c | 27 ++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index c7e9c1dacf..1c54bac529 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /*
- Copyright 2015 Freescale Semiconductor
- Copyright 2017 NXP
*/
- Copyright 2017-2020 NXP
#include <common.h> #include <env.h> @@ -24,7 +24,10 @@ #include <asm/arch/ppa.h> #include <fsl_sec.h> #include <asm/arch-fsl-layerscape/fsl_icid.h> +#include <asm/gic-v3.h> +#include <cpu_func.h>
+#define GIC_LPI_SIZE 0x200000
Shouldn't you probe this from the HW instead of hardcoding it?
#ifdef CONFIG_FSL_QIXIS #include "../common/qixis.h" #include "ls2080ardb_qixis.h" @@ -352,6 +355,21 @@ void board_quiesce_devices(void) } #endif
+#ifdef CONFIG_GIC_V3_ITS +void fdt_fixup_gic_lpi_memory(void *blob, u64 gic_lpi_base) +{
- u32 phandle;
- int err;
- struct fdt_memory gic_lpi;
- gic_lpi.start = gic_lpi_base;
- gic_lpi.end = gic_lpi_base + GIC_LPI_SIZE - 1;
- err = fdtdec_add_reserved_memory(blob, "gic-lpi", &gic_lpi,
&phandle);
- if (err < 0)
debug("failed to add reserved memory: %d\n", err);+} +#endif
#ifdef CONFIG_OF_BOARD_SETUP void fsl_fdt_fixup_flash(void *fdt) { @@ -426,6 +444,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) u64 mc_memory_base = 0; u64 mc_memory_size = 0; u16 total_memory_banks;
u64 gic_lpi_base;
ft_cpu_setup(blob, bd);
@@ -445,6 +464,12 @@ int ft_board_setup(void *blob, struct bd_info *bd) base[1] = gd->bd->bi_dram[1].start; size[1] = gd->bd->bi_dram[1].size;
+#ifdef CONFIG_GIC_V3_ITS
- gic_lpi_base = gd->arch.resv_ram - GIC_LPI_SIZE;
- gic_lpi_tables_init(gic_lpi_base, cpu_numcores());
- fdt_fixup_gic_lpi_memory(blob, gic_lpi_base);
+#endif
#ifdef CONFIG_RESV_RAM /* reduce size if reserved memory is within this bank */ if (gd->arch.resv_ram >= base[0] &&
M.
participants (2)
-
Marc Zyngier -
Priyanka Jain