On 16/07/2019 15:37, andrei@gherzan.ro wrote:

From: Andrei Gherzan andrei@gherzan.ro

This follows a similar change in kernel[1]. The change moves configuration that was not applicable for all bcm2835/6/7/8 out of bcm283x.dtsi. The new file is bcm2835-common.dtsi and contains conifguration that is common for bcm2835/6/7 (not bcm2838).

[1] https://github.com/raspberrypi/linux/commit/769a7330aa5bebcc98b1ff12ecb767db...

Signed-off-by: Andrei Gherzan andrei@gherzan.ro

My opinion is that we should wait for official dts instead of using some work-in-progress ones. So my opinion is to use the DTB from the FW for now until we have something stable.

---

arch/arm/dts/bcm2835-common.dtsi | 53 ++++++++++++++++++++++++++++++++ arch/arm/dts/bcm2835.dtsi | 1 + arch/arm/dts/bcm2836.dtsi | 1 + arch/arm/dts/bcm2837.dtsi | 1 + arch/arm/dts/bcm283x.dtsi | 45 +-------------------------- 5 files changed, 57 insertions(+), 44 deletions(-) create mode 100644 arch/arm/dts/bcm2835-common.dtsi

diff --git a/arch/arm/dts/bcm2835-common.dtsi b/arch/arm/dts/bcm2835-common.dtsi new file mode 100644 index 0000000000..17771730a3 --- /dev/null +++ b/arch/arm/dts/bcm2835-common.dtsi @@ -0,0 +1,53 @@ +// SPDX-License-Identifier: GPL-2.0

+/* This include file covers the common peripherals and configuration between

• • bcm2835, bcm2836 and bcm2837 implementations.
• */

+/ {

• soc {

• timer@7e003000 {
  

• 	compatible = "brcm,bcm2835-system-timer";
  

• 	reg = <0x7e003000 0x1000>;
  

• 	interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
  

• 	/* This could be a reference to BCM2835_CLOCK_TIMER,
  

• 	 * but we don't have the driver using the common clock
  

• 	 * support yet.
  

• 	 */
  

• 	clock-frequency = <1000000>;
  

• };
  

• intc: interrupt-controller@7e00b200 {
  

• 	compatible = "brcm,bcm2835-armctrl-ic";
  

• 	reg = <0x7e00b200 0x200>;
  

• 	interrupt-controller;
  

• 	#interrupt-cells = <2>;
  

• };
  

• thermal: thermal@7e212000 {
  

• 	compatible = "brcm,bcm2835-thermal";
  

• 	reg = <0x7e212000 0x8>;
  

• 	clocks = <&clocks BCM2835_CLOCK_TSENS>;
  

• 	#thermal-sensor-cells = <0>;
  

• 	status = "disabled";
  

• };
  

• v3d: v3d@7ec00000 {
  

• 	compatible = "brcm,bcm2835-v3d";
  

• 	reg = <0x7ec00000 0x1000>;
  

• 	interrupts = <1 10>;
  

• };
  

• };

+};

+&gpio {

• i2c_slave_gpio18: i2c_slave_gpio18 {

• brcm,pins = <18 19 20 21>;
  

• brcm,function = <BCM2835_FSEL_ALT3>;
  

• };
• jtag_gpio4: jtag_gpio4 {

• brcm,pins = <4 5 6 12 13>;
  

• brcm,function = <BCM2835_FSEL_ALT5>;
  

• };

+}; diff --git a/arch/arm/dts/bcm2835.dtsi b/arch/arm/dts/bcm2835.dtsi index a5c3824c80..53bf4579cc 100644 --- a/arch/arm/dts/bcm2835.dtsi +++ b/arch/arm/dts/bcm2835.dtsi @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 #include "bcm283x.dtsi" +#include "bcm2835-common.dtsi"

/ { compatible = "brcm,bcm2835"; diff --git a/arch/arm/dts/bcm2836.dtsi b/arch/arm/dts/bcm2836.dtsi index c933e84138..82d6c4662a 100644 --- a/arch/arm/dts/bcm2836.dtsi +++ b/arch/arm/dts/bcm2836.dtsi @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 #include "bcm283x.dtsi" +#include "bcm2835-common.dtsi"

/ { compatible = "brcm,bcm2836"; diff --git a/arch/arm/dts/bcm2837.dtsi b/arch/arm/dts/bcm2837.dtsi index beb6c502da..9e95fee78e 100644 --- a/arch/arm/dts/bcm2837.dtsi +++ b/arch/arm/dts/bcm2837.dtsi @@ -1,4 +1,5 @@ #include "bcm283x.dtsi" +#include "bcm2835-common.dtsi"

/ { compatible = "brcm,bcm2837"; diff --git a/arch/arm/dts/bcm283x.dtsi b/arch/arm/dts/bcm283x.dtsi index 9777644c6c..a024727e4d 100644 --- a/arch/arm/dts/bcm283x.dtsi +++ b/arch/arm/dts/bcm283x.dtsi @@ -56,17 +56,6 @@ #address-cells = <1>; #size-cells = <1>;

• timer@7e003000 {
  

• 	compatible = "brcm,bcm2835-system-timer";
  

• 	reg = <0x7e003000 0x1000>;
  

• 	interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
  

• 	/* This could be a reference to BCM2835_CLOCK_TIMER,
  

• 	 * but we don't have the driver using the common clock
  

• 	 * support yet.
  

• 	 */
  

• 	clock-frequency = <1000000>;
  

• };
  

• txp@7e004000 { compatible = "brcm,bcm2835-txp"; reg = <0x7e004000 0x20>;

@@ -114,13 +103,6 @@ brcm,dma-channel-mask = <0x7f35>; };

• intc: interrupt-controller@7e00b200 {
  

• 	compatible = "brcm,bcm2835-armctrl-ic";
  

• 	reg = <0x7e00b200 0x200>;
  

• 	interrupt-controller;
  

• 	#interrupt-cells = <2>;
  

• };
  

• pm: watchdog@7e100000 { compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt"; #power-domain-cells = <1>;

@@ -184,8 +166,7 @@ interrupt-controller; #interrupt-cells = <2>;

• 	/* Defines pin muxing groups according to
  

• 	 * BCM2835-ARM-Peripherals.pdf page 102.
  

• 	/* Defines common pin muxing groups
   *
   * While each pin can have its mux selected
   * for various functions individually, some
  

@@ -263,15 +244,6 @@ brcm,pins = <44 45>; brcm,function = <BCM2835_FSEL_ALT2>; };

• 	i2c_slave_gpio18: i2c_slave_gpio18 {
  

• 		brcm,pins = <18 19 20 21>;
  

• 		brcm,function = <BCM2835_FSEL_ALT3>;
  

• 	};
  

• 	jtag_gpio4: jtag_gpio4 {
  

• 		brcm,pins = <4 5 6 12 13>;
  

• 		brcm,function = <BCM2835_FSEL_ALT5>;
  

• 	};
  jtag_gpio22: jtag_gpio22 {
  	brcm,pins = <22 23 24 25 26 27>;
  	brcm,function = <BCM2835_FSEL_ALT4>;
  

@@ -488,14 +460,6 @@

};

• thermal: thermal@7e212000 {
  

• 	compatible = "brcm,bcm2835-thermal";
  

• 	reg = <0x7e212000 0x8>;
  

• 	clocks = <&clocks BCM2835_CLOCK_TSENS>;
  

• 	#thermal-sensor-cells = <0>;
  

• 	status = "disabled";
  

• };
  

• aux: aux@7e215000 { compatible = "brcm,bcm2835-aux"; #clock-cells = <1>;

@@ -635,13 +599,6 @@ phy-names = "usb2-phy"; };

• v3d: v3d@7ec00000 {
  

• 	compatible = "brcm,bcm2835-v3d";
  

• 	reg = <0x7ec00000 0x1000>;
  

• 	interrupts = <1 10>;
  

• 	power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>;
  

• };
  

• vc4: gpu { compatible = "brcm,bcm2835-vc4"; };

On 16/07/2019 15:37, andrei@gherzan.ro wrote:

From: Andrei Gherzan andrei@gherzan.ro

Signed-off-by: Andrei Gherzan andrei@gherzan.ro

arch/arm/dts/Makefile | 4 +- arch/arm/dts/bcm2838-rpi-4-b.dts | 56 ++++++++ arch/arm/dts/bcm2838.dtsi | 237 +++++++++++++++++++++++++++++++ 3 files changed, 296 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/bcm2838-rpi-4-b.dts create mode 100644 arch/arm/dts/bcm2838.dtsi

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 20dbc2ff84..16790af1e1 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -749,7 +749,9 @@ dtb-$(CONFIG_ARCH_BCM283X) += \ bcm2837-rpi-3-a-plus.dtb \ bcm2837-rpi-3-b.dtb \ bcm2837-rpi-3-b-plus.dtb \

• bcm2837-rpi-cm3-io3.dtb

• bcm2837-rpi-cm3-io3.dtb \
• bcm2837-rpi-3-b.dtb \

You added rpi-3-b again, no need for that.

• bcm2838-rpi-4-b.dtb

dtb-$(CONFIG_ARCH_BCM63158) += \ bcm963158.dtb diff --git a/arch/arm/dts/bcm2838-rpi-4-b.dts b/arch/arm/dts/bcm2838-rpi-4-b.dts new file mode 100644 index 0000000000..07e9a78e8d --- /dev/null +++ b/arch/arm/dts/bcm2838-rpi-4-b.dts @@ -0,0 +1,56 @@ +/dts-v1/; +#include "bcm2838.dtsi"

+/ {

• compatible = "raspberrypi,4-model-b","brcm,bcm2838","brcm,bcm2837";
• model = "Raspberry Pi 4 Model B";
• memory {

• reg = <0 0 0x40000000>;
  

• };
• leds {

• act {
  

• 	gpios = <&gpio 47 0>;
  

• };
  

• };

+};

+/* uart0 communicates with the BT module */ +&uart0 {

• pinctrl-names = "default";
• pinctrl-0 = <&uart0_gpio32 &gpclk2_gpio43>;
• status = "okay";

+};

+/* uart1 is mapped to the pin header */ +&uart1 {

• pinctrl-names = "default";
• pinctrl-0 = <&uart1_pins>;
• status = "okay";

+};

+/* SDHCI is used to control the SDIO for wireless */ +&sdhci {

• pinctrl-names = "default";
• pinctrl-0 = <&emmc_gpio34>;
• status = "okay";
• bus-width = <4>;
• non-removable;

+};

+/* SDHOST is used to drive the SD card */ +&sdhost {

• pinctrl-names = "default";
• pinctrl-0 = <&sdhost_gpio48>;
• status = "okay";
• bus-width = <4>;

+};

+&gpio {

• uart1_pins: uart1_pins {

•    	brcm,pins;                                                                                                                                                                                        
  

• brcm,function;                                                                                                                                                                                    
  

• brcm,pull;                                                                                                                                                                                        
  

• };

+}; diff --git a/arch/arm/dts/bcm2838.dtsi b/arch/arm/dts/bcm2838.dtsi new file mode 100644 index 0000000000..19b2d7b905 --- /dev/null +++ b/arch/arm/dts/bcm2838.dtsi @@ -0,0 +1,237 @@ +#include "bcm283x.dtsi" +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/power/raspberrypi-power.h>

+/ {

• compatible = "brcm,bcm2838";
• #address-cells = <2>;
• #size-cells = <1>;
• interrupt-parent = <&gic>;
• soc {

• ranges = <0x7e000000  0x0 0xfe000000  0x01800000>,
  

• 	 <0x7c000000  0x0 0xfc000000  0x02000000>,
  

• 	 <0x40000000  0x0 0xff800000  0x00800000>;
  

• dma-ranges = <0xc0000000  0x0 0x00000000  0x3c000000>;
  

• gic: gic400@40041000 {
  

• 	interrupt-controller;
  

• 	#interrupt-cells = <3>;
  

• 	compatible = "arm,gic-400";
  

• 	reg = 	<0x40041000 0x1000>,
  

• 		<0x40042000 0x2000>,
  

• 		<0x40044000 0x2000>,
  

• 		<0x40046000 0x2000>;
  

• };
  

• thermal: thermal@7d5d2200 {
  

• 	compatible = "brcm,avs-tmon-bcm2838";
  

• 	reg = <0x7d5d2200 0x2c>;
  

• 	interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
  

• 	interrupt-names = "tmon";
  

• 	clocks = <&clocks BCM2835_CLOCK_TSENS>;
  

• 	#thermal-sensor-cells = <0>;
  

• 	status = "okay";
  

• };
  

• spi@7e204000 {                               
  

•                    reg = <0x7e204000 0x0200>;                                      
  

•                    interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
  

•            };
  

•            pixelvalve@7e206000 {                          
  

•                    interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
  

•            };                                                 
  

•            pixelvalve@7e207000 {                              
  

•                    interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
  

•            };                                                 
  

•            hvs@7e400000 {          
  

•                    interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
  

•            };                                                
  

• emmc2: emmc2@7e340000 {
  

•                    compatible = "brcm,bcm2711-emmc2";
  

•                    status = "okay";
  

•                    interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
  

•                    clocks = <&clocks BCM2838_CLOCK_EMMC2>;
  

•                    reg = <0x7e340000 0x100>;
  

•            };
  

•            pixelvalve@7e807000 {                                  
  

•                    interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
  

•            };	
  

• };

•    arm-pmu {
  

•            /*
  

•             * N.B. the A72 PMU support only exists in arch/arm64, hence
  

•             * the fallback to the A53 version.
  

•             */
  

•            compatible = "arm,cortex-a72-pmu", "arm,cortex-a53-pmu";
  

•            interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
  

•                    <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
  

•                    <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
  

•                    <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
  

•    };
  

• timer {

• compatible = "arm,armv7-timer";
  

• interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
  

• 			IRQ_TYPE_LEVEL_LOW)>,
  

• 	     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
  

• 			IRQ_TYPE_LEVEL_LOW)>,
  

• 	     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | 
  

• 			IRQ_TYPE_LEVEL_LOW)>,
  

• 	     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | 
  

• 			IRQ_TYPE_LEVEL_LOW)>;
  

• arm,cpu-registers-not-fw-configured; 
  

• always-on;
  

• };
• cpus: cpus {

• #address-cells = <1>;
  

• #size-cells = <0>;
  

• enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit
  

• cpu0: cpu@0 {
  

• 	device_type = "cpu";
  

• 	compatible = "arm,cortex-a72";
  

• 	reg = <0>;
  

• 	enable-method = "spin-table";
  

• 	cpu-release-addr = <0x0 0x000000d8>;
  

• };
  

• cpu1: cpu@1 {
  

• 	device_type = "cpu";
  

• 	compatible = "arm,cortex-a72";
  

• 	reg = <1>;
  

• 	enable-method = "spin-table";
  

• 	cpu-release-addr = <0x0 0x000000e0>;
  

• };
  

• cpu2: cpu@2 {
  

• 	device_type = "cpu";
  

• 	compatible = "arm,cortex-a72";
  

• 	reg = <2>;
  

• 	enable-method = "spin-table";
  

• 	cpu-release-addr = <0x0 0x000000e8>;
  

• };
  

• cpu3: cpu@3 {
  

• 	device_type = "cpu";
  

• 	compatible = "arm,cortex-a72";
  

• 	reg = <3>;
  

• 	enable-method = "spin-table";
  

• 	cpu-release-addr = <0x0 0x000000f0>;
  

• };
  

• };

+};

+&clk_osc {

• clock-frequency = <54000000>;

+};

+&clocks {

• compatible = "brcm,bcm2838-cprman";

+};

+&cpu_thermal {

• coefficients = <(-487) 410040>;

+};

+&dsi0 {

•    interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;                
  

+};

+&dsi1 {

•    interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;                   
  

+};

+&gpio {

• compatible = "brcm,bcm2838-gpio", "brcm,bcm2835-gpio";
• interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,

•      <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
  

•      <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
  

•      <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
  

+};

+&vec {

•    interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
  

+};

+&usb {

•    interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
  

+};

+&hdmi {

•    interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
  

•                 <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
  

+};

+&uart1 {

• interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;

+};

+&spi1 {

•    interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
  

+};

+&spi2 {

•    interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
  

+};

+&i2c0 {

•    interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
  

+};

+&i2c1 {

•    interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
  

+};

+&i2c2 {

•    interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
  

+};

+&mailbox {

•    interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
  

+};

+&sdhost {

•    interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
  

+};

+&uart0 {

•    interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
  

+};

+&dma {

•    reg = <0x7e007000 0xb00>;
  

•    interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
  

•            <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
  

•            <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
  

•            <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
  

•            <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
  

•            <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
  

•            <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
  

•            <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, /* dmalite  7 */
  

•            <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, /* dmalite  8 */
  

•            <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, /* dmalite  9 */
  

•            <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; /* dmalite 10 */
  

•    interrupt-names = "dma0",
  

•                      "dma1",
  

•                      "dma2",
  

•                      "dma3",
  

•                      "dma4",
  

•                      "dma5",
  

•                      "dma6",
  

•                      "dma7",
  

•                      "dma8",
  

•                      "dma9",
  

•                      "dma10";
  

•    brcm,dma-channel-mask = <0x07f5>;
  

+};

On 16/07/2019 15:37, andrei@gherzan.ro wrote:

From: Matthias Brugger mbrugger@suse.com

The bcm2711 has two emmc controller. The difference is the clocks they use. Add support for the second emmc contoller.

Signed-off-by: Matthias Brugger mbrugger@suse.com

missing your signed-off-by.

---

drivers/mmc/bcm2835_sdhci.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/bcm2835_sdhci.c b/drivers/mmc/bcm2835_sdhci.c index 08bddd410e..e68dec3be7 100644 --- a/drivers/mmc/bcm2835_sdhci.c +++ b/drivers/mmc/bcm2835_sdhci.c @@ -178,12 +178,13 @@ static int bcm2835_sdhci_probe(struct udevice *dev) fdt_addr_t base; int emmc_freq; int ret;

• int clock_id = (int)dev_get_driver_data(dev);

  base = devfdt_get_addr(dev); if (base == FDT_ADDR_T_NONE) return -EINVAL;

• ret = bcm2835_get_mmc_clock(BCM2835_MBOX_CLOCK_ID_EMMC);

• ret = bcm2835_get_mmc_clock(clock_id); if (ret < 0) { debug("%s: Failed to set MMC clock (err=%d)\n", __func__, ret); return ret;

@@ -228,7 +229,14 @@ static int bcm2835_sdhci_probe(struct udevice *dev) }

static const struct udevice_id bcm2835_sdhci_match[] = {

• { .compatible = "brcm,bcm2835-sdhci" },

• {

• .compatible = "brcm,bcm2835-sdhci",
  

• .data = BCM2835_MBOX_CLOCK_ID_EMMC
  

• },
• {

• .compatible = "brcm,bcm2711-emmc2",
  

• .data = BCM2835_MBOX_CLOCK_ID_EMMC2
  

• }, { /* sentinel */ }

};

On Tue, Jul 16, 2019 at 3:25 PM Matthias Brugger matthias.bgg@gmail.com wrote:

On 16/07/2019 15:37, andrei@gherzan.ro wrote:

...

From: Andrei Gherzan andrei@balena.io

Signed-off-by: Andrei Gherzan andrei@balena.io

configs/rpi_4_32b_defconfig | 43 +++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 configs/rpi_4_32b_defconfig

diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig new file mode 100644 index 0000000000..9f2b805d0f --- /dev/null +++ b/configs/rpi_4_32b_defconfig @@ -0,0 +1,43 @@ +CONFIG_ARM=y +CONFIG_ARCH_BCM283X=y +CONFIG_SYS_TEXT_BASE=0x00008000 +CONFIG_TARGET_RPI_4_32B=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_OF_BOARD_SETUP=y +CONFIG_MISC_INIT_R=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SYS_PROMPT="U-Boot> " +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_FS_UUID=y +CONFIG_OF_EMBED=y +CONFIG_DEFAULT_DEVICE_TREE="bcm2838-rpi-4-b" +CONFIG_ENV_FAT_INTERFACE="mmc" +CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_DM_KEYBOARD=y +CONFIG_DM_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_BCM2835=y +CONFIG_PHYLIB=y +CONFIG_DM_ETH=y +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_GENERIC is not set +# CONFIG_REQUIRE_SERIAL_CONSOLE is not set +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_DWC2=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_LAN78XX=y +CONFIG_USB_ETHER_SMSC95XX=y

Network is connected via PCI, why do we need this options here?

Network is attached to a PHY not via PCI, that would be the USB.

It seems they're removed in patch 15 but the two should be squashed together.

...

+CONFIG_DM_VIDEO=y +CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_CONSOLE_SCROLL_LINES=10 +CONFIG_PHYS_TO_BUS=y +CONFIG_OF_LIBFDT_OVERLAY=y

---

U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot

On 16/07/2019 15:38, andrei@gherzan.ro wrote:

From: Andrei Gherzan andrei@balena.io

Signed-off-by: Andrei Gherzan andrei@balena.io

Commit message. You fix a file that you introduced in this series. Any reason why you don't just send the file already fixed?

---

arch/arm/dts/bcm2838-rpi-4-b.dts | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-)

diff --git a/arch/arm/dts/bcm2838-rpi-4-b.dts b/arch/arm/dts/bcm2838-rpi-4-b.dts index 07e9a78e8d..168179c17c 100644 --- a/arch/arm/dts/bcm2838-rpi-4-b.dts +++ b/arch/arm/dts/bcm2838-rpi-4-b.dts @@ -30,21 +30,17 @@ status = "okay"; };

-/* SDHCI is used to control the SDIO for wireless */ &sdhci {

• pinctrl-names = "default";
• pinctrl-0 = <&emmc_gpio34>;
• status = "okay";
• bus-width = <4>;
• non-removable;

• status = "disabled";

};

-/* SDHOST is used to drive the SD card */ &sdhost {

• pinctrl-names = "default";
• pinctrl-0 = <&sdhost_gpio48>;

• status = "disabled";

+};

+&emmc2 {

• compatible = "brcm,bcm2835-sdhci"; status = "okay";

• bus-width = <4>;

};

&gpio {

From: Matthias Brugger mbrugger@suse.com

Devices of bcm283x have different base address, depending if they are on bcm2835 or bcm2836/7. Use BCM283x_BASE depending on the SoC you want to build and only add the offset in the header files.

Signed-off-by: Matthias Brugger mbrugger@suse.com Signed-off-by: Andrei Gherzan andrei@balena.io --- arch/arm/mach-bcm283x/Kconfig | 5 +++++ arch/arm/mach-bcm283x/include/mach/mbox.h | 6 +----- arch/arm/mach-bcm283x/include/mach/sdhci.h | 6 +----- arch/arm/mach-bcm283x/include/mach/timer.h | 6 +----- arch/arm/mach-bcm283x/include/mach/wdog.h | 6 +----- 5 files changed, 9 insertions(+), 20 deletions(-)

diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig index 3eb5a9a897..8e69914a83 100644 --- a/arch/arm/mach-bcm283x/Kconfig +++ b/arch/arm/mach-bcm283x/Kconfig @@ -141,4 +141,9 @@ config SYS_SOC config SYS_CONFIG_NAME default "rpi"

+config BCM283x_BASE + hex + default "0x20000000" if BCM2835 + default "0x3f000000" if BCM2836 || BCM2837 + endmenu diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h index e3a893e49c..e44c7577da 100644 --- a/arch/arm/mach-bcm283x/include/mach/mbox.h +++ b/arch/arm/mach-bcm283x/include/mach/mbox.h @@ -37,11 +37,7 @@

/* Raw mailbox HW */

-#ifndef CONFIG_BCM2835 -#define BCM2835_MBOX_PHYSADDR 0x3f00b880 -#else -#define BCM2835_MBOX_PHYSADDR 0x2000b880 -#endif +#define BCM2835_MBOX_PHYSADDR (CONFIG_BCM283x_BASE + 0x0000b880)

struct bcm2835_mbox_regs { u32 read; diff --git a/arch/arm/mach-bcm283x/include/mach/sdhci.h b/arch/arm/mach-bcm283x/include/mach/sdhci.h index 5cb6ec3340..b443c379d8 100644 --- a/arch/arm/mach-bcm283x/include/mach/sdhci.h +++ b/arch/arm/mach-bcm283x/include/mach/sdhci.h @@ -6,11 +6,7 @@ #ifndef _BCM2835_SDHCI_H_ #define _BCM2835_SDHCI_H_

-#ifndef CONFIG_BCM2835 -#define BCM2835_SDHCI_BASE 0x3f300000 -#else -#define BCM2835_SDHCI_BASE 0x20300000 -#endif +#define BCM2835_SDHCI_BASE (CONFIG_BCM283x_BASE + 0x00300000)

int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq);

diff --git a/arch/arm/mach-bcm283x/include/mach/timer.h b/arch/arm/mach-bcm283x/include/mach/timer.h index 56b0c356bb..014355e759 100644 --- a/arch/arm/mach-bcm283x/include/mach/timer.h +++ b/arch/arm/mach-bcm283x/include/mach/timer.h @@ -6,11 +6,7 @@ #ifndef _BCM2835_TIMER_H #define _BCM2835_TIMER_H

-#ifndef CONFIG_BCM2835 -#define BCM2835_TIMER_PHYSADDR 0x3f003000 -#else -#define BCM2835_TIMER_PHYSADDR 0x20003000 -#endif +#define BCM2835_TIMER_PHYSADDR (CONFIG_BCM283x_BASE + 0x00003000)

#define BCM2835_TIMER_CS_M3 (1 << 3) #define BCM2835_TIMER_CS_M2 (1 << 2) diff --git a/arch/arm/mach-bcm283x/include/mach/wdog.h b/arch/arm/mach-bcm283x/include/mach/wdog.h index 99c88e5df7..8292b3cf1f 100644 --- a/arch/arm/mach-bcm283x/include/mach/wdog.h +++ b/arch/arm/mach-bcm283x/include/mach/wdog.h @@ -6,11 +6,7 @@ #ifndef _BCM2835_WDOG_H #define _BCM2835_WDOG_H

-#ifndef CONFIG_BCM2835 -#define BCM2835_WDOG_PHYSADDR 0x3f100000 -#else -#define BCM2835_WDOG_PHYSADDR 0x20100000 -#endif +#define BCM2835_WDOG_PHYSADDR (CONFIG_BCM283x_BASE + 0x00100000)

struct bcm2835_wdog_regs { u32 unknown0[7];

Define two target configs for Raspberry Pi 4 (32 and 64bit) and the corresponding BCM2838* configs.

Be aware of the current limitation in firmware which requires an explicit configuration to force the arm in 64bit mode when the respective target is used.

Signed-off-by: Andrei Gherzan andrei@balena.io Signed-off-by: Matthias Brugger mbrugger@suse.com --- arch/arm/mach-bcm283x/Kconfig | 62 +++++++++++++++++++++++++++++++++++ 1 file changed, 62 insertions(+)

diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig index 8e69914a83..09a5b42bbb 100644 --- a/arch/arm/mach-bcm283x/Kconfig +++ b/arch/arm/mach-bcm283x/Kconfig @@ -26,6 +26,23 @@ config BCM2837_64B select BCM2837 select ARM64

+config BCM2838 + bool "Broadcom BCM2838 SoC support" + depends on ARCH_BCM283X + +config BCM2838_32B + bool "Broadcom BCM2838 SoC 32-bit support" + depends on ARCH_BCM283X + select BCM2838 + select ARMV7_LPAE + select CPU_V7A + +config BCM2838_64B + bool "Broadcom BCM2838 SoC 64-bit support" + depends on ARCH_BCM283X + select BCM2838 + select ARM64 + menu "Broadcom BCM283X family" depends on ARCH_BCM283X

@@ -127,6 +144,50 @@ config TARGET_RPI_3 This option creates a build targeting the ARMv8/AArch64 ISA. select BCM2837_64B

+config TARGET_RPI_4_32B + bool "Raspberry Pi 4 32-bit build" + help + Support for all BCM2838-based Raspberry Pi variants, such as + the RPi 4 model B, in AArch32 (32-bit) mode. + + This option assumes the VideoCore firmware is configured to use the + mini UART (rather than PL011) for the serial console. This is the + default on the RPi 4. To enable the UART console, the following non- + default option must be present in config.txt: enable_uart=1. This is + required for U-Boot to operate correctly, even if you only care + about the HDMI/usbkbd console. + + Due to hardware incompatibilities, this can't be used with + BCM283/5/6/7. + + This option creates a build targeting the ARMv7/AArch32 ISA. + select BCM2838_32B + +config TARGET_RPI_4 + bool "Raspberry Pi 4 64-bit build" + help + Support for all BCM2838-based Raspberry Pi variants, such as + the RPi 4 model B, in AArch64 (64-bit) mode. + + This option assumes the VideoCore firmware is configured to use the + mini UART (rather than PL011) for the serial console. This is the + default on the RPi 4. To enable the UART console, the following non- + default option must be present in config.txt: enable_uart=1. This is + required for U-Boot to operate correctly, even if you only care + about the HDMI/usbkbd console. + + Due to hardware incompatibilities, this can't be used with + BCM283/5/6/7. + + Also, due to a bug in firmware, switching to 64bit mode doesn't + happen automatically based on the kernel's image filename. See + https://github.com/raspberrypi/firmware/issues/1193 for more details. + Until that is resolved, the configuration (config.txt) needs to + explicitly set: arm_64bit=1. + + This option creates a build targeting the ARMv8/AArch64 ISA. + select BCM2838_64B + endchoice

config SYS_BOARD @@ -145,5 +206,6 @@ config BCM283x_BASE hex default "0x20000000" if BCM2835 default "0x3f000000" if BCM2836 || BCM2837 + default "0xfe000000" if BCM2838

endmenu

The Raspebrry Pi 4 uses the new revision code scheme as documented by the foundation. This change adds an entry for this board as well.

Signed-off-by: Andrei Gherzan andrei@balena.io --- board/raspberrypi/rpi/rpi.c | 5 +++++ 1 file changed, 5 insertions(+)

diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c index 617c892dde..6d6f1ef39a 100644 --- a/board/raspberrypi/rpi/rpi.c +++ b/board/raspberrypi/rpi/rpi.c @@ -148,6 +148,11 @@ static const struct rpi_model rpi_models_new_scheme[] = { DTB_DIR "bcm2837-rpi-cm3.dtb", false, }, + [0x11] = { + "4 Model B", + DTB_DIR "bcm2711-rpi-4-b.dtb", + true, + }, };

static const struct rpi_model rpi_models_old_scheme[] = {

From: Matthias Brugger mbrugger@suse.com

The bcm2711 has two emmc controllers. The difference is the clocks they use. Add support for the second emmc controller.

Signed-off-by: Matthias Brugger mbrugger@suse.com Signed-off-by: Andrei Gherzan andrei@balena.io --- drivers/mmc/bcm2835_sdhci.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/bcm2835_sdhci.c b/drivers/mmc/bcm2835_sdhci.c index 08bddd410e..e68dec3be7 100644 --- a/drivers/mmc/bcm2835_sdhci.c +++ b/drivers/mmc/bcm2835_sdhci.c @@ -178,12 +178,13 @@ static int bcm2835_sdhci_probe(struct udevice *dev) fdt_addr_t base; int emmc_freq; int ret; + int clock_id = (int)dev_get_driver_data(dev);

base = devfdt_get_addr(dev); if (base == FDT_ADDR_T_NONE) return -EINVAL;

- ret = bcm2835_get_mmc_clock(BCM2835_MBOX_CLOCK_ID_EMMC); + ret = bcm2835_get_mmc_clock(clock_id); if (ret < 0) { debug("%s: Failed to set MMC clock (err=%d)\n", __func__, ret); return ret; @@ -228,7 +229,14 @@ static int bcm2835_sdhci_probe(struct udevice *dev) }

static const struct udevice_id bcm2835_sdhci_match[] = { - { .compatible = "brcm,bcm2835-sdhci" }, + { + .compatible = "brcm,bcm2835-sdhci", + .data = BCM2835_MBOX_CLOCK_ID_EMMC + }, + { + .compatible = "brcm,bcm2711-emmc2", + .data = BCM2835_MBOX_CLOCK_ID_EMMC2 + }, { /* sentinel */ } };

Signed-off-by: Andrei Gherzan andrei@balena.io --- doc/git-mailrc | 4 ++++ 1 file changed, 4 insertions(+)

diff --git a/doc/git-mailrc b/doc/git-mailrc index a63b76befc..68110e1963 100644 --- a/doc/git-mailrc +++ b/doc/git-mailrc @@ -35,6 +35,7 @@ alias mariosix Mario Six mario.six@gdsys.cc alias masahiro Masahiro Yamada yamada.masahiro@socionext.com alias mateusz Mateusz Kulikowski mateusz.kulikowski@gmail.com alias maxime Maxime Ripard maxime.ripard@free-electrons.com +alias mbrugger Matthias Brugger mbrugger@suse.com alias monstr Michal Simek monstr@monstr.eu alias prom Minkyu Kang mk7.kang@samsung.com alias ptomsich Philipp Tomsich philipp.tomsich@theobroma-systems.com @@ -74,6 +75,9 @@ alias uniphier uboot, masahiro alias zynq uboot, monstr alias rockchip uboot, sjg, kevery, ptomsich

+alias bcm283x uboot,mbrugger +alias rpi uboot,mbrugger + alias m68k uboot, alisonwang, angelo_ts alias coldfire m68k