[PATCH] ARM: socfpga: fix broken function call for arria10
Remove obsolete arguments in the function call. The call's argument list differs from its more recent definition. This breaks compilation of the 'socfpga_arria10_defconfig' target, with additionally enabled:
CONFIG_CADENCE_QSPI=y'
The removed arguments are obtained from device-tree declaration.
Signed-off-by: Lothar Rubusch l.rubusch@gmail.com --- The patch makes the problem disappear. While messing with some old Intels, it looked to me as if this usually turned off code region of the misc_arria10.c still contains legacy arguments in the call. Thus broke my compilation. I'm unsure. Please verify. --- arch/arm/mach-socfpga/misc_arria10.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/arm/mach-socfpga/misc_arria10.c b/arch/arm/mach-socfpga/misc_arria10.c index 93c9e8b0..5c782f6b 100644 --- a/arch/arm/mach-socfpga/misc_arria10.c +++ b/arch/arm/mach-socfpga/misc_arria10.c @@ -211,11 +211,9 @@ int qspi_flash_software_reset(void) struct udevice *flash; int ret;
- /* Get the flash info */ + /* Get the flash info, speed and mode will be read from DT */ ret = spi_flash_probe_bus_cs(CONFIG_SF_DEFAULT_BUS, CONFIG_SF_DEFAULT_CS, - CONFIG_SF_DEFAULT_SPEED, - CONFIG_SF_DEFAULT_MODE, &flash);
if (ret) {
This patch only shows the problem on an existing platform. Turning on the cadence QSPI flash breaks the build for arria10. Can you reproduce?
make socfpga_arria10_defconfig make
Signed-off-by: Lothar Rubusch l.rubusch@gmail.com --- NB: Don't apply this config/patch permanently! The Cadence QSPI flash can be tricky due to a write reset register instruction which can brick the board if interrupted. We experienced this situation. So, that's why I removed the config option in my boards (to be upstreamed soon). Hence, my boards won't show the above problem anymore.
Anyway, I think the code section in misc_arria10.c have a bug. So, I presented the before patch. --- configs/socfpga_arria10_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig index 6d27deeb..c7321bab 100644 --- a/configs/socfpga_arria10_defconfig +++ b/configs/socfpga_arria10_defconfig @@ -61,6 +61,7 @@ CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y CONFIG_SYS_NS16550_MEM32=y CONFIG_SPI=y +CONFIG_CADENCE_QSPI=y CONFIG_TIMER=y CONFIG_SPL_TIMER=y CONFIG_DESIGNWARE_APB_TIMER=y
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Lothar Rubusch