[U-Boot] [PATCH 01/27] ARM64: zynqmp: Add clocks for LPDDMA
From: Kedareswara rao Appana appana.durga.rao@xilinx.com
Zynqmp DMA driver expects two clocks (main clock and apb clock) LPDDMA clock cofiguration is missing for the same in the zynqmp-clk.dtsi file.
This patch updates for the same.
Reported-by: Sai Pavan Boddu saipava@xilinx.com Signed-off-by: Kedareswara rao Appana appanad@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp-clk.dtsi | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+)
diff --git a/arch/arm/dts/zynqmp-clk.dtsi b/arch/arm/dts/zynqmp-clk.dtsi index 0918c686d70e..aa848c864637 100644 --- a/arch/arm/dts/zynqmp-clk.dtsi +++ b/arch/arm/dts/zynqmp-clk.dtsi @@ -114,6 +114,38 @@ clocks = <&clk600>, <&clk100>; };
+&lpd_dma_chan1 { + clocks = <&clk600>, <&clk100>; +}; + +&lpd_dma_chan2 { + clocks = <&clk600>, <&clk100>; +}; + +&lpd_dma_chan3 { + clocks = <&clk600>, <&clk100>; +}; + +&lpd_dma_chan4 { + clocks = <&clk600>, <&clk100>; +}; + +&lpd_dma_chan5 { + clocks = <&clk600>, <&clk100>; +}; + +&lpd_dma_chan6 { + clocks = <&clk600>, <&clk100>; +}; + +&lpd_dma_chan7 { + clocks = <&clk600>, <&clk100>; +}; + +&lpd_dma_chan8 { + clocks = <&clk600>, <&clk100>; +}; + &nand0 { clocks = <&clk100 &clk100>; };
From: VNSL Durga vnsl.durga.challa@xilinx.com
Added clks for ep108 platform.
Signed-off-by: VNSL Durga vnsldurg@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp-ep108-clk.dtsi | 44 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+)
diff --git a/arch/arm/dts/zynqmp-ep108-clk.dtsi b/arch/arm/dts/zynqmp-ep108-clk.dtsi index b3ce0de549e0..6b6dca60e86f 100644 --- a/arch/arm/dts/zynqmp-ep108-clk.dtsi +++ b/arch/arm/dts/zynqmp-ep108-clk.dtsi @@ -35,6 +35,18 @@ clock-accuracy = <100>; };
+ clk100: clk100 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + }; + + clk600: clk600 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <600000000>; + }; + dp_aud_clk: clock1 { compatible = "fixed-clock"; #clock-cells = <0>; @@ -47,6 +59,38 @@ clocks = <&misc_clk &misc_clk>; };
+&fpd_dma_chan1 { + clocks = <&clk600>, <&clk100>; +}; + +&fpd_dma_chan2 { + clocks = <&clk600>, <&clk100>; +}; + +&fpd_dma_chan3 { + clocks = <&clk600>, <&clk100>; +}; + +&fpd_dma_chan4 { + clocks = <&clk600>, <&clk100>; +}; + +&fpd_dma_chan5 { + clocks = <&clk600>, <&clk100>; +}; + +&fpd_dma_chan6 { + clocks = <&clk600>, <&clk100>; +}; + +&fpd_dma_chan7 { + clocks = <&clk600>, <&clk100>; +}; + +&fpd_dma_chan8 { + clocks = <&clk600>, <&clk100>; +}; + &gem0 { clocks = <&misc_clk>, <&misc_clk>, <&misc_clk>; };
From: Naga Sureshkumar Relli naga.sureshkumar.relli@xilinx.com
This patch enables can1 for ep108.
Signed-off-by: Naga Sureshkumar Relli nagasure@xilinx.com Reviewed-by: Kedareswara rao Appana appanad@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp-ep108-clk.dtsi | 4 ++++ arch/arm/dts/zynqmp-ep108.dts | 4 ++++ 2 files changed, 8 insertions(+)
diff --git a/arch/arm/dts/zynqmp-ep108-clk.dtsi b/arch/arm/dts/zynqmp-ep108-clk.dtsi index 6b6dca60e86f..1c2efe459d4f 100644 --- a/arch/arm/dts/zynqmp-ep108-clk.dtsi +++ b/arch/arm/dts/zynqmp-ep108-clk.dtsi @@ -59,6 +59,10 @@ clocks = <&misc_clk &misc_clk>; };
+&can1 { + clocks = <&misc_clk &misc_clk>; +}; + &fpd_dma_chan1 { clocks = <&clk600>, <&clk100>; }; diff --git a/arch/arm/dts/zynqmp-ep108.dts b/arch/arm/dts/zynqmp-ep108.dts index 751717028b50..db502cf83bad 100644 --- a/arch/arm/dts/zynqmp-ep108.dts +++ b/arch/arm/dts/zynqmp-ep108.dts @@ -41,6 +41,10 @@ status = "okay"; };
+&can1 { + status = "okay"; +}; + &gem0 { status = "okay"; phy-handle = <&phy0>;
Show user that Linux is alive on the board.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp-zcu102.dts | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/arch/arm/dts/zynqmp-zcu102.dts b/arch/arm/dts/zynqmp-zcu102.dts index b3f5eaacaefc..d6cee07890c5 100644 --- a/arch/arm/dts/zynqmp-zcu102.dts +++ b/arch/arm/dts/zynqmp-zcu102.dts @@ -39,6 +39,15 @@ device_type = "memory"; reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; }; + + leds { + compatible = "gpio-leds"; + heartbeat_led { + label = "heartbeat"; + gpios = <&gpio 23 0>; + linux,default-trigger = "heartbeat"; + }; + }; };
&can1 {
There is gpio push button on MIO22. Add it to DTS to have full board description.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp-zcu102.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
diff --git a/arch/arm/dts/zynqmp-zcu102.dts b/arch/arm/dts/zynqmp-zcu102.dts index d6cee07890c5..770d98766c73 100644 --- a/arch/arm/dts/zynqmp-zcu102.dts +++ b/arch/arm/dts/zynqmp-zcu102.dts @@ -12,6 +12,7 @@
#include "zynqmp.dtsi" #include "zynqmp-clk.dtsi" +#include <dt-bindings/gpio/gpio.h>
/ { model = "ZynqMP ZCU102 RevA"; @@ -40,6 +41,20 @@ reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; };
+ gpio-keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + autorepeat; + sw19 { + label = "sw19"; + gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; + linux,code = <108>; /* down */ + gpio-key,wakeup; + autorepeat; + }; + }; + leds { compatible = "gpio-leds"; heartbeat_led {
Add dcc to dtsi for supporting system without serial port. DCC is enabled by default on ZynqMP. Adding dcc to zcu100 and zcu102 which were tested.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp-zcu102.dts | 5 +++++ arch/arm/dts/zynqmp.dtsi | 6 ++++++ 2 files changed, 11 insertions(+)
diff --git a/arch/arm/dts/zynqmp-zcu102.dts b/arch/arm/dts/zynqmp-zcu102.dts index 770d98766c73..e7496da23592 100644 --- a/arch/arm/dts/zynqmp-zcu102.dts +++ b/arch/arm/dts/zynqmp-zcu102.dts @@ -27,6 +27,7 @@ rtc0 = &rtc; serial0 = &uart0; serial1 = &uart1; + serial2 = &dcc; spi0 = &qspi; usb0 = &usb0; }; @@ -69,6 +70,10 @@ status = "okay"; };
+&dcc { + status = "okay"; +}; + /* fpd_dma clk 667MHz, lpd_dma 500MHz */ &fpd_dma_chan1 { status = "okay"; diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index ac17c4723a13..f3f4f88cecfa 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -45,6 +45,12 @@ }; };
+ dcc: dcc { + compatible = "arm,dcc"; + status = "disabled"; + u-boot,dm-pre-reloc; + }; + power-domains { compatible = "xlnx,zynqmp-genpd";
i2c device is just level shifter. Remove reference from dts.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp-zcu102.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/zynqmp-zcu102.dts b/arch/arm/dts/zynqmp-zcu102.dts index e7496da23592..7715aea5bfbc 100644 --- a/arch/arm/dts/zynqmp-zcu102.dts +++ b/arch/arm/dts/zynqmp-zcu102.dts @@ -394,7 +394,7 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o /* Bus 3 is not connected */ };
- /* FIXME PL connection - u55 , PMOD - j160 */ + /* FIXME PMOD - j160 */ /* FIXME MSP430F - u41 - not detected */ };
From: Filip Drazic filip.drazic@aggios.com
DDR power states are handled by the PM firmware, so this domain is redundant. Also, since there is no device using this PM domain, it will be powered off during boot, which is wrong.
Signed-off-by: Filip Drazic filip.drazic@aggios.com Acked-by: Soren Brinkmann soren.brinkmann@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp.dtsi | 5 ----- 1 file changed, 5 deletions(-)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index f3f4f88cecfa..25d0edac4db9 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -190,11 +190,6 @@ pd-id = <0x30>; };
- pd_ddr: pd-ddr { - #power-domain-cells = <0x0>; - pd-id = <0x37>; - }; - pd_apll: pd-apll { #power-domain-cells = <0x0>; pd-id = <0x32>;
From: Filip Drazic filip.drazic@aggios.com
Signed-off-by: Filip Drazic filip.drazic@aggios.com Acked-by: Soren Brinkmann soren.brinkmann@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp.dtsi | 25 ------------------------- 1 file changed, 25 deletions(-)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 25d0edac4db9..6df8ee9fd1d3 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -189,31 +189,6 @@ #power-domain-cells = <0x0>; pd-id = <0x30>; }; - - pd_apll: pd-apll { - #power-domain-cells = <0x0>; - pd-id = <0x32>; - }; - - pd_vpll: pd-vpll { - #power-domain-cells = <0x0>; - pd-id = <0x33>; - }; - - pd_dpll: pd-dpll { - #power-domain-cells = <0x0>; - pd-id = <0x34>; - }; - - pd_rpll: pd-rpll { - #power-domain-cells = <0x0>; - pd-id = <0x35>; - }; - - pd_iopll: pd-iopll { - #power-domain-cells = <0x0>; - pd-id = <0x36>; - }; };
pmu {
From: Filip Drazic filip.drazic@aggios.com
Signed-off-by: Filip Drazic filip.drazic@aggios.com Signed-off-by: Soren Brinkmann soren.brinkmann@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 6df8ee9fd1d3..c2eb0c5d4e96 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -189,6 +189,16 @@ #power-domain-cells = <0x0>; pd-id = <0x30>; }; + + pd_pcie: pd-pcie { + #power-domain-cells = <0x0>; + pd-id = <0x3b>; + }; + + pd_gpu: pd-gpu { + #power-domain-cells = <0x0>; + pd-id = <0x3a>; + }; };
pmu { @@ -392,6 +402,7 @@ interrupt-parent = <&gic>; interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>; interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1"; + power-domains = <&pd_gpu>; };
/* ADMA */ @@ -611,6 +622,7 @@ <0x0 0x0 0x0 0x2 &pcie_intc 0x2>, <0x0 0x0 0x0 0x3 &pcie_intc 0x3>, <0x0 0x0 0x0 0x4 &pcie_intc 0x4>; + power-domains = <&pd_pcie>; pcie_intc: legacy-interrupt-controller { interrupt-controller; #address-cells = <0>;
From: Filip Drazic filip.drazic@aggios.com
Previously, it was assumed that there is a 1:1 mapping between PM ID defined in the platform firmware and a PM domain. However, there can be a situation where multiple PM IDs belong to a single PM domain (e.g. PM IDs for GPU and two pixel processors correspond to a single PM domain).
This patch adds support for assigning more than one PM ID to a single PM domain.
Updated documentation accordingly.
Assigned pixel processors PM IDs to GPU PM domain.
Signed-off-by: Filip Drazic filip.drazic@aggios.com Signed-off-by: Soren Brinkmann soren.brinkmann@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index c2eb0c5d4e96..172ba8cfcf00 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -197,7 +197,7 @@
pd_gpu: pd-gpu { #power-domain-cells = <0x0>; - pd-id = <0x3a>; + pd-id = <0x3a 0x14 0x15>; }; };
From: Bharat Kumar Gogada bharat.kumar.gogada@xilinx.com
Updating required device tree changes as per mainlined driver from 4.6 kernel.
Signed-off-by: Bharat Kumar Gogada bharatku@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp.dtsi | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 172ba8cfcf00..8abaf1fbb319 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -605,13 +605,16 @@ #address-cells = <3>; #size-cells = <2>; #interrupt-cells = <1>; + msi-controller; device_type = "pci"; interrupt-parent = <&gic>; interrupts = <0 118 4>, + <0 117 4>, <0 116 4>, <0 115 4>, /* MSI_1 [63...32] */ <0 114 4>; /* MSI_0 [31...0] */ - interrupt-names = "misc", "intx", "msi_1", "msi_0"; + interrupt-names = "misc","dummy","intx", "msi1", "msi0"; + msi-parent = <&pcie>; reg = <0x0 0xfd0e0000 0x1000>, <0x0 0xfd480000 0x1000>, <0x0 0xe0000000 0x1000000>;
Remove unused xlnx,id property because it is not the part of DT binding.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp.dtsi | 16 ---------------- 1 file changed, 16 deletions(-)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 8abaf1fbb319..64438167fbec 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -306,7 +306,6 @@ interrupt-parent = <&gic>; interrupts = <0 124 4>; clock-names = "clk_main", "clk_apb"; - xlnx,id = <0>; xlnx,bus-width = <128>; power-domains = <&pd_gdma>; }; @@ -318,7 +317,6 @@ interrupt-parent = <&gic>; interrupts = <0 125 4>; clock-names = "clk_main", "clk_apb"; - xlnx,id = <1>; xlnx,bus-width = <128>; power-domains = <&pd_gdma>; }; @@ -330,7 +328,6 @@ interrupt-parent = <&gic>; interrupts = <0 126 4>; clock-names = "clk_main", "clk_apb"; - xlnx,id = <2>; xlnx,bus-width = <128>; power-domains = <&pd_gdma>; }; @@ -342,7 +339,6 @@ interrupt-parent = <&gic>; interrupts = <0 127 4>; clock-names = "clk_main", "clk_apb"; - xlnx,id = <3>; xlnx,bus-width = <128>; power-domains = <&pd_gdma>; }; @@ -354,7 +350,6 @@ interrupt-parent = <&gic>; interrupts = <0 128 4>; clock-names = "clk_main", "clk_apb"; - xlnx,id = <4>; xlnx,bus-width = <128>; power-domains = <&pd_gdma>; }; @@ -366,7 +361,6 @@ interrupt-parent = <&gic>; interrupts = <0 129 4>; clock-names = "clk_main", "clk_apb"; - xlnx,id = <5>; xlnx,bus-width = <128>; power-domains = <&pd_gdma>; }; @@ -378,7 +372,6 @@ interrupt-parent = <&gic>; interrupts = <0 130 4>; clock-names = "clk_main", "clk_apb"; - xlnx,id = <6>; xlnx,bus-width = <128>; power-domains = <&pd_gdma>; }; @@ -390,7 +383,6 @@ interrupt-parent = <&gic>; interrupts = <0 131 4>; clock-names = "clk_main", "clk_apb"; - xlnx,id = <7>; xlnx,bus-width = <128>; power-domains = <&pd_gdma>; }; @@ -412,7 +404,6 @@ reg = <0x0 0xffa80000 0x1000>; interrupt-parent = <&gic>; interrupts = <0 77 4>; - xlnx,id = <0>; xlnx,bus-width = <64>; power-domains = <&pd_adma>; }; @@ -423,7 +414,6 @@ reg = <0x0 0xffa90000 0x1000>; interrupt-parent = <&gic>; interrupts = <0 78 4>; - xlnx,id = <1>; xlnx,bus-width = <64>; power-domains = <&pd_adma>; }; @@ -434,7 +424,6 @@ reg = <0x0 0xffaa0000 0x1000>; interrupt-parent = <&gic>; interrupts = <0 79 4>; - xlnx,id = <2>; xlnx,bus-width = <64>; power-domains = <&pd_adma>; }; @@ -445,7 +434,6 @@ reg = <0x0 0xffab0000 0x1000>; interrupt-parent = <&gic>; interrupts = <0 80 4>; - xlnx,id = <3>; xlnx,bus-width = <64>; power-domains = <&pd_adma>; }; @@ -456,7 +444,6 @@ reg = <0x0 0xffac0000 0x1000>; interrupt-parent = <&gic>; interrupts = <0 81 4>; - xlnx,id = <4>; xlnx,bus-width = <64>; power-domains = <&pd_adma>; }; @@ -467,7 +454,6 @@ reg = <0x0 0xffad0000 0x1000>; interrupt-parent = <&gic>; interrupts = <0 82 4>; - xlnx,id = <5>; xlnx,bus-width = <64>; power-domains = <&pd_adma>; }; @@ -478,7 +464,6 @@ reg = <0x0 0xffae0000 0x1000>; interrupt-parent = <&gic>; interrupts = <0 83 4>; - xlnx,id = <6>; xlnx,bus-width = <64>; power-domains = <&pd_adma>; }; @@ -489,7 +474,6 @@ reg = <0x0 0xffaf0000 0x1000>; interrupt-parent = <&gic>; interrupts = <0 84 4>; - xlnx,id = <7>; xlnx,bus-width = <64>; power-domains = <&pd_adma>; };
Keep dtsi in sync with mainline kernel.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 64438167fbec..ff18596eda06 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -553,10 +553,10 @@ compatible = "xlnx,zynqmp-gpio-1.0"; status = "disabled"; #gpio-cells = <0x2>; - #interrupt-cells = <2>; - interrupt-controller; interrupt-parent = <&gic>; interrupts = <0 16 4>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x0 0xff0a0000 0x1000>; power-domains = <&pd_gpio>; };
From: Hyun Kwon hyun.kwon@xilinx.com
Each plane can be associated with multiple DMA channels. So add index for each DMA channel.
Signed-off-by: Hyun Kwon hyun.kwon@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp.dtsi | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index ff18596eda06..fc75a40baa70 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -836,11 +836,13 @@ xlnx,pixel-format = "rgb565"; plane0 { dmas = <&xlnx_dpdma 3>; - dma-names = "dma"; + dma-names = "dma0"; }; plane1 { - dmas = <&xlnx_dpdma 0>; - dma-names = "dma"; + dmas = <&xlnx_dpdma 0>, + <&xlnx_dpdma 1>, + <&xlnx_dpdma 2>; + dma-names = "dma0", "dma1", "dma2"; }; }; };
This reverts commit 786db82bd5bf09cc8f78c8b14445e843d7566b1c.
Since we are using serdes driver , no need of mapping serdes register space into DP driver.
Signed-off-by: Anurag Kumar Vulisha anuragku@xilinx.com Tested-by: Hyun Kwon hyunk@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index fc75a40baa70..c2f8fc7b70d9 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -850,8 +850,7 @@ xlnx_dp: dp@fd4a0000 { compatible = "xlnx,v-dp"; status = "disabled"; - reg = <0x0 0xfd4a0000 0x1000>, - <0x0 0xfd400000 0x20000>; + reg = <0x0 0xfd4a0000 0x1000>; interrupts = <0 119 4>; interrupt-parent = <&gic>; clock-names = "aclk", "aud_clk";
From: Naga Sureshkumar Relli naga.sureshkumar.relli@xilinx.com
This patch adds edac node for arm cortexa53 to report errors on L1 and L2 caches.
Signed-off-by: Naga Sureshkumar Relli nagasure@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp.dtsi | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index c2f8fc7b70d9..22526268bb4f 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -229,6 +229,10 @@ <1 10 0xf01>; };
+ edac { + compatible = "arm,cortex-a53-edac"; + }; + amba_apu: amba_apu@0 { compatible = "simple-bus"; #address-cells = <2>;
From: Nava kishore Manne nava.manne@xilinx.com
Add support for zynqmp fpga manager.
Signed-off-by: Nava kishore Manne navam@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp.dtsi | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 22526268bb4f..2b84bfbd6369 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -233,6 +233,10 @@ compatible = "arm,cortex-a53-edac"; };
+ pcap { + compatible = "xlnx,zynqmp-pcap-fpga"; + }; + amba_apu: amba_apu@0 { compatible = "simple-bus"; #address-cells = <2>;
Add SMMU description for all tested IPs.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp.dtsi | 73 +++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 72 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 2b84bfbd6369..618378fa3d59 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -315,6 +315,8 @@ interrupts = <0 124 4>; clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <128>; + #stream-id-cells = <1>; + iommus = <&smmu 0x14e8>; power-domains = <&pd_gdma>; };
@@ -326,6 +328,8 @@ interrupts = <0 125 4>; clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <128>; + #stream-id-cells = <1>; + iommus = <&smmu 0x14e9>; power-domains = <&pd_gdma>; };
@@ -337,6 +341,8 @@ interrupts = <0 126 4>; clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <128>; + #stream-id-cells = <1>; + iommus = <&smmu 0x14ea>; power-domains = <&pd_gdma>; };
@@ -348,6 +354,8 @@ interrupts = <0 127 4>; clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <128>; + #stream-id-cells = <1>; + iommus = <&smmu 0x14eb>; power-domains = <&pd_gdma>; };
@@ -359,6 +367,8 @@ interrupts = <0 128 4>; clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <128>; + #stream-id-cells = <1>; + iommus = <&smmu 0x14ec>; power-domains = <&pd_gdma>; };
@@ -370,6 +380,8 @@ interrupts = <0 129 4>; clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <128>; + #stream-id-cells = <1>; + iommus = <&smmu 0x14ed>; power-domains = <&pd_gdma>; };
@@ -381,6 +393,8 @@ interrupts = <0 130 4>; clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <128>; + #stream-id-cells = <1>; + iommus = <&smmu 0x14ee>; power-domains = <&pd_gdma>; };
@@ -392,6 +406,8 @@ interrupts = <0 131 4>; clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <128>; + #stream-id-cells = <1>; + iommus = <&smmu 0x14ef>; power-domains = <&pd_gdma>; };
@@ -413,6 +429,8 @@ interrupt-parent = <&gic>; interrupts = <0 77 4>; xlnx,bus-width = <64>; + #stream-id-cells = <1>; + iommus = <&smmu 0x868>; power-domains = <&pd_adma>; };
@@ -423,6 +441,8 @@ interrupt-parent = <&gic>; interrupts = <0 78 4>; xlnx,bus-width = <64>; + #stream-id-cells = <1>; + iommus = <&smmu 0x869>; power-domains = <&pd_adma>; };
@@ -433,6 +453,8 @@ interrupt-parent = <&gic>; interrupts = <0 79 4>; xlnx,bus-width = <64>; + #stream-id-cells = <1>; + iommus = <&smmu 0x86a>; power-domains = <&pd_adma>; };
@@ -443,6 +465,8 @@ interrupt-parent = <&gic>; interrupts = <0 80 4>; xlnx,bus-width = <64>; + #stream-id-cells = <1>; + iommus = <&smmu 0x86b>; power-domains = <&pd_adma>; };
@@ -453,6 +477,8 @@ interrupt-parent = <&gic>; interrupts = <0 81 4>; xlnx,bus-width = <64>; + #stream-id-cells = <1>; + iommus = <&smmu 0x86c>; power-domains = <&pd_adma>; };
@@ -463,6 +489,8 @@ interrupt-parent = <&gic>; interrupts = <0 82 4>; xlnx,bus-width = <64>; + #stream-id-cells = <1>; + iommus = <&smmu 0x86d>; power-domains = <&pd_adma>; };
@@ -473,6 +501,8 @@ interrupt-parent = <&gic>; interrupts = <0 83 4>; xlnx,bus-width = <64>; + #stream-id-cells = <1>; + iommus = <&smmu 0x86e>; power-domains = <&pd_adma>; };
@@ -483,6 +513,8 @@ interrupt-parent = <&gic>; interrupts = <0 84 4>; xlnx,bus-width = <64>; + #stream-id-cells = <1>; + iommus = <&smmu 0x86f>; power-domains = <&pd_adma>; };
@@ -502,6 +534,8 @@ interrupts = <0 14 4>; #address-cells = <2>; #size-cells = <1>; + #stream-id-cells = <1>; + iommus = <&smmu 0x872>; power-domains = <&pd_nand>; };
@@ -515,6 +549,7 @@ #address-cells = <1>; #size-cells = <0>; #stream-id-cells = <1>; + iommus = <&smmu 0x874>; power-domains = <&pd_eth0>; };
@@ -528,6 +563,7 @@ #address-cells = <1>; #size-cells = <0>; #stream-id-cells = <1>; + iommus = <&smmu 0x875>; power-domains = <&pd_eth1>; };
@@ -541,6 +577,7 @@ #address-cells = <1>; #size-cells = <0>; #stream-id-cells = <1>; + iommus = <&smmu 0x876>; power-domains = <&pd_eth2>; };
@@ -554,6 +591,7 @@ #address-cells = <1>; #size-cells = <0>; #stream-id-cells = <1>; + iommus = <&smmu 0x877>; power-domains = <&pd_eth3>; };
@@ -636,6 +674,8 @@ <0x0 0xc0000000 0x8000000>; #address-cells = <1>; #size-cells = <0>; + #stream-id-cells = <1>; + iommus = <&smmu 0x873>; power-domains = <&pd_qspi>; };
@@ -666,6 +706,8 @@ reg = <0x0 0xff160000 0x1000>; clock-names = "clk_xin", "clk_ahb"; broken-tuning; + #stream-id-cells = <1>; + iommus = <&smmu 0x870>; power-domains = <&pd_sd0>; };
@@ -678,12 +720,15 @@ reg = <0x0 0xff170000 0x1000>; clock-names = "clk_xin", "clk_ahb"; broken-tuning; + #stream-id-cells = <1>; + iommus = <&smmu 0x871>; power-domains = <&pd_sd1>; };
smmu: smmu@fd800000 { compatible = "arm,mmu-500"; reg = <0x0 0xfd800000 0x20000>; + #iommu-cells = <1>; #global-interrupts = <1>; interrupt-parent = <&gic>; interrupts = <0 155 4>, @@ -694,7 +739,29 @@ mmu-masters = < &gem0 0x874 &gem1 0x875 &gem2 0x876 - &gem3 0x877 >; + &gem3 0x877 + &usb0 0x860 + &usb1 0x861 + &qspi 0x873 + &lpd_dma_chan1 0x868 + &lpd_dma_chan2 0x869 + &lpd_dma_chan3 0x86a + &lpd_dma_chan4 0x86b + &lpd_dma_chan5 0x86c + &lpd_dma_chan6 0x86d + &lpd_dma_chan7 0x86e + &lpd_dma_chan8 0x86f + &fpd_dma_chan1 0x14e8 + &fpd_dma_chan2 0x14e9 + &fpd_dma_chan3 0x14ea + &fpd_dma_chan4 0x14eb + &fpd_dma_chan5 0x14ec + &fpd_dma_chan6 0x14ed + &fpd_dma_chan7 0x14ee + &fpd_dma_chan8 0x14ef + &sdhci0 0x870 + &sdhci1 0x871 + &nand0 0x872>; };
spi0: spi@ff040000 { @@ -790,6 +857,8 @@ compatible = "xlnx,zynqmp-dwc3"; clock-names = "bus_clk", "ref_clk"; clocks = <&clk125>, <&clk125>; + #stream-id-cells = <1>; + iommus = <&smmu 0x860>; power-domains = <&pd_usb0>; ranges;
@@ -811,6 +880,8 @@ compatible = "xlnx,zynqmp-dwc3"; clock-names = "bus_clk", "ref_clk"; clocks = <&clk125>, <&clk125>; + #stream-id-cells = <1>; + iommus = <&smmu 0x861>; power-domains = <&pd_usb1>; ranges;
From: Sai Krishna Potthuri lakshmi.sai.krishna.potthuri@xilinx.com
This patch changes the compatible string for sdhci node, adds "xlnx,device_id" and "xlnx,mio_bank" property to sdhci node.
Signed-off-by: Sai Krishna Potthuri lakshmis@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp-ep108.dts | 2 ++ arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 2 ++ arch/arm/dts/zynqmp-zcu102.dts | 1 + arch/arm/dts/zynqmp.dtsi | 6 ++++-- 4 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/zynqmp-ep108.dts b/arch/arm/dts/zynqmp-ep108.dts index db502cf83bad..2483180d38f6 100644 --- a/arch/arm/dts/zynqmp-ep108.dts +++ b/arch/arm/dts/zynqmp-ep108.dts @@ -154,10 +154,12 @@ &sdhci0 { status = "okay"; bus-width = <8>; + xlnx,mio_bank = <2>; };
&sdhci1 { status = "okay"; + xlnx,mio_bank = <1>; };
&spi0 { diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts index f3bca60c7e8d..b3f42977ab3c 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts @@ -159,12 +159,14 @@ &sdhci0 { status = "okay"; bus-width = <8>; + xlnx,mio_bank = <0>; };
/* SD1 with level shifter */ &sdhci1 { status = "okay"; no-1-8-v; /* for 1.0 silicon */ + xlnx,mio_bank = <1>; };
&uart0 { diff --git a/arch/arm/dts/zynqmp-zcu102.dts b/arch/arm/dts/zynqmp-zcu102.dts index 7715aea5bfbc..0e9150e6b1cb 100644 --- a/arch/arm/dts/zynqmp-zcu102.dts +++ b/arch/arm/dts/zynqmp-zcu102.dts @@ -605,6 +605,7 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o &sdhci1 { status = "okay"; no-1-8-v; /* for 1.0 silicon */ + xlnx,mio_bank = <1>; };
&uart0 { diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 618378fa3d59..150472f1e1fb 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -699,13 +699,14 @@
sdhci0: sdhci@ff160000 { u-boot,dm-pre-reloc; - compatible = "arasan,sdhci-8.9a"; + compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 48 4>; reg = <0x0 0xff160000 0x1000>; clock-names = "clk_xin", "clk_ahb"; broken-tuning; + xlnx,device_id = <0>; #stream-id-cells = <1>; iommus = <&smmu 0x870>; power-domains = <&pd_sd0>; @@ -713,13 +714,14 @@
sdhci1: sdhci@ff170000 { u-boot,dm-pre-reloc; - compatible = "arasan,sdhci-8.9a"; + compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 49 4>; reg = <0x0 0xff170000 0x1000>; clock-names = "clk_xin", "clk_ahb"; broken-tuning; + xlnx,device_id = <1>; #stream-id-cells = <1>; iommus = <&smmu 0x871>; power-domains = <&pd_sd1>;
This reverts commit bd750e7a6c515c081b72d4ef108a2bfa691a3fd1
Implemented the new workaround for auto tuning based on zynqmp compatible string, so removed the 'broken-tuning' property.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp.dtsi | 2 -- 1 file changed, 2 deletions(-)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 150472f1e1fb..b796c34449e4 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -705,7 +705,6 @@ interrupts = <0 48 4>; reg = <0x0 0xff160000 0x1000>; clock-names = "clk_xin", "clk_ahb"; - broken-tuning; xlnx,device_id = <0>; #stream-id-cells = <1>; iommus = <&smmu 0x870>; @@ -720,7 +719,6 @@ interrupts = <0 49 4>; reg = <0x0 0xff170000 0x1000>; clock-names = "clk_xin", "clk_ahb"; - broken-tuning; xlnx,device_id = <1>; #stream-id-cells = <1>; iommus = <&smmu 0x871>;
From: Anurag Kumar Vulisha anurag.kumar.vulisha@xilinx.com
This patch adds the ZynqMP GT core device-tree properties for zynqmp.dtsi file.
Signed-off-by: Anurag Kumar Vulisha anuragku@xilinx.com Tested-by: Hyun Kwon hyunk@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index b796c34449e4..edfa03ac678f 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -688,6 +688,29 @@ interrupt-names = "alarm", "sec"; };
+ serdes: zynqmp_phy@fd400000 { + compatible = "xlnx,zynqmp-psgtr"; + status = "disabled"; + reg = <0x0 0xfd400000 0x40000>, + <0x0 0xfd3d0000 0x1000>, + <0x0 0xfd1a0000 0x1000>, + <0x0 0xff5e0000 0x1000>; + reg-names = "serdes", "siou", "fpd", "lpd"; + xlnx,tx_termination_fix; + lane0: lane0 { + #phy-cells = <4>; + }; + lane1: lane1 { + #phy-cells = <4>; + }; + lane2: lane2 { + #phy-cells = <4>; + }; + lane3: lane3 { + #phy-cells = <4>; + }; + }; + sata: ahci@fd0c0000 { compatible = "ceva,ahci-1v84"; status = "disabled";
From: Naga Sureshkumar Relli naga.sureshkumar.relli@xilinx.com
This patch adds ocm controller node in zynqmp.dtsi. needed for OCM edac support.
Signed-off-by: Naga Sureshkumar Relli nagasure@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index edfa03ac678f..49791d34df32 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -629,6 +629,13 @@ power-domains = <&pd_i2c1>; };
+ ocm: memory-controller@ff960000 { + compatible = "xlnx,zynqmp-ocmc-1.0"; + reg = <0x0 0xff960000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 10 4>; + }; + pcie: pcie@fd0e0000 { compatible = "xlnx,nwl-pcie-2.11"; status = "disabled";
Use 64bit size cell for main amba bus instead of 32bit because PCIe node requires it Change 64bit sizes also for all others IPs.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp.dtsi | 130 +++++++++++++++++++++++------------------------ 1 file changed, 65 insertions(+), 65 deletions(-)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 49791d34df32..f67238e89725 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -256,18 +256,18 @@ }; };
- amba: amba@0 { + amba: amba { compatible = "simple-bus"; u-boot,dm-pre-reloc; #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0 0 0xffffffff>; + #size-cells = <2>; + ranges;
can0: can@ff060000 { compatible = "xlnx,zynq-can-1.0"; status = "disabled"; clock-names = "can_clk", "pclk"; - reg = <0x0 0xff060000 0x1000>; + reg = <0x0 0xff060000 0x0 0x1000>; interrupts = <0 23 4>; interrupt-parent = <&gic>; tx-fifo-depth = <0x40>; @@ -279,7 +279,7 @@ compatible = "xlnx,zynq-can-1.0"; status = "disabled"; clock-names = "can_clk", "pclk"; - reg = <0x0 0xff070000 0x1000>; + reg = <0x0 0xff070000 0x0 0x1000>; interrupts = <0 24 4>; interrupt-parent = <&gic>; tx-fifo-depth = <0x40>; @@ -289,7 +289,7 @@
cci: cci@fd6e0000 { compatible = "arm,cci-400"; - reg = <0x0 0xfd6e0000 0x9000>; + reg = <0x0 0xfd6e0000 0x0 0x9000>; ranges = <0x0 0x0 0xfd6e0000 0x10000>; #address-cells = <1>; #size-cells = <1>; @@ -310,7 +310,7 @@ fpd_dma_chan1: dma@fd500000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xfd500000 0x1000>; + reg = <0x0 0xfd500000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 124 4>; clock-names = "clk_main", "clk_apb"; @@ -323,7 +323,7 @@ fpd_dma_chan2: dma@fd510000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xfd510000 0x1000>; + reg = <0x0 0xfd510000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 125 4>; clock-names = "clk_main", "clk_apb"; @@ -336,7 +336,7 @@ fpd_dma_chan3: dma@fd520000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xfd520000 0x1000>; + reg = <0x0 0xfd520000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 126 4>; clock-names = "clk_main", "clk_apb"; @@ -349,7 +349,7 @@ fpd_dma_chan4: dma@fd530000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xfd530000 0x1000>; + reg = <0x0 0xfd530000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 127 4>; clock-names = "clk_main", "clk_apb"; @@ -362,7 +362,7 @@ fpd_dma_chan5: dma@fd540000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xfd540000 0x1000>; + reg = <0x0 0xfd540000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 128 4>; clock-names = "clk_main", "clk_apb"; @@ -375,7 +375,7 @@ fpd_dma_chan6: dma@fd550000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xfd550000 0x1000>; + reg = <0x0 0xfd550000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 129 4>; clock-names = "clk_main", "clk_apb"; @@ -388,7 +388,7 @@ fpd_dma_chan7: dma@fd560000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xfd560000 0x1000>; + reg = <0x0 0xfd560000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 130 4>; clock-names = "clk_main", "clk_apb"; @@ -401,7 +401,7 @@ fpd_dma_chan8: dma@fd570000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xfd570000 0x1000>; + reg = <0x0 0xfd570000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 131 4>; clock-names = "clk_main", "clk_apb"; @@ -414,7 +414,7 @@ gpu: gpu@fd4b0000 { status = "disabled"; compatible = "arm,mali-400", "arm,mali-utgard"; - reg = <0x0 0xfd4b0000 0x30000>; + reg = <0x0 0xfd4b0000 0x0 0x30000>; interrupt-parent = <&gic>; interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>; interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1"; @@ -425,7 +425,7 @@ lpd_dma_chan1: dma@ffa80000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xffa80000 0x1000>; + reg = <0x0 0xffa80000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 77 4>; xlnx,bus-width = <64>; @@ -437,7 +437,7 @@ lpd_dma_chan2: dma@ffa90000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xffa90000 0x1000>; + reg = <0x0 0xffa90000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 78 4>; xlnx,bus-width = <64>; @@ -449,7 +449,7 @@ lpd_dma_chan3: dma@ffaa0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xffaa0000 0x1000>; + reg = <0x0 0xffaa0000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 79 4>; xlnx,bus-width = <64>; @@ -461,7 +461,7 @@ lpd_dma_chan4: dma@ffab0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xffab0000 0x1000>; + reg = <0x0 0xffab0000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 80 4>; xlnx,bus-width = <64>; @@ -473,7 +473,7 @@ lpd_dma_chan5: dma@ffac0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xffac0000 0x1000>; + reg = <0x0 0xffac0000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 81 4>; xlnx,bus-width = <64>; @@ -485,7 +485,7 @@ lpd_dma_chan6: dma@ffad0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xffad0000 0x1000>; + reg = <0x0 0xffad0000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 82 4>; xlnx,bus-width = <64>; @@ -497,7 +497,7 @@ lpd_dma_chan7: dma@ffae0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xffae0000 0x1000>; + reg = <0x0 0xffae0000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 83 4>; xlnx,bus-width = <64>; @@ -509,7 +509,7 @@ lpd_dma_chan8: dma@ffaf0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xffaf0000 0x1000>; + reg = <0x0 0xffaf0000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 84 4>; xlnx,bus-width = <64>; @@ -520,7 +520,7 @@
mc: memory-controller@fd070000 { compatible = "xlnx,zynqmp-ddrc-2.40a"; - reg = <0x0 0xfd070000 0x30000>; + reg = <0x0 0xfd070000 0x0 0x30000>; interrupt-parent = <&gic>; interrupts = <0 112 4>; }; @@ -528,7 +528,7 @@ nand0: nand@ff100000 { compatible = "arasan,nfc-v3p10"; status = "disabled"; - reg = <0x0 0xff100000 0x1000>; + reg = <0x0 0xff100000 0x0 0x1000>; clock-names = "clk_sys", "clk_flash"; interrupt-parent = <&gic>; interrupts = <0 14 4>; @@ -544,7 +544,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 57 4>, <0 57 4>; - reg = <0x0 0xff0b0000 0x1000>; + reg = <0x0 0xff0b0000 0x0 0x1000>; clock-names = "pclk", "hclk", "tx_clk"; #address-cells = <1>; #size-cells = <0>; @@ -558,7 +558,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 59 4>, <0 59 4>; - reg = <0x0 0xff0c0000 0x1000>; + reg = <0x0 0xff0c0000 0x0 0x1000>; clock-names = "pclk", "hclk", "tx_clk"; #address-cells = <1>; #size-cells = <0>; @@ -572,7 +572,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 61 4>, <0 61 4>; - reg = <0x0 0xff0d0000 0x1000>; + reg = <0x0 0xff0d0000 0x0 0x1000>; clock-names = "pclk", "hclk", "tx_clk"; #address-cells = <1>; #size-cells = <0>; @@ -586,7 +586,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 63 4>, <0 63 4>; - reg = <0x0 0xff0e0000 0x1000>; + reg = <0x0 0xff0e0000 0x0 0x1000>; clock-names = "pclk", "hclk", "tx_clk"; #address-cells = <1>; #size-cells = <0>; @@ -603,7 +603,7 @@ interrupts = <0 16 4>; interrupt-controller; #interrupt-cells = <2>; - reg = <0x0 0xff0a0000 0x1000>; + reg = <0x0 0xff0a0000 0x0 0x1000>; power-domains = <&pd_gpio>; };
@@ -612,7 +612,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 17 4>; - reg = <0x0 0xff020000 0x1000>; + reg = <0x0 0xff020000 0x0 0x1000>; #address-cells = <1>; #size-cells = <0>; power-domains = <&pd_i2c0>; @@ -623,7 +623,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 18 4>; - reg = <0x0 0xff030000 0x1000>; + reg = <0x0 0xff030000 0x0 0x1000>; #address-cells = <1>; #size-cells = <0>; power-domains = <&pd_i2c1>; @@ -631,7 +631,7 @@
ocm: memory-controller@ff960000 { compatible = "xlnx,zynqmp-ocmc-1.0"; - reg = <0x0 0xff960000 0x1000>; + reg = <0x0 0xff960000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 10 4>; }; @@ -652,9 +652,9 @@ <0 114 4>; /* MSI_0 [31...0] */ interrupt-names = "misc","dummy","intx", "msi1", "msi0"; msi-parent = <&pcie>; - reg = <0x0 0xfd0e0000 0x1000>, - <0x0 0xfd480000 0x1000>, - <0x0 0xe0000000 0x1000000>; + reg = <0x0 0xfd0e0000 0x0 0x1000>, + <0x0 0xfd480000 0x0 0x1000>, + <0x0 0xe0000000 0x0 0x1000000>; reg-names = "breg", "pcireg", "cfg"; ranges = <0x02000000 0x00000000 0xe1000000 0x00000000 0xe1000000 0 0x0f000000>; interrupt-map-mask = <0x0 0x0 0x0 0x7>; @@ -677,8 +677,8 @@ interrupts = <0 15 4>; interrupt-parent = <&gic>; num-cs = <1>; - reg = <0x0 0xff0f0000 0x1000>, - <0x0 0xc0000000 0x8000000>; + reg = <0x0 0xff0f0000 0x0 0x1000>, + <0x0 0xc0000000 0x0 0x8000000>; #address-cells = <1>; #size-cells = <0>; #stream-id-cells = <1>; @@ -689,7 +689,7 @@ rtc: rtc@ffa60000 { compatible = "xlnx,zynqmp-rtc"; status = "disabled"; - reg = <0x0 0xffa60000 0x100>; + reg = <0x0 0xffa60000 0x0 0x100>; interrupt-parent = <&gic>; interrupts = <0 26 4>, <0 27 4>; interrupt-names = "alarm", "sec"; @@ -698,10 +698,10 @@ serdes: zynqmp_phy@fd400000 { compatible = "xlnx,zynqmp-psgtr"; status = "disabled"; - reg = <0x0 0xfd400000 0x40000>, - <0x0 0xfd3d0000 0x1000>, - <0x0 0xfd1a0000 0x1000>, - <0x0 0xff5e0000 0x1000>; + reg = <0x0 0xfd400000 0x0 0x40000>, + <0x0 0xfd3d0000 0x0 0x1000>, + <0x0 0xfd1a0000 0x0 0x1000>, + <0x0 0xff5e0000 0x0 0x1000>; reg-names = "serdes", "siou", "fpd", "lpd"; xlnx,tx_termination_fix; lane0: lane0 { @@ -721,7 +721,7 @@ sata: ahci@fd0c0000 { compatible = "ceva,ahci-1v84"; status = "disabled"; - reg = <0x0 0xfd0c0000 0x2000>; + reg = <0x0 0xfd0c0000 0x0 0x2000>; interrupt-parent = <&gic>; interrupts = <0 133 4>; power-domains = <&pd_sata>; @@ -733,7 +733,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 48 4>; - reg = <0x0 0xff160000 0x1000>; + reg = <0x0 0xff160000 0x0 0x1000>; clock-names = "clk_xin", "clk_ahb"; xlnx,device_id = <0>; #stream-id-cells = <1>; @@ -747,7 +747,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 49 4>; - reg = <0x0 0xff170000 0x1000>; + reg = <0x0 0xff170000 0x0 0x1000>; clock-names = "clk_xin", "clk_ahb"; xlnx,device_id = <1>; #stream-id-cells = <1>; @@ -757,7 +757,7 @@
smmu: smmu@fd800000 { compatible = "arm,mmu-500"; - reg = <0x0 0xfd800000 0x20000>; + reg = <0x0 0xfd800000 0x0 0x20000>; #iommu-cells = <1>; #global-interrupts = <1>; interrupt-parent = <&gic>; @@ -799,7 +799,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 19 4>; - reg = <0x0 0xff040000 0x1000>; + reg = <0x0 0xff040000 0x0 0x1000>; clock-names = "ref_clk", "pclk"; #address-cells = <1>; #size-cells = <0>; @@ -811,7 +811,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 20 4>; - reg = <0x0 0xff050000 0x1000>; + reg = <0x0 0xff050000 0x0 0x1000>; clock-names = "ref_clk", "pclk"; #address-cells = <1>; #size-cells = <0>; @@ -823,7 +823,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 36 4>, <0 37 4>, <0 38 4>; - reg = <0x0 0xff110000 0x1000>; + reg = <0x0 0xff110000 0x0 0x1000>; timer-width = <32>; power-domains = <&pd_ttc0>; }; @@ -833,7 +833,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 39 4>, <0 40 4>, <0 41 4>; - reg = <0x0 0xff120000 0x1000>; + reg = <0x0 0xff120000 0x0 0x1000>; timer-width = <32>; power-domains = <&pd_ttc1>; }; @@ -843,7 +843,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 42 4>, <0 43 4>, <0 44 4>; - reg = <0x0 0xff130000 0x1000>; + reg = <0x0 0xff130000 0x0 0x1000>; timer-width = <32>; power-domains = <&pd_ttc2>; }; @@ -853,7 +853,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 45 4>, <0 46 4>, <0 47 4>; - reg = <0x0 0xff140000 0x1000>; + reg = <0x0 0xff140000 0x0 0x1000>; timer-width = <32>; power-domains = <&pd_ttc3>; }; @@ -864,7 +864,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 21 4>; - reg = <0x0 0xff000000 0x1000>; + reg = <0x0 0xff000000 0x0 0x1000>; clock-names = "uart_clk", "pclk"; power-domains = <&pd_uart0>; }; @@ -875,14 +875,14 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 22 4>; - reg = <0x0 0xff010000 0x1000>; + reg = <0x0 0xff010000 0x0 0x1000>; clock-names = "uart_clk", "pclk"; power-domains = <&pd_uart1>; };
usb0: usb0 { #address-cells = <2>; - #size-cells = <1>; + #size-cells = <2>; status = "disabled"; compatible = "xlnx,zynqmp-dwc3"; clock-names = "bus_clk", "ref_clk"; @@ -895,7 +895,7 @@ dwc3_0: dwc3@fe200000 { compatible = "snps,dwc3"; status = "disabled"; - reg = <0x0 0xfe200000 0x40000>; + reg = <0x0 0xfe200000 0x0 0x40000>; interrupt-parent = <&gic>; interrupts = <0 65 4>; /* snps,quirk-frame-length-adjustment = <0x20>; */ @@ -905,7 +905,7 @@
usb1: usb1 { #address-cells = <2>; - #size-cells = <1>; + #size-cells = <2>; status = "disabled"; compatible = "xlnx,zynqmp-dwc3"; clock-names = "bus_clk", "ref_clk"; @@ -918,7 +918,7 @@ dwc3_1: dwc3@fe300000 { compatible = "snps,dwc3"; status = "disabled"; - reg = <0x0 0xfe300000 0x40000>; + reg = <0x0 0xfe300000 0x0 0x40000>; interrupt-parent = <&gic>; interrupts = <0 70 4>; /* snps,quirk-frame-length-adjustment = <0x20>; */ @@ -931,7 +931,7 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 113 1>; - reg = <0x0 0xfd4d0000 0x1000>; + reg = <0x0 0xfd4d0000 0x0 0x1000>; timeout-sec = <10>; };
@@ -959,7 +959,7 @@ xlnx_dp: dp@fd4a0000 { compatible = "xlnx,v-dp"; status = "disabled"; - reg = <0x0 0xfd4a0000 0x1000>; + reg = <0x0 0xfd4a0000 0x0 0x1000>; interrupts = <0 119 4>; interrupt-parent = <&gic>; clock-names = "aclk", "aud_clk"; @@ -1005,9 +1005,9 @@ xlnx_dp_sub: dp_sub@fd4aa000 { compatible = "xlnx,dp-sub"; status = "disabled"; - reg = <0x0 0xfd4aa000 0x1000>, - <0x0 0xfd4ab000 0x1000>, - <0x0 0xfd4ac000 0x1000>; + reg = <0x0 0xfd4aa000 0x0 0x1000>, + <0x0 0xfd4ab000 0x0 0x1000>, + <0x0 0xfd4ac000 0x0 0x1000>; reg-names = "blend", "av_buf", "aud"; xlnx,output-fmt = "rgb"; xlnx,vid-fmt = "yuyv"; @@ -1017,7 +1017,7 @@ xlnx_dpdma: dma@fd4c0000 { compatible = "xlnx,dpdma"; status = "disabled"; - reg = <0x0 0xfd4c0000 0x1000>; + reg = <0x0 0xfd4c0000 0x0 0x1000>; interrupts = <0 122 4>; interrupt-parent = <&gic>; clock-names = "axi_clk";
From: Kedareswara rao Appana appana.durga.rao@xilinx.com
LPDDMA default allows only secured access. inorder to enable these dma channels, one should ensure that it allows non secure access. This patch updates the same.
Reported-by: Sai Pavan Boddu saipava@xilinx.com Signed-off-by: Kedareswara rao Appana appanad@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp.dtsi | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index f67238e89725..aeeccbf9e9d0 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -421,7 +421,10 @@ power-domains = <&pd_gpu>; };
- /* ADMA */ + /* LPDDMA default allows only secured access. inorder to enable + * These dma channels, Users should ensure that these dma + * Channels are allowed for non secure access. + */ lpd_dma_chan1: dma@ffa80000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0";
From: Kedareswara rao Appana appana.durga.rao@xilinx.com
Zynqmp DMA driver expects two clocks (main clock and apb clock) For LPDDMA channels the two clocks are missing in the Dma node resulting probe failure.
xilinx-zynqmp-dma ffa80000.dma: main clock not found. xilinx-zynqmp-dma ffa80000.dma: Probing channel failed xilinx-zynqmp-dma: probe of ffa80000.dma failed with error -2
This patch fixes this issue.
Signed-off-by: Kedareswara rao Appana appanad@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index aeeccbf9e9d0..5b4fe0962e05 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -428,6 +428,7 @@ lpd_dma_chan1: dma@ffa80000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; + clock-names = "clk_main", "clk_apb"; reg = <0x0 0xffa80000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 77 4>; @@ -440,6 +441,7 @@ lpd_dma_chan2: dma@ffa90000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; + clock-names = "clk_main", "clk_apb"; reg = <0x0 0xffa90000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 78 4>; @@ -452,6 +454,7 @@ lpd_dma_chan3: dma@ffaa0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; + clock-names = "clk_main", "clk_apb"; reg = <0x0 0xffaa0000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 79 4>; @@ -464,6 +467,7 @@ lpd_dma_chan4: dma@ffab0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; + clock-names = "clk_main", "clk_apb"; reg = <0x0 0xffab0000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 80 4>; @@ -476,6 +480,7 @@ lpd_dma_chan5: dma@ffac0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; + clock-names = "clk_main", "clk_apb"; reg = <0x0 0xffac0000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 81 4>; @@ -488,6 +493,7 @@ lpd_dma_chan6: dma@ffad0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; + clock-names = "clk_main", "clk_apb"; reg = <0x0 0xffad0000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 82 4>; @@ -500,6 +506,7 @@ lpd_dma_chan7: dma@ffae0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; + clock-names = "clk_main", "clk_apb"; reg = <0x0 0xffae0000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 83 4>; @@ -512,6 +519,7 @@ lpd_dma_chan8: dma@ffaf0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; + clock-names = "clk_main", "clk_apb"; reg = <0x0 0xffaf0000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 84 4>;
-----Original Message----- From: Michal Simek [mailto:monstr@monstr.eu] On Behalf Of Michal Simek Sent: November 11, 2016 05:42 To: u-boot@lists.denx.de Cc: Appana Durga Kedareswara Rao appanad@xilinx.com; Naga Sureshkumar Relli nagasure@xilinx.com; Bharat Kumar Gogada bharatku@xilinx.com; Hyun Kwon hyunk@xilinx.com; Albert Aribaud albert.u.boot@aribaud.net; Soren Brinkmann sorenb@xilinx.com; Filip Drazic filip.drazic@aggios.com Subject: [PATCH 26/27] ARM64: zynqmp: Add clocks for LPDDMA
From: Kedareswara rao Appana appana.durga.rao@xilinx.com
Zynqmp DMA driver expects two clocks (main clock and apb clock) For LPDDMA channels the two clocks are missing in the Dma node resulting probe failure.
xilinx-zynqmp-dma ffa80000.dma: main clock not found. xilinx-zynqmp-dma ffa80000.dma: Probing channel failed xilinx-zynqmp-dma: probe of ffa80000.dma failed with error -2
This patch fixes this issue.
Signed-off-by: Kedareswara rao Appana appanad@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com
arch/arm/dts/zynqmp.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index aeeccbf9e9d0..5b4fe0962e05 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -428,6 +428,7 @@ lpd_dma_chan1: dma@ffa80000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0";
clock-names = "clk_main", "clk_apb"; reg = <0x0 0xffa80000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 77 4>;
Am I missing something? Adding 'clock-names' without 'clocks' doesn't seem right.
Sören
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On 11.11.2016 18:49, Soren Brinkmann wrote:
-----Original Message----- From: Michal Simek [mailto:monstr@monstr.eu] On Behalf Of Michal Simek Sent: November 11, 2016 05:42 To: u-boot@lists.denx.de Cc: Appana Durga Kedareswara Rao appanad@xilinx.com; Naga Sureshkumar Relli nagasure@xilinx.com; Bharat Kumar Gogada bharatku@xilinx.com; Hyun Kwon hyunk@xilinx.com; Albert Aribaud albert.u.boot@aribaud.net; Soren Brinkmann sorenb@xilinx.com; Filip Drazic filip.drazic@aggios.com Subject: [PATCH 26/27] ARM64: zynqmp: Add clocks for LPDDMA
From: Kedareswara rao Appana appana.durga.rao@xilinx.com
Zynqmp DMA driver expects two clocks (main clock and apb clock) For LPDDMA channels the two clocks are missing in the Dma node resulting probe failure.
xilinx-zynqmp-dma ffa80000.dma: main clock not found. xilinx-zynqmp-dma ffa80000.dma: Probing channel failed xilinx-zynqmp-dma: probe of ffa80000.dma failed with error -2
This patch fixes this issue.
Signed-off-by: Kedareswara rao Appana appanad@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com
arch/arm/dts/zynqmp.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index aeeccbf9e9d0..5b4fe0962e05 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -428,6 +428,7 @@ lpd_dma_chan1: dma@ffa80000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0";
clock-names = "clk_main", "clk_apb"; reg = <0x0 0xffa80000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 77 4>;Am I missing something? Adding 'clock-names' without 'clocks' doesn't seem right.
Clocks were added in 1/27 http://lists.denx.de/pipermail/u-boot/2016-November/272338.html
The reason for this split is that this is cherry-pick of patches we did in Xilinx tree.
Thanks, Michal
From: Bharat Kumar Gogada bharat.kumar.gogada@xilinx.com
Adding prefetchable memory space to pcie device tree node. Shifting configuration space to 64-bit address space. Removing pcie device tree node from amba as it requires size-cells=<2> in order to access 64-bit address space.
Signed-off-by: Bharat Kumar Gogada bharatku@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 5b4fe0962e05..ab5c243c61d3 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -665,9 +665,10 @@ msi-parent = <&pcie>; reg = <0x0 0xfd0e0000 0x0 0x1000>, <0x0 0xfd480000 0x0 0x1000>, - <0x0 0xe0000000 0x0 0x1000000>; + <0x80 0x00000000 0x0 0x1000000>; reg-names = "breg", "pcireg", "cfg"; - ranges = <0x02000000 0x00000000 0xe1000000 0x00000000 0xe1000000 0 0x0f000000>; + ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000 /* non-prefetchable memory */ + 0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */ interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>, <0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
participants (2)
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Michal Simek -
Soren Brinkmann