[PATCH v1 1/3] dm: serial: Add clock member to struct serial_device_info
Some callers of serial_getinfo() would like to know the UART base clock speed in order to make decision what to pass to OS in some cases. In particular, ACPI SPCR table expects only certain base clock speed and thus we have to act accordingly.
Signed-off-by: Andy Shevchenko andriy.shevchenko@linux.intel.com --- drivers/serial/sandbox.c | 1 + include/serial.h | 3 +++ test/dm/serial.c | 1 + 3 files changed, 5 insertions(+)
diff --git a/drivers/serial/sandbox.c b/drivers/serial/sandbox.c index 1af5cc12f3..545ff3f747 100644 --- a/drivers/serial/sandbox.c +++ b/drivers/serial/sandbox.c @@ -198,6 +198,7 @@ static int sandbox_serial_getinfo(struct udevice *dev, .reg_width = 1, .reg_offset = 0, .reg_shift = 0, + .clock = SERIAL_DEFAULT_CLOCK, };
if (!serial_info) diff --git a/include/serial.h b/include/serial.h index 104f34ff91..54b21a0470 100644 --- a/include/serial.h +++ b/include/serial.h @@ -139,6 +139,7 @@ enum adr_space_type { * @reg_width: size (in bytes) of the IO accesses to the registers * @reg_offset: offset to apply to the @addr from the start of the registers * @reg_shift: quantity to shift the register offsets by + * @clock: UART base clock speed in Hz * @baudrate: baud rate */ struct serial_device_info { @@ -148,10 +149,12 @@ struct serial_device_info { u8 reg_width; u8 reg_offset; u8 reg_shift; + unsigned int clock; unsigned int baudrate; };
#define SERIAL_DEFAULT_ADDRESS 0xBADACCE5 +#define SERIAL_DEFAULT_CLOCK (16 * 115200)
/** * struct struct dm_serial_ops - Driver model serial operations diff --git a/test/dm/serial.c b/test/dm/serial.c index 3d741a8c36..c6be6ab7ab 100644 --- a/test/dm/serial.c +++ b/test/dm/serial.c @@ -29,6 +29,7 @@ static int dm_test_serial(struct unit_test_state *uts) ut_assertok(serial_getinfo(dev_serial, &info_serial)); ut_assert(info_serial.type == SERIAL_CHIP_UNKNOWN); ut_assert(info_serial.addr == SERIAL_DEFAULT_ADDRESS); + ut_assert(info_serial.clock == SERIAL_DEFAULT_CLOCK); /* * test with a parameter which is NULL pointer */
Some callers may need the UART base clock speed value. Provide it in the ->getinfo() callback.
Signed-off-by: Andy Shevchenko andriy.shevchenko@linux.intel.com --- drivers/serial/ns16550.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 1fcbc35015..386b5e04c8 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -476,6 +476,7 @@ static int ns16550_serial_getinfo(struct udevice *dev, info->reg_width = plat->reg_width; info->reg_shift = plat->reg_shift; info->reg_offset = plat->reg_offset; + info->clock = plat->clock; return 0; }
On Thu, 27 Feb 2020 at 07:22, Andy Shevchenko andriy.shevchenko@linux.intel.com wrote:
Some callers may need the UART base clock speed value. Provide it in the ->getinfo() callback.
Signed-off-by: Andy Shevchenko andriy.shevchenko@linux.intel.com
drivers/serial/ns16550.c | 1 + 1 file changed, 1 insertion(+)
Reviewed-by: Simon Glass sjg@chromium.org
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 1fcbc35015..386b5e04c8 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -476,6 +476,7 @@ static int ns16550_serial_getinfo(struct udevice *dev, info->reg_width = plat->reg_width; info->reg_shift = plat->reg_shift; info->reg_offset = plat->reg_offset;
info->clock = plat->clock;
blank line before return
return 0;}
-- 2.25.0
On Fri, Feb 28, 2020 at 7:41 AM Simon Glass sjg@chromium.org wrote:
On Thu, 27 Feb 2020 at 07:22, Andy Shevchenko andriy.shevchenko@linux.intel.com wrote:
Some callers may need the UART base clock speed value. Provide it in the ->getinfo() callback.
Signed-off-by: Andy Shevchenko andriy.shevchenko@linux.intel.com
drivers/serial/ns16550.c | 1 + 1 file changed, 1 insertion(+)
Reviewed-by: Simon Glass sjg@chromium.org
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 1fcbc35015..386b5e04c8 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -476,6 +476,7 @@ static int ns16550_serial_getinfo(struct udevice *dev, info->reg_width = plat->reg_width; info->reg_shift = plat->reg_shift; info->reg_offset = plat->reg_offset;
info->clock = plat->clock;blank line before return
I can fix this when applying.
return 0;}
Reviewed-by: Bin Meng bmeng.cn@gmail.com
On Wed, Apr 15, 2020 at 10:19 PM Bin Meng bmeng.cn@gmail.com wrote:
On Fri, Feb 28, 2020 at 7:41 AM Simon Glass sjg@chromium.org wrote:
On Thu, 27 Feb 2020 at 07:22, Andy Shevchenko andriy.shevchenko@linux.intel.com wrote:
Some callers may need the UART base clock speed value. Provide it in the ->getinfo() callback.
Signed-off-by: Andy Shevchenko andriy.shevchenko@linux.intel.com
drivers/serial/ns16550.c | 1 + 1 file changed, 1 insertion(+)
Reviewed-by: Simon Glass sjg@chromium.org
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 1fcbc35015..386b5e04c8 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -476,6 +476,7 @@ static int ns16550_serial_getinfo(struct udevice *dev, info->reg_width = plat->reg_width; info->reg_shift = plat->reg_shift; info->reg_offset = plat->reg_offset;
info->clock = plat->clock;blank line before return
I can fix this when applying.
return 0;}
Reviewed-by: Bin Meng bmeng.cn@gmail.com
applied to u-boot-x86, thanks!
SPCR has no clue if the UART base clock speed is different to the default one. However, the SPCR 1.04 defines baud rate 0 as a preconfigured state of UART and OS is supposed not to touch the configuration of the serial device.
Linux kernel supports that starting from v5.0, see commit b413b1abeb21 ("ACPI: SPCR: Consider baud rate 0 as preconfigured state") for the details.
Signed-off-by: Andy Shevchenko andriy.shevchenko@linux.intel.com --- arch/x86/lib/acpi_table.c | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c index 66e32f21bd..074987e294 100644 --- a/arch/x86/lib/acpi_table.c +++ b/arch/x86/lib/acpi_table.c @@ -471,6 +471,15 @@ static void acpi_create_spcr(struct acpi_spcr *spcr) spcr->pci_device_id = 0xffff; spcr->pci_vendor_id = 0xffff;
+ /* + * SPCR has no clue if the UART base clock speed is different + * to the default one. However, the SPCR 1.04 defines baud rate + * 0 as a preconfigured state of UART and OS is supposed not + * to touch the configuration of the serial device. + */ + if (serial_info.clock != SERIAL_DEFAULT_CLOCK) + spcr->baud_rate = 0; + /* Fix checksum */ header->checksum = table_compute_checksum((void *)spcr, header->length); }
On Thu, Feb 27, 2020 at 11:22 PM Andy Shevchenko andriy.shevchenko@linux.intel.com wrote:
SPCR has no clue if the UART base clock speed is different to the default one. However, the SPCR 1.04 defines baud rate 0 as a preconfigured state of UART and OS is supposed not to touch the configuration of the serial device.
Linux kernel supports that starting from v5.0, see commit b413b1abeb21 ("ACPI: SPCR: Consider baud rate 0 as preconfigured state") for the details.
Signed-off-by: Andy Shevchenko andriy.shevchenko@linux.intel.com
arch/x86/lib/acpi_table.c | 9 +++++++++ 1 file changed, 9 insertions(+)
Reviewed-by: Bin Meng bmeng.cn@gmail.com
On Wed, Apr 15, 2020 at 10:20 PM Bin Meng bmeng.cn@gmail.com wrote:
On Thu, Feb 27, 2020 at 11:22 PM Andy Shevchenko andriy.shevchenko@linux.intel.com wrote:
SPCR has no clue if the UART base clock speed is different to the default one. However, the SPCR 1.04 defines baud rate 0 as a preconfigured state of UART and OS is supposed not to touch the configuration of the serial device.
Linux kernel supports that starting from v5.0, see commit b413b1abeb21 ("ACPI: SPCR: Consider baud rate 0 as preconfigured state") for the details.
Signed-off-by: Andy Shevchenko andriy.shevchenko@linux.intel.com
arch/x86/lib/acpi_table.c | 9 +++++++++ 1 file changed, 9 insertions(+)
Reviewed-by: Bin Meng bmeng.cn@gmail.com
applied to u-boot-x86, thanks!
On Thu, 27 Feb 2020 at 07:22, Andy Shevchenko andriy.shevchenko@linux.intel.com wrote:
Some callers of serial_getinfo() would like to know the UART base clock speed in order to make decision what to pass to OS in some cases. In particular, ACPI SPCR table expects only certain base clock speed and thus we have to act accordingly.
Signed-off-by: Andy Shevchenko andriy.shevchenko@linux.intel.com
drivers/serial/sandbox.c | 1 + include/serial.h | 3 +++ test/dm/serial.c | 1 + 3 files changed, 5 insertions(+)
Reviewed-by: Simon Glass sjg@chromium.org
On Fri, Feb 28, 2020 at 7:41 AM Simon Glass sjg@chromium.org wrote:
On Thu, 27 Feb 2020 at 07:22, Andy Shevchenko andriy.shevchenko@linux.intel.com wrote:
Some callers of serial_getinfo() would like to know the UART base clock speed in order to make decision what to pass to OS in some cases. In particular, ACPI SPCR table expects only certain base clock speed and thus we have to act accordingly.
Signed-off-by: Andy Shevchenko andriy.shevchenko@linux.intel.com
drivers/serial/sandbox.c | 1 + include/serial.h | 3 +++ test/dm/serial.c | 1 + 3 files changed, 5 insertions(+)
Reviewed-by: Simon Glass sjg@chromium.org
Reviewed-by: Bin Meng bmeng.cn@gmail.com
On Wed, Apr 15, 2020 at 10:19 PM Bin Meng bmeng.cn@gmail.com wrote:
On Fri, Feb 28, 2020 at 7:41 AM Simon Glass sjg@chromium.org wrote:
On Thu, 27 Feb 2020 at 07:22, Andy Shevchenko andriy.shevchenko@linux.intel.com wrote:
Some callers of serial_getinfo() would like to know the UART base clock speed in order to make decision what to pass to OS in some cases. In particular, ACPI SPCR table expects only certain base clock speed and thus we have to act accordingly.
Signed-off-by: Andy Shevchenko andriy.shevchenko@linux.intel.com
drivers/serial/sandbox.c | 1 + include/serial.h | 3 +++ test/dm/serial.c | 1 + 3 files changed, 5 insertions(+)
Reviewed-by: Simon Glass sjg@chromium.org
Reviewed-by: Bin Meng bmeng.cn@gmail.com
applied to u-boot-x86, thanks!
participants (3)
-
Andy Shevchenko -
Bin Meng -
Simon Glass