[PATCH] mtd: spi-nor-ids: add xtxtech part#
adding xtxtech part numbers
Signed-off-by: Bruce Suen bruce_suen@163.com --- drivers/mtd/spi/spi-nor-ids.c | 38 +++++++++++++++++++++++++++++++++-- 1 file changed, 36 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 3f8b796789..9a079c851d 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -528,8 +528,42 @@ const struct flash_info spi_nor_ids[] = { { INFO("XM25QH128A", 0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, #endif #ifdef CONFIG_SPI_FLASH_XTX - /* XTX Technology (Shenzhen) Limited */ - { INFO("xt25f128b", 0x0b4018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + /* XTX Technology Limited */ + /* adding these 3V QSPI flash parts */ + { INFO("xt25f08", 0x0b4014, 0, 64 * 1024, 16, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25f16", 0x0b4015, 0, 64 * 1024, 32, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25f32", 0x0b4016, 0, 64 * 1024, 64, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25f64", 0x0b4017, 0, 64 * 1024, 128, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25f128", 0x0b4018, 0, 64 * 1024, 256, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25f256", 0x0b4019, 0, 64 * 1024, 512, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, + /* adding these 1.8V QSPI flash parts */ + { INFO("xt25q08", 0x0b6014, 0, 64 * 1024, 16, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25q16", 0x0b6015, 0, 64 * 1024, 32, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25q32", 0x0b6016, 0, 64 * 1024, 64, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25q64", 0x0b6017, 0, 64 * 1024, 128, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25q128", 0x0b6018, 0, 64 * 1024, 256, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25q256", 0x0b6019, 0, 64 * 1024, 512, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, + { INFO("xt25q512", 0x0b601A, 0, 64 * 1024, 1024, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, + { INFO("xt25q01g", 0x0b601B, 0, 64 * 1024, 2048, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, + /* adding these wide voltage QSPI flash parts */ + { INFO("xt25w512", 0x0b651A, 0, 64 * 1024, 1024, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, + { INFO("xt25w01g", 0x0b651B, 0, 64 * 1024, 2048, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, #endif { }, };
On Wed, Jun 7, 2023 at 8:48 AM Bruce Suen bruce_suen@163.com wrote:
adding xtxtech part numbers
Signed-off-by: Bruce Suen bruce_suen@163.com
Rework on commit head, it is unclear.
drivers/mtd/spi/spi-nor-ids.c | 38 +++++++++++++++++++++++++++++++++-- 1 file changed, 36 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 3f8b796789..9a079c851d 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -528,8 +528,42 @@ const struct flash_info spi_nor_ids[] = { { INFO("XM25QH128A", 0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, #endif #ifdef CONFIG_SPI_FLASH_XTX
/* XTX Technology (Shenzhen) Limited */{ INFO("xt25f128b", 0x0b4018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
Why were these existing id's removed?
Jagan
On 6/11/23 06:37, Jagan Teki wrote:
On Wed, Jun 7, 2023 at 8:48 AM Bruce Suen bruce_suen@163.com wrote:
adding xtxtech part numbers
Signed-off-by: Bruce Suen bruce_suen@163.com
Rework on commit head, it is unclear.
Thanks for your comment,I will rework on commit head in V2 like this:
Adding the following XTX part numbers to the list:
xt25f08: 3V QSPI, 8Mbit
xt25f16: 3V QSPI, 16Mbit
xt25f32: 3V QSPI, 32Mbit
xt25f64: 3V QSPI, 64Mbit
xt25f128: 3V QSPI, 128Mbit
xt25f256: 3V QSPI, 256Mbit
xt25q08: 1.8V QSPI, 8Mbit
xt25q16: 1.8V QSPI, 16Mbit
xt25q32: 1.8V QSPI, 32Mbit
xt25q64: 1.8V QSPI, 64Mbit
xt25q128: 1.8V QSPI, 128Mbit
xt25q256: 1.8V QSPI, 256Mbit
xt25q512: 1.8V QSPI, 512Mbit
xt25q01g: 1.8V QSPI, 1Gbit
xt25w512: wide voltage, QSPI, 512Mbit
xt25w01g: wide voltage, QSPI, 1Gbit
drivers/mtd/spi/spi-nor-ids.c | 38 +++++++++++++++++++++++++++++++++-- 1 file changed, 36 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 3f8b796789..9a079c851d 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -528,8 +528,42 @@ const struct flash_info spi_nor_ids[] = { { INFO("XM25QH128A", 0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, #endif #ifdef CONFIG_SPI_FLASH_XTX
/* XTX Technology (Shenzhen) Limited */{ INFO("xt25f128b", 0x0b4018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },Why were these existing id's removed?
Jagan
For 3.3v 32Mbit,There are two part numbers: xt25f128b(65nm) and xt25f128f(55nm).They have same id,so I removed xt25f128b and add xt25f128
add following XTX part numbers to the list:
xt25f08: 3V QSPI, 8Mbit xt25f16: 3V QSPI, 16Mbit xt25f32: 3V QSPI, 32Mbit xt25f64: 3V QSPI, 64Mbit xt25f128: 3V QSPI, 128Mbit xt25f256: 3V QSPI, 256Mbit xt25q08: 1.8V QSPI, 8Mbit xt25q16: 1.8V QSPI, 16Mbit xt25q32: 1.8V QSPI, 32Mbit xt25q64: 1.8V QSPI, 64Mbit xt25q128: 1.8V QSPI, 128Mbit xt25q256: 1.8V QSPI, 256Mbit xt25q512: 1.8V QSPI, 512Mbit xt25q01g: 1.8V QSPI, 1Gbit xt25w512: wide voltage, QSPI, 512Mbit xt25w01g: wide voltage, QSPI, 1Gbit
remove xt25f128b and add xt25f128,because xt25f128b andxt25f128f share same jdec id,we use xt25f128 instead.
Signed-off-by: Bruce Suen bruce_suen@163.com --- V2: modify commit head,add detailed part numbers --- drivers/mtd/spi/spi-nor-ids.c | 38 +++++++++++++++++++++++++++++++++-- 1 file changed, 36 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 3f8b796789..9a079c851d 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -528,8 +528,42 @@ const struct flash_info spi_nor_ids[] = { { INFO("XM25QH128A", 0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, #endif #ifdef CONFIG_SPI_FLASH_XTX - /* XTX Technology (Shenzhen) Limited */ - { INFO("xt25f128b", 0x0b4018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + /* XTX Technology Limited */ + /* adding these 3V QSPI flash parts */ + { INFO("xt25f08", 0x0b4014, 0, 64 * 1024, 16, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25f16", 0x0b4015, 0, 64 * 1024, 32, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25f32", 0x0b4016, 0, 64 * 1024, 64, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25f64", 0x0b4017, 0, 64 * 1024, 128, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25f128", 0x0b4018, 0, 64 * 1024, 256, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25f256", 0x0b4019, 0, 64 * 1024, 512, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, + /* adding these 1.8V QSPI flash parts */ + { INFO("xt25q08", 0x0b6014, 0, 64 * 1024, 16, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25q16", 0x0b6015, 0, 64 * 1024, 32, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25q32", 0x0b6016, 0, 64 * 1024, 64, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25q64", 0x0b6017, 0, 64 * 1024, 128, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25q128", 0x0b6018, 0, 64 * 1024, 256, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25q256", 0x0b6019, 0, 64 * 1024, 512, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, + { INFO("xt25q512", 0x0b601A, 0, 64 * 1024, 1024, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, + { INFO("xt25q01g", 0x0b601B, 0, 64 * 1024, 2048, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, + /* adding these wide voltage QSPI flash parts */ + { INFO("xt25w512", 0x0b651A, 0, 64 * 1024, 1024, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, + { INFO("xt25w01g", 0x0b651B, 0, 64 * 1024, 2048, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, #endif { }, };
On Tue, Jun 13, 2023 at 11:23 AM Bruce Suen bruce_suen@163.com wrote:
add following XTX part numbers to the list:
xt25f08: 3V QSPI, 8Mbit xt25f16: 3V QSPI, 16Mbit xt25f32: 3V QSPI, 32Mbit xt25f64: 3V QSPI, 64Mbit xt25f128: 3V QSPI, 128Mbit xt25f256: 3V QSPI, 256Mbit xt25q08: 1.8V QSPI, 8Mbit xt25q16: 1.8V QSPI, 16Mbit xt25q32: 1.8V QSPI, 32Mbit xt25q64: 1.8V QSPI, 64Mbit xt25q128: 1.8V QSPI, 128Mbit xt25q256: 1.8V QSPI, 256Mbit xt25q512: 1.8V QSPI, 512Mbit xt25q01g: 1.8V QSPI, 1Gbit xt25w512: wide voltage, QSPI, 512Mbit xt25w01g: wide voltage, QSPI, 1Gbit
remove xt25f128b and add xt25f128,because xt25f128b andxt25f128f share same jdec id,we use xt25f128 instead.
Signed-off-by: Bruce Suen bruce_suen@163.com
V2: modify commit head,add detailed part numbers
drivers/mtd/spi/spi-nor-ids.c | 38 +++++++++++++++++++++++++++++++++-- 1 file changed, 36 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 3f8b796789..9a079c851d 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -528,8 +528,42 @@ const struct flash_info spi_nor_ids[] = { { INFO("XM25QH128A", 0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, #endif #ifdef CONFIG_SPI_FLASH_XTX
/* XTX Technology (Shenzhen) Limited */{ INFO("xt25f128b", 0x0b4018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
/* XTX Technology Limited */
Why "(Shenzhen)" dropped?
Jagan.
Hi Jagan,
XTX changed name from "XTX Technology (Shenzhen) Limited" to "XTX Technology Limited" since 2020,
so I removed "(Shenzhen)" .
On 6/19/23 02:39, Jagan Teki wrote:
On Tue, Jun 13, 2023 at 11:23 AM Bruce Suen bruce_suen@163.com wrote:
add following XTX part numbers to the list:
xt25f08: 3V QSPI, 8Mbit xt25f16: 3V QSPI, 16Mbit xt25f32: 3V QSPI, 32Mbit xt25f64: 3V QSPI, 64Mbit xt25f128: 3V QSPI, 128Mbit xt25f256: 3V QSPI, 256Mbit xt25q08: 1.8V QSPI, 8Mbit xt25q16: 1.8V QSPI, 16Mbit xt25q32: 1.8V QSPI, 32Mbit xt25q64: 1.8V QSPI, 64Mbit xt25q128: 1.8V QSPI, 128Mbit xt25q256: 1.8V QSPI, 256Mbit xt25q512: 1.8V QSPI, 512Mbit xt25q01g: 1.8V QSPI, 1Gbit xt25w512: wide voltage, QSPI, 512Mbit xt25w01g: wide voltage, QSPI, 1Gbit
remove xt25f128b and add xt25f128,because xt25f128b andxt25f128f share same jdec id,we use xt25f128 instead.
Signed-off-by: Bruce Suen bruce_suen@163.com
V2: modify commit head,add detailed part numbers
drivers/mtd/spi/spi-nor-ids.c | 38 +++++++++++++++++++++++++++++++++-- 1 file changed, 36 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 3f8b796789..9a079c851d 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -528,8 +528,42 @@ const struct flash_info spi_nor_ids[] = { { INFO("XM25QH128A", 0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, #endif #ifdef CONFIG_SPI_FLASH_XTX
/* XTX Technology (Shenzhen) Limited */{ INFO("xt25f128b", 0x0b4018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
/* XTX Technology Limited */Why "(Shenzhen)" dropped?
Jagan.
On Mon, Jun 19, 2023 at 12:25 PM Bruce Suen bruce_suen@163.com wrote:
Hi Jagan,
XTX changed name from "XTX Technology (Shenzhen) Limited" to "XTX Technology Limited" since 2020,
so I removed "(Shenzhen)" .
Please reply in-line. and add a separate patch for it with a proper commit message as proof.
Thanks, Jagan.
On 6/19/23 03:01, Jagan Teki wrote:
On Mon, Jun 19, 2023 at 12:25 PM Bruce Suen bruce_suen@163.com wrote:
Hi Jagan,
XTX changed name from "XTX Technology (Shenzhen) Limited" to "XTX Technology Limited" since 2020,
so I removed "(Shenzhen)" .
Please reply in-line. and add a separate patch for it with a proper commit message as proof.
Thanks, Jagan.
Sorry,my last mail not reply in-line; Do you mean that I can sent version V3 with two patchs(1/2,2/2),one
of which is to add part numbers and the other is to change comment from "XTX Technology (Shenzhen) Limited"
to "XTX Technology Limited"
Thanks, Bruce Suen.
On Mon, Jun 19, 2023 at 1:51 PM Bruce Suen bruce_suen@163.com wrote:
On 6/19/23 03:01, Jagan Teki wrote:
On Mon, Jun 19, 2023 at 12:25 PM Bruce Suen bruce_suen@163.com wrote:
Hi Jagan,
XTX changed name from "XTX Technology (Shenzhen) Limited" to "XTX Technology Limited" since 2020,
so I removed "(Shenzhen)" .
Please reply in-line. and add a separate patch for it with a proper commit message as proof.
Thanks, Jagan.
Sorry,my last mail not reply in-line; Do you mean that I can sent version V3 with two patchs(1/2,2/2),one
of which is to add part numbers and the other is to change comment from "XTX Technology (Shenzhen) Limited"
to "XTX Technology Limited"
patch 1: change the company name patch 2: add new parts.
Thanks, Jagan.
participants (2)
-
Bruce Suen -
Jagan Teki