[NEW FEATURE] RFC: Add Intel GMBUS support
I have begun working on adding support for the Intel Graphics Management bus to U-Boot. Currently the x86 bring up process (as explored on the Baytrail series of Atom SOCs) relys on the Intel Video BIOS to do all setup and configuration of the GPU. This method of adding video support works on earlier versions of the silicon. With later versions I have found that the OEM BIOS needs to capture the monitor data over the GMBUS in order to initialize the GPU properly. I have logic analyzer captures available for anyone who is curious. My purpose for this patch is a skeleton placeholder that I will be working from, and I am asking for community collaboration with this. I have hardware available for testing as needed, and some details can be provided upon request.
Eric Schikschneit Senior Embedded Linux Engineer III NovaTech, LLC 13555 W. 107th Street | Lenexa, LS 66215 O: 913.451.1880 novatechautomation.com | NovaTechLinkedIn Receipt of this email implies compliance with our terms and conditions.
+Simon
Hi Eric,
On Fri, Sep 22, 2023 at 6:10 AM Eric Schikschneit eric.schikschneit@novatechautomation.com wrote:
I have begun working on adding support for the Intel Graphics Management bus to U-Boot. Currently the x86 bring up process (as explored on the Baytrail series of Atom SOCs) relys on the Intel Video BIOS to do all setup and configuration of the GPU. This method of adding video support works on earlier versions of the silicon. With later versions I have found that the OEM BIOS needs to capture the monitor data over the GMBUS in order to initialize the GPU properly. I have logic analyzer captures available for anyone who is curious. My purpose for this patch is a skeleton placeholder that I will be working from, and I am asking for community collaboration with this. I have hardware available for testing as needed, and some details can be provided upon request.
Would you share the documentation that describes the Intel GM bus, if publicly available?
Based on the info you provided, did you mean with later new revision BayTrail chips, the video bios initialization is not enough in U-Boot? AFAIU, the U-Boot BayTrail support relies on Intel FSP to do any chipset-specific work, including the video bios setup.
Regards, Bin
Hello,
That is correct. The new later revision Baytrail chips do not reliably initialize video upon boot. I have taken a significant amount of time to analyze the issue. The SOCs produced after 2019 show this issue, although I dont have the specific SKU or stepping details as our production team has not been logging that data. We have several hundred of these SOCs in inventory and are seeing a 20% failure rate resulting in these boards being marked bad. The vendor (Advantech) uses an AMI BIOS on the SOM which we replace with U-Boot. The AMI BIOS is able to reliably initialize the video on the SOCs in question. I have captured the communication on the GMBUS for both the U-Boot initialization and the AMI initialization. Both can be clearly seen running the Intel VBIOS, but the vendors BIOS then additionally gathers data approx 100ms later from the GMBUS to be used to properly initialize the GPU. This can be seen on the google drive link below in the file "Logic-Capture.png". I have also done a register dump comparison between a known good SOC and a known bad SOC. The register "PIPEAFRAMECOUNT", offset 0x70040 can be seen that the monitor does not report back sufficient VSYNC on the newer silicon. This can be seen on the google drive link below in the file "Register-Comparison.png". I have also included the full register dumps in the text files. If you would like I can add the actual Logic capture files for further inspection. The Intel doc "intel-os-gfx-prm-vol10-display.pdf" does not show confidential or NDA so I believe this is a public document that we can use to implement the needed features.
Google Drive with referenced data: https://drive.google.com/drive/folders/1OpXT7Faks2sfIKBIv-JmhEYeLzFYwvmF?usp...
Eric Schikschneit Senior Embedded Linux Engineer III
NovaTech, LLC 13555 W. 107th Street | Lenexa, LS 66215 O: 913.451.1880 novatechautomation.com | NovaTechLinkedIn Receipt of this email implies compliance with our terms and conditions.
________________________________________ From: Bin Meng bmeng.cn@gmail.com Sent: Thursday, September 21, 2023 8:14 PM To: Eric Schikschneit; Simon Glass Cc: u-boot@lists.denx.de Subject: Re: [NEW FEATURE] RFC: Add Intel GMBUS support
+Simon
Hi Eric,
On Fri, Sep 22, 2023 at 6:10 AM Eric Schikschneit eric.schikschneit@novatechautomation.com wrote:
I have begun working on adding support for the Intel Graphics Management bus to U-Boot. Currently the x86 bring up process (as explored on the Baytrail series of Atom SOCs) relys on the Intel Video BIOS to do all setup and configuration of the GPU. This method of adding video support works on earlier versions of the silicon. With later versions I have found that the OEM BIOS needs to capture the monitor data over the GMBUS in order to initialize the GPU properly. I have logic analyzer captures available for anyone who is curious. My purpose for this patch is a skeleton placeholder that I will be working from, and I am asking for community collaboration with this. I have hardware available for testing as needed, and some details can be provided upon request.
Would you share the documentation that describes the Intel GM bus, if publicly available?
Based on the info you provided, did you mean with later new revision BayTrail chips, the video bios initialization is not enough in U-Boot? AFAIU, the U-Boot BayTrail support relies on Intel FSP to do any chipset-specific work, including the video bios setup.
Regards, Bin
participants (2)
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Bin Meng -
Eric Schikschneit