Hello list,

inside the automatic U-Boot patch tracking system a new ticket [DNX#2006110242000109] was created:

<snip>

Tsi108 on chip pci controller support.

If there is no pci card, the tsi108/109 pci configure read will cause a machine check exception to the processor. PCI error should also be cleared after the read.

Signed-off-by: Alexandre Bounine alexandreb@tundra.com Signed-off-by: Roy Zang tie-fei.zang@freescale.com

---

drivers/tsi108_pci.c | 178 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 178 insertions(+), 0 deletions(-)

diff --git a/drivers/tsi108_pci.c b/drivers/tsi108_pci.c new file mode 100644 index 0000000..f374ede --- /dev/null +++ b/drivers/tsi108_pci.c @@ -0,0 +1,178 @@ +/*

• • (C) Copyright 2004 Tundra Semiconductor Corp.
• • Alex Bounine alexandreb@tundra.com
• • See file CREDITS for list of people who contributed to this
• • project.
• • This program is free software; you can redistribute it and/or
• • modify it under the terms of the GNU General Public License as
• • published by the Free Software Foundation; either version 2 of
• • the License, or (at your option) any later version.
• • This program is distributed in the hope that it will be useful,
• • but WITHOUT ANY WARRANTY; without even the implied warranty of
• • MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
• • GNU General Public License for more details.
• • You should have received a copy of the GNU General Public License
• • along with this program; if not, write to the Free Software
• • Foundation, Inc., 59 Temple Place, Suite 330, Boston,
• • MA 02111-1307 USA
• */

+/*

• • PCI initialisation for the Tsi108 EMU board.
• */

+#include <config.h>

+#ifdef CONFIG_TSI108_PCI

+#include <common.h> +#include <pci.h> +#include <asm/io.h> +#include <tsi108.h>

+struct pci_controller local_hose;

+void tsi108_clear_pci_error(void) +{

• u32 err_stat, err_addr, pci_stat;
• /*

• * Quietly clear errors signalled as result of PCI/X configuration
  

read

• * requests.
  

• */
  

• /* Read PB Error Log Registers */
• err_stat = *(volatile u32 *)(CFG_TSI108_CSR_BASE +

• 		     TSI108_PB_REG_OFFSET + PB_ERRCS);
  

• err_addr = *(volatile u32 *)(CFG_TSI108_CSR_BASE +

• 		     TSI108_PB_REG_OFFSET + PB_AERR);
  

• if (err_stat & PB_ERRCS_ES) {

• /* Clear PCI/X bus errors if applicable */
  

• if ((err_addr & 0xFF000000) == CFG_PCI_CFG_BASE) {
  

• 	/* Clear error flag */
  

• 	*(u32 *) (CFG_TSI108_CSR_BASE +
  

• 		  TSI108_PB_REG_OFFSET + PB_ERRCS) =
  

• 	    PB_ERRCS_ES;
  

• 	/* Clear read error reported in PB_ISR */
  

• 	*(u32 *) (CFG_TSI108_CSR_BASE +
  

• 		  TSI108_PB_REG_OFFSET + PB_ISR) =
  

• 	    PB_ISR_PBS_RD_ERR;
  

• /* Clear errors reported by PCI CSR (Normally Master Abort) */
  

• 	pci_stat = *(volatile u32 *)(CFG_TSI108_CSR_BASE +
  

• 				     TSI108_PCI_REG_OFFSET +
  

• 				     PCI_CSR);
  

• 	*(volatile u32 *)(CFG_TSI108_CSR_BASE +
  

• 			  TSI108_PCI_REG_OFFSET + PCI_CSR) =
  

• 	    pci_stat;
  

• 	*(volatile u32 *)(CFG_TSI108_CSR_BASE +
  

• 			  TSI108_PCI_REG_OFFSET +
  

• 			  PCI_IRP_STAT) = PCI_IRP_STAT_P_CSR;
  

• }
  

• }
• return;

</snip>

Your U-Boot support team