[U-Boot] [PATCH 1/6] net: altera_tse: use data type u32 for regs and desc
Use data type u32/u16/u8 for regs and desc, as it is more portable.
Signed-off-by: Thomas Chou thomas@wytron.com.tw --- drivers/net/altera_tse.c | 16 ++-- drivers/net/altera_tse.h | 186 +++++++++++++++++++++++------------------------ 2 files changed, 101 insertions(+), 101 deletions(-)
diff --git a/drivers/net/altera_tse.c b/drivers/net/altera_tse.c index 319983c..394503f 100644 --- a/drivers/net/altera_tse.c +++ b/drivers/net/altera_tse.c @@ -27,12 +27,12 @@ static inline void alt_sgdma_construct_descriptor( struct alt_sgdma_descriptor *next, void *read_addr, void *write_addr, - unsigned short length_or_eop, + u16 length_or_eop, int generate_eop, int read_fixed, int write_fixed_or_sop) { - unsigned char val; + u8 val;
/* * Mark the "next" descriptor as "not" owned by hardware. This prevents @@ -100,7 +100,7 @@ static int alt_sgdma_wait_transfer(struct alt_sgdma_registers *regs) static int alt_sgdma_start_transfer(struct alt_sgdma_registers *regs, struct alt_sgdma_descriptor *desc) { - unsigned int val; + u32 val;
/* Point the controller at the descriptor */ writel(virt_to_phys(desc), ®s->next_descriptor_pointer); @@ -121,7 +121,7 @@ static void tse_adjust_link(struct altera_tse_priv *priv, struct phy_device *phydev) { struct alt_tse_mac *mac_dev = priv->mac_dev; - unsigned int refvar; + u32 refvar;
if (!phydev->link) { debug("%s: No link.\n", phydev->dev->name); @@ -230,7 +230,7 @@ static void altera_tse_stop(struct udevice *dev) struct alt_sgdma_registers *rx_sgdma = priv->sgdma_rx; struct alt_sgdma_registers *tx_sgdma = priv->sgdma_tx; struct alt_sgdma_descriptor *rx_desc = priv->rx_desc; - unsigned int status; + u32 status; int ret; ulong ctime;
@@ -266,7 +266,7 @@ static int tse_mdio_read(struct mii_dev *bus, int addr, int devad, int reg) { struct altera_tse_priv *priv = bus->priv; struct alt_tse_mac *mac_dev = priv->mac_dev; - unsigned int value; + u32 value;
/* set mdio address */ writel(addr, &mac_dev->mdio_phy1_addr); @@ -337,7 +337,7 @@ static int altera_tse_write_hwaddr(struct udevice *dev) struct alt_tse_mac *mac_dev = priv->mac_dev; struct eth_pdata *pdata = dev_get_platdata(dev); u8 *hwaddr = pdata->enetaddr; - unsigned int mac_lo, mac_hi; + u32 mac_lo, mac_hi;
mac_lo = (hwaddr[3] << 24) | (hwaddr[2] << 16) | (hwaddr[1] << 8) | hwaddr[0]; @@ -362,7 +362,7 @@ static int altera_tse_start(struct udevice *dev) { struct altera_tse_priv *priv = dev_get_priv(dev); struct alt_tse_mac *mac_dev = priv->mac_dev; - unsigned int val; + u32 val; int ret;
/* need to create sgdma */ diff --git a/drivers/net/altera_tse.h b/drivers/net/altera_tse.h index 08c4f66..83923bd 100644 --- a/drivers/net/altera_tse.h +++ b/drivers/net/altera_tse.h @@ -71,34 +71,34 @@ * */ struct alt_sgdma_descriptor { - unsigned int source; /* the address of data to be read. */ - unsigned int source_pad; + u32 source; /* the address of data to be read. */ + u32 source_pad;
- unsigned int destination; /* the address to write data */ - unsigned int destination_pad; + u32 destination; /* the address to write data */ + u32 destination_pad;
- unsigned int next; /* the next descriptor in the list. */ - unsigned int next_pad; + u32 next; /* the next descriptor in the list. */ + u32 next_pad;
- unsigned short bytes_to_transfer; /* the number of bytes to transfer */ - unsigned char read_burst; - unsigned char write_burst; + u16 bytes_to_transfer; /* the number of bytes to transfer */ + u8 read_burst; + u8 write_burst;
- unsigned short actual_bytes_transferred;/* bytes transferred by DMA */ - unsigned char descriptor_status; - unsigned char descriptor_control; + u16 actual_bytes_transferred;/* bytes transferred by DMA */ + u8 descriptor_status; + u8 descriptor_control;
} __packed_1_;
/* SG-DMA Control/Status Slave registers map */
struct alt_sgdma_registers { - unsigned int status; - unsigned int status_pad[3]; - unsigned int control; - unsigned int control_pad[3]; - unsigned int next_descriptor_pointer; - unsigned int descriptor_pad[3]; + u32 status; + u32 status_pad[3]; + u32 control; + u32 control_pad[3]; + u32 next_descriptor_pointer; + u32 descriptor_pad[3]; };
/* TSE Stuff */ @@ -142,101 +142,101 @@ struct alt_sgdma_registers { /* MAC register Space */
struct alt_tse_mac { - unsigned int megacore_revision; - unsigned int scratch_pad; - unsigned int command_config; - unsigned int mac_addr_0; - unsigned int mac_addr_1; - unsigned int max_frame_length; - unsigned int pause_quanta; - unsigned int rx_sel_empty_threshold; - unsigned int rx_sel_full_threshold; - unsigned int tx_sel_empty_threshold; - unsigned int tx_sel_full_threshold; - unsigned int rx_almost_empty_threshold; - unsigned int rx_almost_full_threshold; - unsigned int tx_almost_empty_threshold; - unsigned int tx_almost_full_threshold; - unsigned int mdio_phy0_addr; - unsigned int mdio_phy1_addr; + u32 megacore_revision; + u32 scratch_pad; + u32 command_config; + u32 mac_addr_0; + u32 mac_addr_1; + u32 max_frame_length; + u32 pause_quanta; + u32 rx_sel_empty_threshold; + u32 rx_sel_full_threshold; + u32 tx_sel_empty_threshold; + u32 tx_sel_full_threshold; + u32 rx_almost_empty_threshold; + u32 rx_almost_full_threshold; + u32 tx_almost_empty_threshold; + u32 tx_almost_full_threshold; + u32 mdio_phy0_addr; + u32 mdio_phy1_addr;
/* only if 100/1000 BaseX PCS, reserved otherwise */ - unsigned int reservedx44[5]; + u32 reservedx44[5];
- unsigned int reg_read_access_status; - unsigned int min_tx_ipg_length; + u32 reg_read_access_status; + u32 min_tx_ipg_length;
/* IEEE 802.3 oEntity Managed Object Support */ - unsigned int aMACID_1; /*The MAC addresses */ - unsigned int aMACID_2; - unsigned int aFramesTransmittedOK; - unsigned int aFramesReceivedOK; - unsigned int aFramesCheckSequenceErrors; - unsigned int aAlignmentErrors; - unsigned int aOctetsTransmittedOK; - unsigned int aOctetsReceivedOK; + u32 aMACID_1; /*The MAC addresses */ + u32 aMACID_2; + u32 aFramesTransmittedOK; + u32 aFramesReceivedOK; + u32 aFramesCheckSequenceErrors; + u32 aAlignmentErrors; + u32 aOctetsTransmittedOK; + u32 aOctetsReceivedOK;
/* IEEE 802.3 oPausedEntity Managed Object Support */ - unsigned int aTxPAUSEMACCtrlFrames; - unsigned int aRxPAUSEMACCtrlFrames; + u32 aTxPAUSEMACCtrlFrames; + u32 aRxPAUSEMACCtrlFrames;
/* IETF MIB (MIB-II) Object Support */ - unsigned int ifInErrors; - unsigned int ifOutErrors; - unsigned int ifInUcastPkts; - unsigned int ifInMulticastPkts; - unsigned int ifInBroadcastPkts; - unsigned int ifOutDiscards; - unsigned int ifOutUcastPkts; - unsigned int ifOutMulticastPkts; - unsigned int ifOutBroadcastPkts; + u32 ifInErrors; + u32 ifOutErrors; + u32 ifInUcastPkts; + u32 ifInMulticastPkts; + u32 ifInBroadcastPkts; + u32 ifOutDiscards; + u32 ifOutUcastPkts; + u32 ifOutMulticastPkts; + u32 ifOutBroadcastPkts;
/* IETF RMON MIB Object Support */ - unsigned int etherStatsDropEvent; - unsigned int etherStatsOctets; - unsigned int etherStatsPkts; - unsigned int etherStatsUndersizePkts; - unsigned int etherStatsOversizePkts; - unsigned int etherStatsPkts64Octets; - unsigned int etherStatsPkts65to127Octets; - unsigned int etherStatsPkts128to255Octets; - unsigned int etherStatsPkts256to511Octets; - unsigned int etherStatsPkts512to1023Octets; - unsigned int etherStatsPkts1024to1518Octets; - - unsigned int etherStatsPkts1519toXOctets; - unsigned int etherStatsJabbers; - unsigned int etherStatsFragments; - - unsigned int reservedxE4; + u32 etherStatsDropEvent; + u32 etherStatsOctets; + u32 etherStatsPkts; + u32 etherStatsUndersizePkts; + u32 etherStatsOversizePkts; + u32 etherStatsPkts64Octets; + u32 etherStatsPkts65to127Octets; + u32 etherStatsPkts128to255Octets; + u32 etherStatsPkts256to511Octets; + u32 etherStatsPkts512to1023Octets; + u32 etherStatsPkts1024to1518Octets; + + u32 etherStatsPkts1519toXOctets; + u32 etherStatsJabbers; + u32 etherStatsFragments; + + u32 reservedxE4;
/*FIFO control register. */ - unsigned int tx_cmd_stat; - unsigned int rx_cmd_stat; + u32 tx_cmd_stat; + u32 rx_cmd_stat;
- unsigned int ipaccTxConf; - unsigned int ipaccRxConf; - unsigned int ipaccRxStat; - unsigned int ipaccRxStatSum; + u32 ipaccTxConf; + u32 ipaccRxConf; + u32 ipaccRxStat; + u32 ipaccRxStatSum;
/*Multicast address resolution table */ - unsigned int hash_table[64]; + u32 hash_table[64];
/*Registers 0 to 31 within PHY device 0/1 */ - unsigned int mdio_phy0[0x20]; - unsigned int mdio_phy1[0x20]; + u32 mdio_phy0[0x20]; + u32 mdio_phy1[0x20];
/*4 Supplemental MAC Addresses */ - unsigned int supp_mac_addr_0_0; - unsigned int supp_mac_addr_0_1; - unsigned int supp_mac_addr_1_0; - unsigned int supp_mac_addr_1_1; - unsigned int supp_mac_addr_2_0; - unsigned int supp_mac_addr_2_1; - unsigned int supp_mac_addr_3_0; - unsigned int supp_mac_addr_3_1; - - unsigned int reservedx320[56]; + u32 supp_mac_addr_0_0; + u32 supp_mac_addr_0_1; + u32 supp_mac_addr_1_0; + u32 supp_mac_addr_1_1; + u32 supp_mac_addr_2_0; + u32 supp_mac_addr_2_1; + u32 supp_mac_addr_3_0; + u32 supp_mac_addr_3_1; + + u32 reservedx320[56]; };
struct altera_tse_priv {
Fix packed and aligned attribute warnings.
WARNING: __packed is preferred over __attribute__((packed)) #14: FILE: drivers/net/altera_tse.h:14: +#define __packed_1_ __attribute__ ((packed, aligned(1)))
WARNING: __aligned(size) is preferred over __attribute__((aligned(size))) #14: FILE: drivers/net/altera_tse.h:14: +#define __packed_1_ __attribute__ ((packed, aligned(1)))
Signed-off-by: Thomas Chou thomas@wytron.com.tw --- drivers/net/altera_tse.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/altera_tse.h b/drivers/net/altera_tse.h index 83923bd..7b92b12 100644 --- a/drivers/net/altera_tse.h +++ b/drivers/net/altera_tse.h @@ -11,7 +11,7 @@ #ifndef _ALTERA_TSE_H_ #define _ALTERA_TSE_H_
-#define __packed_1_ __attribute__ ((packed, aligned(1))) +#define __packed_1_ __packed __aligned(1)
/* SGDMA Stuff */ #define ALT_SGDMA_STATUS_ERROR_MSK (0x00000001)
On Wed, 2015-11-04 at 17:12 +0800, thomas@wytron.com.tw wrote:
Fix packed and aligned attribute warnings.
WARNING: __packed is preferred over __attribute__((packed)) #14: FILE: drivers/net/altera_tse.h:14: +#define __packed_1_ __attribute__ ((packed, aligned(1)))
WARNING: __aligned(size) is preferred over __attribute__((aligned(size))) #14: FILE: drivers/net/altera_tse.h:14: +#define __packed_1_ __attribute__ ((packed, aligned(1)))
Signed-off-by: Thomas Chou thomas@wytron.com.tw
Reviewed-by: Chin Liang See clsee@altera.com
Thanks Chin Liang
fix CamelCase.
CHECK: Avoid CamelCase: <aMACID_1> #170: FILE: drivers/net/altera_tse.h:170: + u32 aMACID_1; /*The MAC addresses */
Signed-off-by: Thomas Chou thomas@wytron.com.tw --- drivers/net/altera_tse.h | 81 ++++++++++++++++++++++++------------------------ 1 file changed, 41 insertions(+), 40 deletions(-)
diff --git a/drivers/net/altera_tse.h b/drivers/net/altera_tse.h index 7b92b12..1652e40 100644 --- a/drivers/net/altera_tse.h +++ b/drivers/net/altera_tse.h @@ -167,57 +167,58 @@ struct alt_tse_mac { u32 min_tx_ipg_length;
/* IEEE 802.3 oEntity Managed Object Support */ - u32 aMACID_1; /*The MAC addresses */ - u32 aMACID_2; - u32 aFramesTransmittedOK; - u32 aFramesReceivedOK; - u32 aFramesCheckSequenceErrors; - u32 aAlignmentErrors; - u32 aOctetsTransmittedOK; - u32 aOctetsReceivedOK; + u32 mac_id_1; + u32 mac_id_2; + u32 frames_transmitted_ok; + u32 frames_received_ok; + u32 frames_check_sequence_errors; + u32 alignment_errors; + u32 octets_transmitted_ok; + u32 octets_received_ok;
/* IEEE 802.3 oPausedEntity Managed Object Support */ - u32 aTxPAUSEMACCtrlFrames; - u32 aRxPAUSEMACCtrlFrames; + u32 tx_pause_mac_ctrl_frames; + u32 rx_pause_mac_ctrl_frames;
/* IETF MIB (MIB-II) Object Support */ - u32 ifInErrors; - u32 ifOutErrors; - u32 ifInUcastPkts; - u32 ifInMulticastPkts; - u32 ifInBroadcastPkts; - u32 ifOutDiscards; - u32 ifOutUcastPkts; - u32 ifOutMulticastPkts; - u32 ifOutBroadcastPkts; + u32 if_in_errors; + u32 if_out_errors; + u32 if_in_ucast_pkts; + u32 if_in_multicast_pkts; + u32 if_in_broadcast_pkts; + u32 if_out_discards; + u32 if_out_ucast_pkts; + u32 if_out_multicast_pkts; + u32 if_out_broadcast_pkts;
/* IETF RMON MIB Object Support */ - u32 etherStatsDropEvent; - u32 etherStatsOctets; - u32 etherStatsPkts; - u32 etherStatsUndersizePkts; - u32 etherStatsOversizePkts; - u32 etherStatsPkts64Octets; - u32 etherStatsPkts65to127Octets; - u32 etherStatsPkts128to255Octets; - u32 etherStatsPkts256to511Octets; - u32 etherStatsPkts512to1023Octets; - u32 etherStatsPkts1024to1518Octets; - - u32 etherStatsPkts1519toXOctets; - u32 etherStatsJabbers; - u32 etherStatsFragments; - - u32 reservedxE4; + u32 ether_stats_drop_events; + u32 ether_stats_octets; + u32 ether_stats_pkts; + u32 ether_stats_undersize_pkts; + u32 ether_stats_oversize_pkts; + u32 ether_stats_pkts_64_octets; + u32 ether_stats_pkts_65to127_octets; + u32 ether_stats_pkts_128to255_octets; + u32 ether_stats_pkts_256to511_octets; + u32 ether_stats_pkts_512to1023_octets; + u32 ether_stats_pkts_1024to1518_octets; + u32 ether_stats_pkts_1519tox_octets; + u32 ether_stats_jabbers; + u32 ether_stats_fragments; + + u32 reserved2;
/*FIFO control register. */ u32 tx_cmd_stat; u32 rx_cmd_stat;
- u32 ipaccTxConf; - u32 ipaccRxConf; - u32 ipaccRxStat; - u32 ipaccRxStatSum; + /* Extended Statistics Counters */ + u32 msb_octets_transmitted_ok; + u32 msb_octets_received_ok; + u32 msb_ether_stats_octets; + + u32 reserved3;
/*Multicast address resolution table */ u32 hash_table[64];
Hi Thomas,
On Wed, 2015-11-04 at 17:12 +0800, thomas@wytron.com.tw wrote:
fix CamelCase.
CHECK: Avoid CamelCase: <aMACID_1> #170: FILE: drivers/net/altera_tse.h:170:
- u32 aMACID_1; /*The MAC addresses */
Signed-off-by: Thomas Chou thomas@wytron.com.tw
drivers/net/altera_tse.h | 81 ++++++++++++++++++++++++------------------------ 1 file changed, 41 insertions(+), 40 deletions(-)
diff --git a/drivers/net/altera_tse.h b/drivers/net/altera_tse.h index 7b92b12..1652e40 100644 --- a/drivers/net/altera_tse.h +++ b/drivers/net/altera_tse.h @@ -167,57 +167,58 @@ struct alt_tse_mac { u32 min_tx_ipg_length;
/* IEEE 802.3 oEntity Managed Object Support */
- u32 aMACID_1; /*The MAC addresses */
- u32 aMACID_2;
- u32 aFramesTransmittedOK;
- u32 aFramesReceivedOK;
- u32 aFramesCheckSequenceErrors;
- u32 aAlignmentErrors;
- u32 aOctetsTransmittedOK;
- u32 aOctetsReceivedOK;
u32 mac_id_1;
u32 mac_id_2;
u32 frames_transmitted_ok;
u32 frames_received_ok;
u32 frames_check_sequence_errors;
u32 alignment_errors;
u32 octets_transmitted_ok;
u32 octets_received_ok;
/* IEEE 802.3 oPausedEntity Managed Object Support */
- u32 aTxPAUSEMACCtrlFrames;
- u32 aRxPAUSEMACCtrlFrames;
u32 tx_pause_mac_ctrl_frames;
u32 rx_pause_mac_ctrl_frames;
/* IETF MIB (MIB-II) Object Support */
- u32 ifInErrors;
- u32 ifOutErrors;
- u32 ifInUcastPkts;
- u32 ifInMulticastPkts;
- u32 ifInBroadcastPkts;
- u32 ifOutDiscards;
- u32 ifOutUcastPkts;
- u32 ifOutMulticastPkts;
- u32 ifOutBroadcastPkts;
u32 if_in_errors;
u32 if_out_errors;
u32 if_in_ucast_pkts;
u32 if_in_multicast_pkts;
u32 if_in_broadcast_pkts;
u32 if_out_discards;
u32 if_out_ucast_pkts;
u32 if_out_multicast_pkts;
u32 if_out_broadcast_pkts;
/* IETF RMON MIB Object Support */
- u32 etherStatsDropEvent;
- u32 etherStatsOctets;
- u32 etherStatsPkts;
- u32 etherStatsUndersizePkts;
- u32 etherStatsOversizePkts;
- u32 etherStatsPkts64Octets;
- u32 etherStatsPkts65to127Octets;
- u32 etherStatsPkts128to255Octets;
- u32 etherStatsPkts256to511Octets;
- u32 etherStatsPkts512to1023Octets;
- u32 etherStatsPkts1024to1518Octets;
- u32 etherStatsPkts1519toXOctets;
- u32 etherStatsJabbers;
- u32 etherStatsFragments;
- u32 reservedxE4;
u32 ether_stats_drop_events;
u32 ether_stats_octets;
u32 ether_stats_pkts;
u32 ether_stats_undersize_pkts;
u32 ether_stats_oversize_pkts;
u32 ether_stats_pkts_64_octets;
u32 ether_stats_pkts_65to127_octets;
u32 ether_stats_pkts_128to255_octets;
u32 ether_stats_pkts_256to511_octets;
u32 ether_stats_pkts_512to1023_octets;
u32 ether_stats_pkts_1024to1518_octets;
u32 ether_stats_pkts_1519tox_octets;
u32 ether_stats_jabbers;
u32 ether_stats_fragments;
u32 reserved2;
/*FIFO control register. */ u32 tx_cmd_stat; u32 rx_cmd_stat;
- u32 ipaccTxConf;
- u32 ipaccRxConf;
- u32 ipaccRxStat;
- u32 ipaccRxStatSum;
/* Extended Statistics Counters */
u32 msb_octets_transmitted_ok;
u32 msb_octets_received_ok;
u32 msb_ether_stats_octets;
u32 reserved3;
/*Multicast address resolution table */ u32 hash_table[64];
It seems these declaration are not used in the altera_tse.c.
Thanks Chin Liang
Hi Chin Liang,
On 2015年11月05日 00:17, Chin Liang See wrote:
It seems these declaration are not used in the altera_tse.c.
Thanks a lot for your review. I have removed those mac reg def not used in the altera_tse.c.
Best regards, Thomas
Remove the useless parenthesis.
Signed-off-by: Thomas Chou thomas@wytron.com.tw --- drivers/net/altera_tse.h | 100 +++++++++++++++++++++++------------------------ 1 file changed, 50 insertions(+), 50 deletions(-)
diff --git a/drivers/net/altera_tse.h b/drivers/net/altera_tse.h index 1652e40..f751f6a 100644 --- a/drivers/net/altera_tse.h +++ b/drivers/net/altera_tse.h @@ -14,15 +14,15 @@ #define __packed_1_ __packed __aligned(1)
/* SGDMA Stuff */ -#define ALT_SGDMA_STATUS_ERROR_MSK (0x00000001) -#define ALT_SGDMA_STATUS_EOP_ENCOUNTERED_MSK (0x00000002) -#define ALT_SGDMA_STATUS_DESC_COMPLETED_MSK (0x00000004) -#define ALT_SGDMA_STATUS_CHAIN_COMPLETED_MSK (0x00000008) -#define ALT_SGDMA_STATUS_BUSY_MSK (0x00000010) +#define ALT_SGDMA_STATUS_ERROR_MSK 0x00000001 +#define ALT_SGDMA_STATUS_EOP_ENCOUNTERED_MSK 0x00000002 +#define ALT_SGDMA_STATUS_DESC_COMPLETED_MSK 0x00000004 +#define ALT_SGDMA_STATUS_CHAIN_COMPLETED_MSK 0x00000008 +#define ALT_SGDMA_STATUS_BUSY_MSK 0x00000010
-#define ALT_SGDMA_CONTROL_RUN_MSK (0x00000020) -#define ALT_SGDMA_CONTROL_STOP_DMA_ER_MSK (0x00000040) -#define ALT_SGDMA_CONTROL_SOFTWARERESET_MSK (0x00010000) +#define ALT_SGDMA_CONTROL_RUN_MSK 0x00000020 +#define ALT_SGDMA_CONTROL_STOP_DMA_ER_MSK 0x00000040 +#define ALT_SGDMA_CONTROL_SOFTWARERESET_MSK 0x00010000
#define ALTERA_TSE_SGDMA_INTR_MASK (ALT_SGDMA_CONTROL_IE_CHAIN_COMPLETED_MSK \ | ALT_SGDMA_STATUS_DESC_COMPLETED_MSK \ @@ -35,11 +35,11 @@ * The following bit-offsets are expressed relative to the LSB of * the control register bitfield. */ -#define ALT_SGDMA_DESCRIPTOR_CONTROL_GENERATE_EOP_MSK (0x00000001) -#define ALT_SGDMA_DESCRIPTOR_CONTROL_READ_FIXED_ADDRESS_MSK (0x00000002) -#define ALT_SGDMA_DESCRIPTOR_CONTROL_WRITE_FIXED_ADDRESS_MSK (0x00000004) -#define ALT_SGDMA_DESCRIPTOR_CONTROL_ATLANTIC_CHANNEL_MSK (0x00000008) -#define ALT_SGDMA_DESCRIPTOR_CONTROL_OWNED_BY_HW_MSK (0x00000080) +#define ALT_SGDMA_DESCRIPTOR_CONTROL_GENERATE_EOP_MSK 0x00000001 +#define ALT_SGDMA_DESCRIPTOR_CONTROL_READ_FIXED_ADDRESS_MSK 0x00000002 +#define ALT_SGDMA_DESCRIPTOR_CONTROL_WRITE_FIXED_ADDRESS_MSK 0x00000004 +#define ALT_SGDMA_DESCRIPTOR_CONTROL_ATLANTIC_CHANNEL_MSK 0x00000008 +#define ALT_SGDMA_DESCRIPTOR_CONTROL_OWNED_BY_HW_MSK 0x00000080
/* * Descriptor status bit masks & offsets @@ -48,15 +48,15 @@ * The following bit-offsets are expressed relative to the LSB of * the status register bitfield. */ -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_CRC_MSK (0x00000001) -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_PARITY_MSK (0x00000002) -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_OVERFLOW_MSK (0x00000004) -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_SYNC_MSK (0x00000008) -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_UEOP_MSK (0x00000010) -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_MEOP_MSK (0x00000020) -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_MSOP_MSK (0x00000040) -#define ALT_SGDMA_DESCRIPTOR_STATUS_TERMINATED_BY_EOP_MSK (0x00000080) -#define ALT_SGDMA_DESCRIPTOR_STATUS_ERROR_MSK (0x0000007F) +#define ALT_SGDMA_DESCRIPTOR_STATUS_E_CRC_MSK 0x00000001 +#define ALT_SGDMA_DESCRIPTOR_STATUS_E_PARITY_MSK 0x00000002 +#define ALT_SGDMA_DESCRIPTOR_STATUS_E_OVERFLOW_MSK 0x00000004 +#define ALT_SGDMA_DESCRIPTOR_STATUS_E_SYNC_MSK 0x00000008 +#define ALT_SGDMA_DESCRIPTOR_STATUS_E_UEOP_MSK 0x00000010 +#define ALT_SGDMA_DESCRIPTOR_STATUS_E_MEOP_MSK 0x00000020 +#define ALT_SGDMA_DESCRIPTOR_STATUS_E_MSOP_MSK 0x00000040 +#define ALT_SGDMA_DESCRIPTOR_STATUS_TERMINATED_BY_EOP_MSK 0x00000080 +#define ALT_SGDMA_DESCRIPTOR_STATUS_ERROR_MSK 0x0000007F
/* * The SGDMA controller buffer descriptor allocates @@ -102,37 +102,37 @@ struct alt_sgdma_registers { };
/* TSE Stuff */ -#define ALTERA_TSE_CMD_TX_ENA_MSK (0x00000001) -#define ALTERA_TSE_CMD_RX_ENA_MSK (0x00000002) -#define ALTERA_TSE_CMD_XON_GEN_MSK (0x00000004) -#define ALTERA_TSE_CMD_ETH_SPEED_MSK (0x00000008) -#define ALTERA_TSE_CMD_PROMIS_EN_MSK (0x00000010) -#define ALTERA_TSE_CMD_PAD_EN_MSK (0x00000020) -#define ALTERA_TSE_CMD_CRC_FWD_MSK (0x00000040) -#define ALTERA_TSE_CMD_PAUSE_FWD_MSK (0x00000080) -#define ALTERA_TSE_CMD_PAUSE_IGNORE_MSK (0x00000100) -#define ALTERA_TSE_CMD_TX_ADDR_INS_MSK (0x00000200) -#define ALTERA_TSE_CMD_HD_ENA_MSK (0x00000400) -#define ALTERA_TSE_CMD_EXCESS_COL_MSK (0x00000800) -#define ALTERA_TSE_CMD_LATE_COL_MSK (0x00001000) -#define ALTERA_TSE_CMD_SW_RESET_MSK (0x00002000) -#define ALTERA_TSE_CMD_MHASH_SEL_MSK (0x00004000) -#define ALTERA_TSE_CMD_LOOPBACK_MSK (0x00008000) +#define ALTERA_TSE_CMD_TX_ENA_MSK 0x00000001 +#define ALTERA_TSE_CMD_RX_ENA_MSK 0x00000002 +#define ALTERA_TSE_CMD_XON_GEN_MSK 0x00000004 +#define ALTERA_TSE_CMD_ETH_SPEED_MSK 0x00000008 +#define ALTERA_TSE_CMD_PROMIS_EN_MSK 0x00000010 +#define ALTERA_TSE_CMD_PAD_EN_MSK 0x00000020 +#define ALTERA_TSE_CMD_CRC_FWD_MSK 0x00000040 +#define ALTERA_TSE_CMD_PAUSE_FWD_MSK 0x00000080 +#define ALTERA_TSE_CMD_PAUSE_IGNORE_MSK 0x00000100 +#define ALTERA_TSE_CMD_TX_ADDR_INS_MSK 0x00000200 +#define ALTERA_TSE_CMD_HD_ENA_MSK 0x00000400 +#define ALTERA_TSE_CMD_EXCESS_COL_MSK 0x00000800 +#define ALTERA_TSE_CMD_LATE_COL_MSK 0x00001000 +#define ALTERA_TSE_CMD_SW_RESET_MSK 0x00002000 +#define ALTERA_TSE_CMD_MHASH_SEL_MSK 0x00004000 +#define ALTERA_TSE_CMD_LOOPBACK_MSK 0x00008000 /* Bits (18:16) = address select */ -#define ALTERA_TSE_CMD_TX_ADDR_SEL_MSK (0x00070000) -#define ALTERA_TSE_CMD_MAGIC_ENA_MSK (0x00080000) -#define ALTERA_TSE_CMD_SLEEP_MSK (0x00100000) -#define ALTERA_TSE_CMD_WAKEUP_MSK (0x00200000) -#define ALTERA_TSE_CMD_XOFF_GEN_MSK (0x00400000) -#define ALTERA_TSE_CMD_CNTL_FRM_ENA_MSK (0x00800000) -#define ALTERA_TSE_CMD_NO_LENGTH_CHECK_MSK (0x01000000) -#define ALTERA_TSE_CMD_ENA_10_MSK (0x02000000) -#define ALTERA_TSE_CMD_RX_ERR_DISC_MSK (0x04000000) +#define ALTERA_TSE_CMD_TX_ADDR_SEL_MSK 0x00070000 +#define ALTERA_TSE_CMD_MAGIC_ENA_MSK 0x00080000 +#define ALTERA_TSE_CMD_SLEEP_MSK 0x00100000 +#define ALTERA_TSE_CMD_WAKEUP_MSK 0x00200000 +#define ALTERA_TSE_CMD_XOFF_GEN_MSK 0x00400000 +#define ALTERA_TSE_CMD_CNTL_FRM_ENA_MSK 0x00800000 +#define ALTERA_TSE_CMD_NO_LENGTH_CHECK_MSK 0x01000000 +#define ALTERA_TSE_CMD_ENA_10_MSK 0x02000000 +#define ALTERA_TSE_CMD_RX_ERR_DISC_MSK 0x04000000 /* Bits (30..27) reserved */ -#define ALTERA_TSE_CMD_CNT_RESET_MSK (0x80000000) +#define ALTERA_TSE_CMD_CNT_RESET_MSK 0x80000000
-#define ALTERA_TSE_TX_CMD_STAT_TX_SHIFT16 (0x00040000) -#define ALTERA_TSE_TX_CMD_STAT_OMIT_CRC (0x00020000) +#define ALTERA_TSE_TX_CMD_STAT_TX_SHIFT16 0x00040000 +#define ALTERA_TSE_TX_CMD_STAT_OMIT_CRC 0x00020000
#define ALTERA_TSE_RX_CMD_STAT_RX_SHIFT16 (0x02000000)
On Wed, 2015-11-04 at 03:29 +0000, thomas@wytron.com.tw wrote:
Remove the useless parenthesis.
Signed-off-by: Thomas Chou thomas@wytron.com.tw
Reviewed-by: Chin Liang See clsee@altera.com
Thanks Chin Liang
Remove unused macro.
Signed-off-by: Thomas Chou thomas@wytron.com.tw --- drivers/net/altera_tse.h | 44 -------------------------------------------- 1 file changed, 44 deletions(-)
diff --git a/drivers/net/altera_tse.h b/drivers/net/altera_tse.h index f751f6a..14c064b 100644 --- a/drivers/net/altera_tse.h +++ b/drivers/net/altera_tse.h @@ -14,20 +14,12 @@ #define __packed_1_ __packed __aligned(1)
/* SGDMA Stuff */ -#define ALT_SGDMA_STATUS_ERROR_MSK 0x00000001 -#define ALT_SGDMA_STATUS_EOP_ENCOUNTERED_MSK 0x00000002 -#define ALT_SGDMA_STATUS_DESC_COMPLETED_MSK 0x00000004 -#define ALT_SGDMA_STATUS_CHAIN_COMPLETED_MSK 0x00000008 #define ALT_SGDMA_STATUS_BUSY_MSK 0x00000010
#define ALT_SGDMA_CONTROL_RUN_MSK 0x00000020 #define ALT_SGDMA_CONTROL_STOP_DMA_ER_MSK 0x00000040 #define ALT_SGDMA_CONTROL_SOFTWARERESET_MSK 0x00010000
-#define ALTERA_TSE_SGDMA_INTR_MASK (ALT_SGDMA_CONTROL_IE_CHAIN_COMPLETED_MSK \ - | ALT_SGDMA_STATUS_DESC_COMPLETED_MSK \ - | ALT_SGDMA_CONTROL_IE_GLOBAL_MSK) - /* * Descriptor control bit masks & offsets * @@ -38,7 +30,6 @@ #define ALT_SGDMA_DESCRIPTOR_CONTROL_GENERATE_EOP_MSK 0x00000001 #define ALT_SGDMA_DESCRIPTOR_CONTROL_READ_FIXED_ADDRESS_MSK 0x00000002 #define ALT_SGDMA_DESCRIPTOR_CONTROL_WRITE_FIXED_ADDRESS_MSK 0x00000004 -#define ALT_SGDMA_DESCRIPTOR_CONTROL_ATLANTIC_CHANNEL_MSK 0x00000008 #define ALT_SGDMA_DESCRIPTOR_CONTROL_OWNED_BY_HW_MSK 0x00000080
/* @@ -48,15 +39,7 @@ * The following bit-offsets are expressed relative to the LSB of * the status register bitfield. */ -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_CRC_MSK 0x00000001 -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_PARITY_MSK 0x00000002 -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_OVERFLOW_MSK 0x00000004 -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_SYNC_MSK 0x00000008 -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_UEOP_MSK 0x00000010 -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_MEOP_MSK 0x00000020 -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_MSOP_MSK 0x00000040 #define ALT_SGDMA_DESCRIPTOR_STATUS_TERMINATED_BY_EOP_MSK 0x00000080 -#define ALT_SGDMA_DESCRIPTOR_STATUS_ERROR_MSK 0x0000007F
/* * The SGDMA controller buffer descriptor allocates @@ -104,37 +87,10 @@ struct alt_sgdma_registers { /* TSE Stuff */ #define ALTERA_TSE_CMD_TX_ENA_MSK 0x00000001 #define ALTERA_TSE_CMD_RX_ENA_MSK 0x00000002 -#define ALTERA_TSE_CMD_XON_GEN_MSK 0x00000004 #define ALTERA_TSE_CMD_ETH_SPEED_MSK 0x00000008 -#define ALTERA_TSE_CMD_PROMIS_EN_MSK 0x00000010 -#define ALTERA_TSE_CMD_PAD_EN_MSK 0x00000020 -#define ALTERA_TSE_CMD_CRC_FWD_MSK 0x00000040 -#define ALTERA_TSE_CMD_PAUSE_FWD_MSK 0x00000080 -#define ALTERA_TSE_CMD_PAUSE_IGNORE_MSK 0x00000100 -#define ALTERA_TSE_CMD_TX_ADDR_INS_MSK 0x00000200 #define ALTERA_TSE_CMD_HD_ENA_MSK 0x00000400 -#define ALTERA_TSE_CMD_EXCESS_COL_MSK 0x00000800 -#define ALTERA_TSE_CMD_LATE_COL_MSK 0x00001000 #define ALTERA_TSE_CMD_SW_RESET_MSK 0x00002000 -#define ALTERA_TSE_CMD_MHASH_SEL_MSK 0x00004000 -#define ALTERA_TSE_CMD_LOOPBACK_MSK 0x00008000 -/* Bits (18:16) = address select */ -#define ALTERA_TSE_CMD_TX_ADDR_SEL_MSK 0x00070000 -#define ALTERA_TSE_CMD_MAGIC_ENA_MSK 0x00080000 -#define ALTERA_TSE_CMD_SLEEP_MSK 0x00100000 -#define ALTERA_TSE_CMD_WAKEUP_MSK 0x00200000 -#define ALTERA_TSE_CMD_XOFF_GEN_MSK 0x00400000 -#define ALTERA_TSE_CMD_CNTL_FRM_ENA_MSK 0x00800000 -#define ALTERA_TSE_CMD_NO_LENGTH_CHECK_MSK 0x01000000 #define ALTERA_TSE_CMD_ENA_10_MSK 0x02000000 -#define ALTERA_TSE_CMD_RX_ERR_DISC_MSK 0x04000000 -/* Bits (30..27) reserved */ -#define ALTERA_TSE_CMD_CNT_RESET_MSK 0x80000000 - -#define ALTERA_TSE_TX_CMD_STAT_TX_SHIFT16 0x00040000 -#define ALTERA_TSE_TX_CMD_STAT_OMIT_CRC 0x00020000 - -#define ALTERA_TSE_RX_CMD_STAT_RX_SHIFT16 (0x02000000)
#define ALT_TSE_SW_RESET_TIMEOUT (3 * CONFIG_SYS_HZ) #define ALT_TSE_SGDMA_BUSY_TIMEOUT (3 * CONFIG_SYS_HZ)
On Wed, 2015-11-04 at 17:12 +0800, thomas@wytron.com.tw wrote:
Remove unused macro.
Signed-off-by: Thomas Chou thomas@wytron.com.tw
Reviewed-by: Chin Liang See clsee@altera.com
Thanks Chin Liang
Replace numerical bit shift with BIT macro in altera_tse
:%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31
Signed-off-by: Thomas Chou thomas@wytron.com.tw --- drivers/net/altera_tse.h | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/drivers/net/altera_tse.h b/drivers/net/altera_tse.h index 14c064b..5593efc 100644 --- a/drivers/net/altera_tse.h +++ b/drivers/net/altera_tse.h @@ -14,11 +14,11 @@ #define __packed_1_ __packed __aligned(1)
/* SGDMA Stuff */ -#define ALT_SGDMA_STATUS_BUSY_MSK 0x00000010 +#define ALT_SGDMA_STATUS_BUSY_MSK BIT(4)
-#define ALT_SGDMA_CONTROL_RUN_MSK 0x00000020 -#define ALT_SGDMA_CONTROL_STOP_DMA_ER_MSK 0x00000040 -#define ALT_SGDMA_CONTROL_SOFTWARERESET_MSK 0x00010000 +#define ALT_SGDMA_CONTROL_RUN_MSK BIT(5) +#define ALT_SGDMA_CONTROL_STOP_DMA_ER_MSK BIT(6) +#define ALT_SGDMA_CONTROL_SOFTWARERESET_MSK BIT(16)
/* * Descriptor control bit masks & offsets @@ -27,10 +27,10 @@ * The following bit-offsets are expressed relative to the LSB of * the control register bitfield. */ -#define ALT_SGDMA_DESCRIPTOR_CONTROL_GENERATE_EOP_MSK 0x00000001 -#define ALT_SGDMA_DESCRIPTOR_CONTROL_READ_FIXED_ADDRESS_MSK 0x00000002 -#define ALT_SGDMA_DESCRIPTOR_CONTROL_WRITE_FIXED_ADDRESS_MSK 0x00000004 -#define ALT_SGDMA_DESCRIPTOR_CONTROL_OWNED_BY_HW_MSK 0x00000080 +#define ALT_SGDMA_DESCRIPTOR_CONTROL_GENERATE_EOP_MSK BIT(0) +#define ALT_SGDMA_DESCRIPTOR_CONTROL_READ_FIXED_ADDRESS_MSK BIT(1) +#define ALT_SGDMA_DESCRIPTOR_CONTROL_WRITE_FIXED_ADDRESS_MSK BIT(2) +#define ALT_SGDMA_DESCRIPTOR_CONTROL_OWNED_BY_HW_MSK BIT(7)
/* * Descriptor status bit masks & offsets @@ -39,7 +39,7 @@ * The following bit-offsets are expressed relative to the LSB of * the status register bitfield. */ -#define ALT_SGDMA_DESCRIPTOR_STATUS_TERMINATED_BY_EOP_MSK 0x00000080 +#define ALT_SGDMA_DESCRIPTOR_STATUS_TERMINATED_BY_EOP_MSK BIT(7)
/* * The SGDMA controller buffer descriptor allocates @@ -85,12 +85,12 @@ struct alt_sgdma_registers { };
/* TSE Stuff */ -#define ALTERA_TSE_CMD_TX_ENA_MSK 0x00000001 -#define ALTERA_TSE_CMD_RX_ENA_MSK 0x00000002 -#define ALTERA_TSE_CMD_ETH_SPEED_MSK 0x00000008 -#define ALTERA_TSE_CMD_HD_ENA_MSK 0x00000400 -#define ALTERA_TSE_CMD_SW_RESET_MSK 0x00002000 -#define ALTERA_TSE_CMD_ENA_10_MSK 0x02000000 +#define ALTERA_TSE_CMD_TX_ENA_MSK BIT(0) +#define ALTERA_TSE_CMD_RX_ENA_MSK BIT(1) +#define ALTERA_TSE_CMD_ETH_SPEED_MSK BIT(3) +#define ALTERA_TSE_CMD_HD_ENA_MSK BIT(10) +#define ALTERA_TSE_CMD_SW_RESET_MSK BIT(13) +#define ALTERA_TSE_CMD_ENA_10_MSK BIT(25)
#define ALT_TSE_SW_RESET_TIMEOUT (3 * CONFIG_SYS_HZ) #define ALT_TSE_SGDMA_BUSY_TIMEOUT (3 * CONFIG_SYS_HZ)
On Wednesday, November 04, 2015 at 10:12:29 AM, Thomas Chou wrote:
Replace numerical bit shift with BIT macro in altera_tse
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31
Signed-off-by: Thomas Chou thomas@wytron.com.tw
Whole series:
Reviewed-by: Marek Vasut marex@denx.de
Best regards, Marek Vasut
On Wed, 2015-11-04 at 17:12 +0800, thomas@wytron.com.tw wrote:
Replace numerical bit shift with BIT macro in altera_tse
:%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31
Signed-off-by: Thomas Chou thomas@wytron.com.tw
Reviewed-by: Chin Liang See clsee@altera.com
Thanks Chin Liang
On 4 November 2015 at 21:52, Chin Liang See clsee@altera.com wrote:
On Wed, 2015-11-04 at 17:12 +0800, thomas@wytron.com.tw wrote:
Replace numerical bit shift with BIT macro in altera_tse
:%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31
Signed-off-by: Thomas Chou thomas@wytron.com.tw
Reviewed-by: Chin Liang See clsee@altera.com
Reviewed-by: Jagan Teki jteki@openedev.com
On Wed, 2015-11-04 at 17:12 +0800, thomas@wytron.com.tw wrote:
Use data type u32/u16/u8 for regs and desc, as it is more portable.
Signed-off-by: Thomas Chou thomas@wytron.com.tw
Reviewed-by: Chin Liang See clsee@altera.com
Thanks Chin Liang
Remove unused macro and regs def.
Signed-off-by: Thomas Chou thomas@wytron.com.tw Reviewed-by: Marek Vasut marex@denx.de Reviewed-by: Chin Liang See clsee@altera.com --- v2 remove unused mac regs def.
drivers/net/altera_tse.h | 104 ++--------------------------------------------- 1 file changed, 3 insertions(+), 101 deletions(-)
diff --git a/drivers/net/altera_tse.h b/drivers/net/altera_tse.h index 08c4f66..f289bff 100644 --- a/drivers/net/altera_tse.h +++ b/drivers/net/altera_tse.h @@ -14,20 +14,12 @@ #define __packed_1_ __attribute__ ((packed, aligned(1)))
/* SGDMA Stuff */ -#define ALT_SGDMA_STATUS_ERROR_MSK (0x00000001) -#define ALT_SGDMA_STATUS_EOP_ENCOUNTERED_MSK (0x00000002) -#define ALT_SGDMA_STATUS_DESC_COMPLETED_MSK (0x00000004) -#define ALT_SGDMA_STATUS_CHAIN_COMPLETED_MSK (0x00000008) #define ALT_SGDMA_STATUS_BUSY_MSK (0x00000010)
#define ALT_SGDMA_CONTROL_RUN_MSK (0x00000020) #define ALT_SGDMA_CONTROL_STOP_DMA_ER_MSK (0x00000040) #define ALT_SGDMA_CONTROL_SOFTWARERESET_MSK (0x00010000)
-#define ALTERA_TSE_SGDMA_INTR_MASK (ALT_SGDMA_CONTROL_IE_CHAIN_COMPLETED_MSK \ - | ALT_SGDMA_STATUS_DESC_COMPLETED_MSK \ - | ALT_SGDMA_CONTROL_IE_GLOBAL_MSK) - /* * Descriptor control bit masks & offsets * @@ -38,7 +30,6 @@ #define ALT_SGDMA_DESCRIPTOR_CONTROL_GENERATE_EOP_MSK (0x00000001) #define ALT_SGDMA_DESCRIPTOR_CONTROL_READ_FIXED_ADDRESS_MSK (0x00000002) #define ALT_SGDMA_DESCRIPTOR_CONTROL_WRITE_FIXED_ADDRESS_MSK (0x00000004) -#define ALT_SGDMA_DESCRIPTOR_CONTROL_ATLANTIC_CHANNEL_MSK (0x00000008) #define ALT_SGDMA_DESCRIPTOR_CONTROL_OWNED_BY_HW_MSK (0x00000080)
/* @@ -48,15 +39,7 @@ * The following bit-offsets are expressed relative to the LSB of * the status register bitfield. */ -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_CRC_MSK (0x00000001) -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_PARITY_MSK (0x00000002) -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_OVERFLOW_MSK (0x00000004) -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_SYNC_MSK (0x00000008) -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_UEOP_MSK (0x00000010) -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_MEOP_MSK (0x00000020) -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_MSOP_MSK (0x00000040) #define ALT_SGDMA_DESCRIPTOR_STATUS_TERMINATED_BY_EOP_MSK (0x00000080) -#define ALT_SGDMA_DESCRIPTOR_STATUS_ERROR_MSK (0x0000007F)
/* * The SGDMA controller buffer descriptor allocates @@ -104,37 +87,10 @@ struct alt_sgdma_registers { /* TSE Stuff */ #define ALTERA_TSE_CMD_TX_ENA_MSK (0x00000001) #define ALTERA_TSE_CMD_RX_ENA_MSK (0x00000002) -#define ALTERA_TSE_CMD_XON_GEN_MSK (0x00000004) #define ALTERA_TSE_CMD_ETH_SPEED_MSK (0x00000008) -#define ALTERA_TSE_CMD_PROMIS_EN_MSK (0x00000010) -#define ALTERA_TSE_CMD_PAD_EN_MSK (0x00000020) -#define ALTERA_TSE_CMD_CRC_FWD_MSK (0x00000040) -#define ALTERA_TSE_CMD_PAUSE_FWD_MSK (0x00000080) -#define ALTERA_TSE_CMD_PAUSE_IGNORE_MSK (0x00000100) -#define ALTERA_TSE_CMD_TX_ADDR_INS_MSK (0x00000200) #define ALTERA_TSE_CMD_HD_ENA_MSK (0x00000400) -#define ALTERA_TSE_CMD_EXCESS_COL_MSK (0x00000800) -#define ALTERA_TSE_CMD_LATE_COL_MSK (0x00001000) #define ALTERA_TSE_CMD_SW_RESET_MSK (0x00002000) -#define ALTERA_TSE_CMD_MHASH_SEL_MSK (0x00004000) -#define ALTERA_TSE_CMD_LOOPBACK_MSK (0x00008000) -/* Bits (18:16) = address select */ -#define ALTERA_TSE_CMD_TX_ADDR_SEL_MSK (0x00070000) -#define ALTERA_TSE_CMD_MAGIC_ENA_MSK (0x00080000) -#define ALTERA_TSE_CMD_SLEEP_MSK (0x00100000) -#define ALTERA_TSE_CMD_WAKEUP_MSK (0x00200000) -#define ALTERA_TSE_CMD_XOFF_GEN_MSK (0x00400000) -#define ALTERA_TSE_CMD_CNTL_FRM_ENA_MSK (0x00800000) -#define ALTERA_TSE_CMD_NO_LENGTH_CHECK_MSK (0x01000000) #define ALTERA_TSE_CMD_ENA_10_MSK (0x02000000) -#define ALTERA_TSE_CMD_RX_ERR_DISC_MSK (0x04000000) -/* Bits (30..27) reserved */ -#define ALTERA_TSE_CMD_CNT_RESET_MSK (0x80000000) - -#define ALTERA_TSE_TX_CMD_STAT_TX_SHIFT16 (0x00040000) -#define ALTERA_TSE_TX_CMD_STAT_OMIT_CRC (0x00020000) - -#define ALTERA_TSE_RX_CMD_STAT_RX_SHIFT16 (0x02000000)
#define ALT_TSE_SW_RESET_TIMEOUT (3 * CONFIG_SYS_HZ) #define ALT_TSE_SGDMA_BUSY_TIMEOUT (3 * CONFIG_SYS_HZ) @@ -160,67 +116,13 @@ struct alt_tse_mac { unsigned int mdio_phy0_addr; unsigned int mdio_phy1_addr;
- /* only if 100/1000 BaseX PCS, reserved otherwise */ - unsigned int reservedx44[5]; - - unsigned int reg_read_access_status; - unsigned int min_tx_ipg_length; - - /* IEEE 802.3 oEntity Managed Object Support */ - unsigned int aMACID_1; /*The MAC addresses */ - unsigned int aMACID_2; - unsigned int aFramesTransmittedOK; - unsigned int aFramesReceivedOK; - unsigned int aFramesCheckSequenceErrors; - unsigned int aAlignmentErrors; - unsigned int aOctetsTransmittedOK; - unsigned int aOctetsReceivedOK; - - /* IEEE 802.3 oPausedEntity Managed Object Support */ - unsigned int aTxPAUSEMACCtrlFrames; - unsigned int aRxPAUSEMACCtrlFrames; - - /* IETF MIB (MIB-II) Object Support */ - unsigned int ifInErrors; - unsigned int ifOutErrors; - unsigned int ifInUcastPkts; - unsigned int ifInMulticastPkts; - unsigned int ifInBroadcastPkts; - unsigned int ifOutDiscards; - unsigned int ifOutUcastPkts; - unsigned int ifOutMulticastPkts; - unsigned int ifOutBroadcastPkts; - - /* IETF RMON MIB Object Support */ - unsigned int etherStatsDropEvent; - unsigned int etherStatsOctets; - unsigned int etherStatsPkts; - unsigned int etherStatsUndersizePkts; - unsigned int etherStatsOversizePkts; - unsigned int etherStatsPkts64Octets; - unsigned int etherStatsPkts65to127Octets; - unsigned int etherStatsPkts128to255Octets; - unsigned int etherStatsPkts256to511Octets; - unsigned int etherStatsPkts512to1023Octets; - unsigned int etherStatsPkts1024to1518Octets; - - unsigned int etherStatsPkts1519toXOctets; - unsigned int etherStatsJabbers; - unsigned int etherStatsFragments; - - unsigned int reservedxE4; + unsigned int reserved1[0x29];
/*FIFO control register. */ unsigned int tx_cmd_stat; unsigned int rx_cmd_stat;
- unsigned int ipaccTxConf; - unsigned int ipaccRxConf; - unsigned int ipaccRxStat; - unsigned int ipaccRxStatSum; - - /*Multicast address resolution table */ - unsigned int hash_table[64]; + unsigned int reserved2[0x44];
/*Registers 0 to 31 within PHY device 0/1 */ unsigned int mdio_phy0[0x20]; @@ -236,7 +138,7 @@ struct alt_tse_mac { unsigned int supp_mac_addr_3_0; unsigned int supp_mac_addr_3_1;
- unsigned int reservedx320[56]; + unsigned int reserved3[0x38]; };
struct altera_tse_priv {
Use data type u32/u16/u8 for regs and desc, as it is more portable.
Signed-off-by: Thomas Chou thomas@wytron.com.tw Reviewed-by: Marek Vasut marex@denx.de Reviewed-by: Chin Liang See clsee@altera.com --- drivers/net/altera_tse.c | 16 ++++---- drivers/net/altera_tse.h | 104 +++++++++++++++++++++++------------------------ 2 files changed, 60 insertions(+), 60 deletions(-)
diff --git a/drivers/net/altera_tse.c b/drivers/net/altera_tse.c index 319983c..394503f 100644 --- a/drivers/net/altera_tse.c +++ b/drivers/net/altera_tse.c @@ -27,12 +27,12 @@ static inline void alt_sgdma_construct_descriptor( struct alt_sgdma_descriptor *next, void *read_addr, void *write_addr, - unsigned short length_or_eop, + u16 length_or_eop, int generate_eop, int read_fixed, int write_fixed_or_sop) { - unsigned char val; + u8 val;
/* * Mark the "next" descriptor as "not" owned by hardware. This prevents @@ -100,7 +100,7 @@ static int alt_sgdma_wait_transfer(struct alt_sgdma_registers *regs) static int alt_sgdma_start_transfer(struct alt_sgdma_registers *regs, struct alt_sgdma_descriptor *desc) { - unsigned int val; + u32 val;
/* Point the controller at the descriptor */ writel(virt_to_phys(desc), ®s->next_descriptor_pointer); @@ -121,7 +121,7 @@ static void tse_adjust_link(struct altera_tse_priv *priv, struct phy_device *phydev) { struct alt_tse_mac *mac_dev = priv->mac_dev; - unsigned int refvar; + u32 refvar;
if (!phydev->link) { debug("%s: No link.\n", phydev->dev->name); @@ -230,7 +230,7 @@ static void altera_tse_stop(struct udevice *dev) struct alt_sgdma_registers *rx_sgdma = priv->sgdma_rx; struct alt_sgdma_registers *tx_sgdma = priv->sgdma_tx; struct alt_sgdma_descriptor *rx_desc = priv->rx_desc; - unsigned int status; + u32 status; int ret; ulong ctime;
@@ -266,7 +266,7 @@ static int tse_mdio_read(struct mii_dev *bus, int addr, int devad, int reg) { struct altera_tse_priv *priv = bus->priv; struct alt_tse_mac *mac_dev = priv->mac_dev; - unsigned int value; + u32 value;
/* set mdio address */ writel(addr, &mac_dev->mdio_phy1_addr); @@ -337,7 +337,7 @@ static int altera_tse_write_hwaddr(struct udevice *dev) struct alt_tse_mac *mac_dev = priv->mac_dev; struct eth_pdata *pdata = dev_get_platdata(dev); u8 *hwaddr = pdata->enetaddr; - unsigned int mac_lo, mac_hi; + u32 mac_lo, mac_hi;
mac_lo = (hwaddr[3] << 24) | (hwaddr[2] << 16) | (hwaddr[1] << 8) | hwaddr[0]; @@ -362,7 +362,7 @@ static int altera_tse_start(struct udevice *dev) { struct altera_tse_priv *priv = dev_get_priv(dev); struct alt_tse_mac *mac_dev = priv->mac_dev; - unsigned int val; + u32 val; int ret;
/* need to create sgdma */ diff --git a/drivers/net/altera_tse.h b/drivers/net/altera_tse.h index f289bff..a96351a 100644 --- a/drivers/net/altera_tse.h +++ b/drivers/net/altera_tse.h @@ -54,34 +54,34 @@ * */ struct alt_sgdma_descriptor { - unsigned int source; /* the address of data to be read. */ - unsigned int source_pad; + u32 source; /* the address of data to be read. */ + u32 source_pad;
- unsigned int destination; /* the address to write data */ - unsigned int destination_pad; + u32 destination; /* the address to write data */ + u32 destination_pad;
- unsigned int next; /* the next descriptor in the list. */ - unsigned int next_pad; + u32 next; /* the next descriptor in the list. */ + u32 next_pad;
- unsigned short bytes_to_transfer; /* the number of bytes to transfer */ - unsigned char read_burst; - unsigned char write_burst; + u16 bytes_to_transfer; /* the number of bytes to transfer */ + u8 read_burst; + u8 write_burst;
- unsigned short actual_bytes_transferred;/* bytes transferred by DMA */ - unsigned char descriptor_status; - unsigned char descriptor_control; + u16 actual_bytes_transferred;/* bytes transferred by DMA */ + u8 descriptor_status; + u8 descriptor_control;
} __packed_1_;
/* SG-DMA Control/Status Slave registers map */
struct alt_sgdma_registers { - unsigned int status; - unsigned int status_pad[3]; - unsigned int control; - unsigned int control_pad[3]; - unsigned int next_descriptor_pointer; - unsigned int descriptor_pad[3]; + u32 status; + u32 status_pad[3]; + u32 control; + u32 control_pad[3]; + u32 next_descriptor_pointer; + u32 descriptor_pad[3]; };
/* TSE Stuff */ @@ -98,47 +98,47 @@ struct alt_sgdma_registers { /* MAC register Space */
struct alt_tse_mac { - unsigned int megacore_revision; - unsigned int scratch_pad; - unsigned int command_config; - unsigned int mac_addr_0; - unsigned int mac_addr_1; - unsigned int max_frame_length; - unsigned int pause_quanta; - unsigned int rx_sel_empty_threshold; - unsigned int rx_sel_full_threshold; - unsigned int tx_sel_empty_threshold; - unsigned int tx_sel_full_threshold; - unsigned int rx_almost_empty_threshold; - unsigned int rx_almost_full_threshold; - unsigned int tx_almost_empty_threshold; - unsigned int tx_almost_full_threshold; - unsigned int mdio_phy0_addr; - unsigned int mdio_phy1_addr; - - unsigned int reserved1[0x29]; + u32 megacore_revision; + u32 scratch_pad; + u32 command_config; + u32 mac_addr_0; + u32 mac_addr_1; + u32 max_frame_length; + u32 pause_quanta; + u32 rx_sel_empty_threshold; + u32 rx_sel_full_threshold; + u32 tx_sel_empty_threshold; + u32 tx_sel_full_threshold; + u32 rx_almost_empty_threshold; + u32 rx_almost_full_threshold; + u32 tx_almost_empty_threshold; + u32 tx_almost_full_threshold; + u32 mdio_phy0_addr; + u32 mdio_phy1_addr; + + u32 reserved1[0x29];
/*FIFO control register. */ - unsigned int tx_cmd_stat; - unsigned int rx_cmd_stat; + u32 tx_cmd_stat; + u32 rx_cmd_stat;
- unsigned int reserved2[0x44]; + u32 reserved2[0x44];
/*Registers 0 to 31 within PHY device 0/1 */ - unsigned int mdio_phy0[0x20]; - unsigned int mdio_phy1[0x20]; + u32 mdio_phy0[0x20]; + u32 mdio_phy1[0x20];
/*4 Supplemental MAC Addresses */ - unsigned int supp_mac_addr_0_0; - unsigned int supp_mac_addr_0_1; - unsigned int supp_mac_addr_1_0; - unsigned int supp_mac_addr_1_1; - unsigned int supp_mac_addr_2_0; - unsigned int supp_mac_addr_2_1; - unsigned int supp_mac_addr_3_0; - unsigned int supp_mac_addr_3_1; - - unsigned int reserved3[0x38]; + u32 supp_mac_addr_0_0; + u32 supp_mac_addr_0_1; + u32 supp_mac_addr_1_0; + u32 supp_mac_addr_1_1; + u32 supp_mac_addr_2_0; + u32 supp_mac_addr_2_1; + u32 supp_mac_addr_3_0; + u32 supp_mac_addr_3_1; + + u32 reserved3[0x38]; };
struct altera_tse_priv {
On Thu, Nov 5, 2015 at 6:54 AM, Thomas Chou thomas@wytron.com.tw wrote:
Use data type u32/u16/u8 for regs and desc, as it is more portable.
Signed-off-by: Thomas Chou thomas@wytron.com.tw Reviewed-by: Marek Vasut marex@denx.de Reviewed-by: Chin Liang See clsee@altera.com
Acked-by: Joe Hershberger <joe.hershberger@ni.com
On 2015年11月05日 20:54, Thomas Chou wrote:
Use data type u32/u16/u8 for regs and desc, as it is more portable.
Signed-off-by: Thomas Chou thomas@wytron.com.tw Reviewed-by: Marek Vasut marex@denx.de Reviewed-by: Chin Liang See clsee@altera.com
drivers/net/altera_tse.c | 16 ++++---- drivers/net/altera_tse.h | 104 +++++++++++++++++++++++------------------------ 2 files changed, 60 insertions(+), 60 deletions(-)
Applied to u-boot-nios.
diff --git a/drivers/net/altera_tse.c b/drivers/net/altera_tse.c index 319983c..394503f 100644 --- a/drivers/net/altera_tse.c +++ b/drivers/net/altera_tse.c @@ -27,12 +27,12 @@ static inline void alt_sgdma_construct_descriptor( struct alt_sgdma_descriptor *next, void *read_addr, void *write_addr,
- unsigned short length_or_eop,
- u16 length_or_eop, int generate_eop, int read_fixed, int write_fixed_or_sop) {
- unsigned char val;
u8 val;
/*
- Mark the "next" descriptor as "not" owned by hardware. This prevents
@@ -100,7 +100,7 @@ static int alt_sgdma_wait_transfer(struct alt_sgdma_registers *regs) static int alt_sgdma_start_transfer(struct alt_sgdma_registers *regs, struct alt_sgdma_descriptor *desc) {
- unsigned int val;
u32 val;
/* Point the controller at the descriptor */ writel(virt_to_phys(desc), ®s->next_descriptor_pointer);
@@ -121,7 +121,7 @@ static void tse_adjust_link(struct altera_tse_priv *priv, struct phy_device *phydev) { struct alt_tse_mac *mac_dev = priv->mac_dev;
- unsigned int refvar;
u32 refvar;
if (!phydev->link) { debug("%s: No link.\n", phydev->dev->name);
@@ -230,7 +230,7 @@ static void altera_tse_stop(struct udevice *dev) struct alt_sgdma_registers *rx_sgdma = priv->sgdma_rx; struct alt_sgdma_registers *tx_sgdma = priv->sgdma_tx; struct alt_sgdma_descriptor *rx_desc = priv->rx_desc;
- unsigned int status;
- u32 status; int ret; ulong ctime;
@@ -266,7 +266,7 @@ static int tse_mdio_read(struct mii_dev *bus, int addr, int devad, int reg) { struct altera_tse_priv *priv = bus->priv; struct alt_tse_mac *mac_dev = priv->mac_dev;
- unsigned int value;
u32 value;
/* set mdio address */ writel(addr, &mac_dev->mdio_phy1_addr);
@@ -337,7 +337,7 @@ static int altera_tse_write_hwaddr(struct udevice *dev) struct alt_tse_mac *mac_dev = priv->mac_dev; struct eth_pdata *pdata = dev_get_platdata(dev); u8 *hwaddr = pdata->enetaddr;
- unsigned int mac_lo, mac_hi;
u32 mac_lo, mac_hi;
mac_lo = (hwaddr[3] << 24) | (hwaddr[2] << 16) | (hwaddr[1] << 8) | hwaddr[0];
@@ -362,7 +362,7 @@ static int altera_tse_start(struct udevice *dev) { struct altera_tse_priv *priv = dev_get_priv(dev); struct alt_tse_mac *mac_dev = priv->mac_dev;
- unsigned int val;
u32 val; int ret;
/* need to create sgdma */
diff --git a/drivers/net/altera_tse.h b/drivers/net/altera_tse.h index f289bff..a96351a 100644 --- a/drivers/net/altera_tse.h +++ b/drivers/net/altera_tse.h @@ -54,34 +54,34 @@
*/ struct alt_sgdma_descriptor {
- unsigned int source; /* the address of data to be read. */
- unsigned int source_pad;
- u32 source; /* the address of data to be read. */
- u32 source_pad;
- unsigned int destination; /* the address to write data */
- unsigned int destination_pad;
- u32 destination; /* the address to write data */
- u32 destination_pad;
- unsigned int next; /* the next descriptor in the list. */
- unsigned int next_pad;
- u32 next; /* the next descriptor in the list. */
- u32 next_pad;
- unsigned short bytes_to_transfer; /* the number of bytes to transfer */
- unsigned char read_burst;
- unsigned char write_burst;
- u16 bytes_to_transfer; /* the number of bytes to transfer */
- u8 read_burst;
- u8 write_burst;
- unsigned short actual_bytes_transferred;/* bytes transferred by DMA */
- unsigned char descriptor_status;
- unsigned char descriptor_control;
u16 actual_bytes_transferred;/* bytes transferred by DMA */
u8 descriptor_status;
u8 descriptor_control;
} __packed_1_;
/* SG-DMA Control/Status Slave registers map */
struct alt_sgdma_registers {
- unsigned int status;
- unsigned int status_pad[3];
- unsigned int control;
- unsigned int control_pad[3];
- unsigned int next_descriptor_pointer;
- unsigned int descriptor_pad[3];
u32 status;
u32 status_pad[3];
u32 control;
u32 control_pad[3];
u32 next_descriptor_pointer;
u32 descriptor_pad[3]; };
/* TSE Stuff */
@@ -98,47 +98,47 @@ struct alt_sgdma_registers { /* MAC register Space */
struct alt_tse_mac {
- unsigned int megacore_revision;
- unsigned int scratch_pad;
- unsigned int command_config;
- unsigned int mac_addr_0;
- unsigned int mac_addr_1;
- unsigned int max_frame_length;
- unsigned int pause_quanta;
- unsigned int rx_sel_empty_threshold;
- unsigned int rx_sel_full_threshold;
- unsigned int tx_sel_empty_threshold;
- unsigned int tx_sel_full_threshold;
- unsigned int rx_almost_empty_threshold;
- unsigned int rx_almost_full_threshold;
- unsigned int tx_almost_empty_threshold;
- unsigned int tx_almost_full_threshold;
- unsigned int mdio_phy0_addr;
- unsigned int mdio_phy1_addr;
- unsigned int reserved1[0x29];
u32 megacore_revision;
u32 scratch_pad;
u32 command_config;
u32 mac_addr_0;
u32 mac_addr_1;
u32 max_frame_length;
u32 pause_quanta;
u32 rx_sel_empty_threshold;
u32 rx_sel_full_threshold;
u32 tx_sel_empty_threshold;
u32 tx_sel_full_threshold;
u32 rx_almost_empty_threshold;
u32 rx_almost_full_threshold;
u32 tx_almost_empty_threshold;
u32 tx_almost_full_threshold;
u32 mdio_phy0_addr;
u32 mdio_phy1_addr;
u32 reserved1[0x29];
/*FIFO control register. */
- unsigned int tx_cmd_stat;
- unsigned int rx_cmd_stat;
- u32 tx_cmd_stat;
- u32 rx_cmd_stat;
- unsigned int reserved2[0x44];
u32 reserved2[0x44];
/*Registers 0 to 31 within PHY device 0/1 */
- unsigned int mdio_phy0[0x20];
- unsigned int mdio_phy1[0x20];
u32 mdio_phy0[0x20];
u32 mdio_phy1[0x20];
/*4 Supplemental MAC Addresses */
- unsigned int supp_mac_addr_0_0;
- unsigned int supp_mac_addr_0_1;
- unsigned int supp_mac_addr_1_0;
- unsigned int supp_mac_addr_1_1;
- unsigned int supp_mac_addr_2_0;
- unsigned int supp_mac_addr_2_1;
- unsigned int supp_mac_addr_3_0;
- unsigned int supp_mac_addr_3_1;
- unsigned int reserved3[0x38];
u32 supp_mac_addr_0_0;
u32 supp_mac_addr_0_1;
u32 supp_mac_addr_1_0;
u32 supp_mac_addr_1_1;
u32 supp_mac_addr_2_0;
u32 supp_mac_addr_2_1;
u32 supp_mac_addr_3_0;
u32 supp_mac_addr_3_1;
u32 reserved3[0x38]; };
struct altera_tse_priv {
Fix packed and aligned attribute warnings.
WARNING: __packed is preferred over __attribute__((packed)) #14: FILE: drivers/net/altera_tse.h:14: +#define __packed_1_ __attribute__ ((packed, aligned(1)))
WARNING: __aligned(size) is preferred over __attribute__((aligned(size))) #14: FILE: drivers/net/altera_tse.h:14: +#define __packed_1_ __attribute__ ((packed, aligned(1)))
Signed-off-by: Thomas Chou thomas@wytron.com.tw Reviewed-by: Marek Vasut marex@denx.de Reviewed-by: Chin Liang See clsee@altera.com --- drivers/net/altera_tse.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/altera_tse.h b/drivers/net/altera_tse.h index a96351a..78ae369 100644 --- a/drivers/net/altera_tse.h +++ b/drivers/net/altera_tse.h @@ -11,7 +11,7 @@ #ifndef _ALTERA_TSE_H_ #define _ALTERA_TSE_H_
-#define __packed_1_ __attribute__ ((packed, aligned(1))) +#define __packed_1_ __packed __aligned(1)
/* SGDMA Stuff */ #define ALT_SGDMA_STATUS_BUSY_MSK (0x00000010)
On Thu, Nov 5, 2015 at 6:54 AM, Thomas Chou thomas@wytron.com.tw wrote:
Fix packed and aligned attribute warnings.
WARNING: __packed is preferred over __attribute__((packed)) #14: FILE: drivers/net/altera_tse.h:14: +#define __packed_1_ __attribute__ ((packed, aligned(1)))
WARNING: __aligned(size) is preferred over __attribute__((aligned(size))) #14: FILE: drivers/net/altera_tse.h:14: +#define __packed_1_ __attribute__ ((packed, aligned(1)))
Signed-off-by: Thomas Chou thomas@wytron.com.tw Reviewed-by: Marek Vasut marex@denx.de Reviewed-by: Chin Liang See clsee@altera.com
Acked-by: Joe Hershberger joe.hersherger@ni.com
On 2015年11月05日 20:54, Thomas Chou wrote:
Fix packed and aligned attribute warnings.
WARNING: __packed is preferred over __attribute__((packed)) #14: FILE: drivers/net/altera_tse.h:14: +#define __packed_1_ __attribute__ ((packed, aligned(1)))
WARNING: __aligned(size) is preferred over __attribute__((aligned(size))) #14: FILE: drivers/net/altera_tse.h:14: +#define __packed_1_ __attribute__ ((packed, aligned(1)))
Signed-off-by: Thomas Chou thomas@wytron.com.tw Reviewed-by: Marek Vasut marex@denx.de Reviewed-by: Chin Liang See clsee@altera.com
drivers/net/altera_tse.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Applied to u-boot-nios.
diff --git a/drivers/net/altera_tse.h b/drivers/net/altera_tse.h index a96351a..78ae369 100644 --- a/drivers/net/altera_tse.h +++ b/drivers/net/altera_tse.h @@ -11,7 +11,7 @@ #ifndef _ALTERA_TSE_H_ #define _ALTERA_TSE_H_
-#define __packed_1_ __attribute__ ((packed, aligned(1))) +#define __packed_1_ __packed __aligned(1)
/* SGDMA Stuff */ #define ALT_SGDMA_STATUS_BUSY_MSK (0x00000010)
Remove the useless parenthesis.
Signed-off-by: Thomas Chou thomas@wytron.com.tw Reviewed-by: Marek Vasut marex@denx.de Reviewed-by: Chin Liang See clsee@altera.com --- drivers/net/altera_tse.h | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/drivers/net/altera_tse.h b/drivers/net/altera_tse.h index 78ae369..0981308 100644 --- a/drivers/net/altera_tse.h +++ b/drivers/net/altera_tse.h @@ -14,11 +14,11 @@ #define __packed_1_ __packed __aligned(1)
/* SGDMA Stuff */ -#define ALT_SGDMA_STATUS_BUSY_MSK (0x00000010) +#define ALT_SGDMA_STATUS_BUSY_MSK 0x00000010
-#define ALT_SGDMA_CONTROL_RUN_MSK (0x00000020) -#define ALT_SGDMA_CONTROL_STOP_DMA_ER_MSK (0x00000040) -#define ALT_SGDMA_CONTROL_SOFTWARERESET_MSK (0x00010000) +#define ALT_SGDMA_CONTROL_RUN_MSK 0x00000020 +#define ALT_SGDMA_CONTROL_STOP_DMA_ER_MSK 0x00000040 +#define ALT_SGDMA_CONTROL_SOFTWARERESET_MSK 0x00010000
/* * Descriptor control bit masks & offsets @@ -27,10 +27,10 @@ * The following bit-offsets are expressed relative to the LSB of * the control register bitfield. */ -#define ALT_SGDMA_DESCRIPTOR_CONTROL_GENERATE_EOP_MSK (0x00000001) -#define ALT_SGDMA_DESCRIPTOR_CONTROL_READ_FIXED_ADDRESS_MSK (0x00000002) -#define ALT_SGDMA_DESCRIPTOR_CONTROL_WRITE_FIXED_ADDRESS_MSK (0x00000004) -#define ALT_SGDMA_DESCRIPTOR_CONTROL_OWNED_BY_HW_MSK (0x00000080) +#define ALT_SGDMA_DESCRIPTOR_CONTROL_GENERATE_EOP_MSK 0x00000001 +#define ALT_SGDMA_DESCRIPTOR_CONTROL_READ_FIXED_ADDRESS_MSK 0x00000002 +#define ALT_SGDMA_DESCRIPTOR_CONTROL_WRITE_FIXED_ADDRESS_MSK 0x00000004 +#define ALT_SGDMA_DESCRIPTOR_CONTROL_OWNED_BY_HW_MSK 0x00000080
/* * Descriptor status bit masks & offsets @@ -39,7 +39,7 @@ * The following bit-offsets are expressed relative to the LSB of * the status register bitfield. */ -#define ALT_SGDMA_DESCRIPTOR_STATUS_TERMINATED_BY_EOP_MSK (0x00000080) +#define ALT_SGDMA_DESCRIPTOR_STATUS_TERMINATED_BY_EOP_MSK 0x00000080
/* * The SGDMA controller buffer descriptor allocates @@ -85,12 +85,12 @@ struct alt_sgdma_registers { };
/* TSE Stuff */ -#define ALTERA_TSE_CMD_TX_ENA_MSK (0x00000001) -#define ALTERA_TSE_CMD_RX_ENA_MSK (0x00000002) -#define ALTERA_TSE_CMD_ETH_SPEED_MSK (0x00000008) -#define ALTERA_TSE_CMD_HD_ENA_MSK (0x00000400) -#define ALTERA_TSE_CMD_SW_RESET_MSK (0x00002000) -#define ALTERA_TSE_CMD_ENA_10_MSK (0x02000000) +#define ALTERA_TSE_CMD_TX_ENA_MSK 0x00000001 +#define ALTERA_TSE_CMD_RX_ENA_MSK 0x00000002 +#define ALTERA_TSE_CMD_ETH_SPEED_MSK 0x00000008 +#define ALTERA_TSE_CMD_HD_ENA_MSK 0x00000400 +#define ALTERA_TSE_CMD_SW_RESET_MSK 0x00002000 +#define ALTERA_TSE_CMD_ENA_10_MSK 0x02000000
#define ALT_TSE_SW_RESET_TIMEOUT (3 * CONFIG_SYS_HZ) #define ALT_TSE_SGDMA_BUSY_TIMEOUT (3 * CONFIG_SYS_HZ)
On Thu, Nov 5, 2015 at 6:54 AM, Thomas Chou thomas@wytron.com.tw wrote:
Remove the useless parenthesis.
Signed-off-by: Thomas Chou thomas@wytron.com.tw Reviewed-by: Marek Vasut marex@denx.de Reviewed-by: Chin Liang See clsee@altera.com
Acked-by: Joe Hershberger joe.hershberger@ni.com
On 2015年11月05日 20:54, Thomas Chou wrote:
Remove the useless parenthesis.
Signed-off-by: Thomas Chou thomas@wytron.com.tw Reviewed-by: Marek Vasut marex@denx.de Reviewed-by: Chin Liang See clsee@altera.com
drivers/net/altera_tse.h | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-)
Applied to u-boot-nios.
diff --git a/drivers/net/altera_tse.h b/drivers/net/altera_tse.h index 78ae369..0981308 100644 --- a/drivers/net/altera_tse.h +++ b/drivers/net/altera_tse.h @@ -14,11 +14,11 @@ #define __packed_1_ __packed __aligned(1)
/* SGDMA Stuff */ -#define ALT_SGDMA_STATUS_BUSY_MSK (0x00000010) +#define ALT_SGDMA_STATUS_BUSY_MSK 0x00000010
-#define ALT_SGDMA_CONTROL_RUN_MSK (0x00000020) -#define ALT_SGDMA_CONTROL_STOP_DMA_ER_MSK (0x00000040) -#define ALT_SGDMA_CONTROL_SOFTWARERESET_MSK (0x00010000) +#define ALT_SGDMA_CONTROL_RUN_MSK 0x00000020 +#define ALT_SGDMA_CONTROL_STOP_DMA_ER_MSK 0x00000040 +#define ALT_SGDMA_CONTROL_SOFTWARERESET_MSK 0x00010000
/*
- Descriptor control bit masks & offsets
@@ -27,10 +27,10 @@
The following bit-offsets are expressed relative to the LSB ofthe control register bitfield.*/ -#define ALT_SGDMA_DESCRIPTOR_CONTROL_GENERATE_EOP_MSK (0x00000001) -#define ALT_SGDMA_DESCRIPTOR_CONTROL_READ_FIXED_ADDRESS_MSK (0x00000002) -#define ALT_SGDMA_DESCRIPTOR_CONTROL_WRITE_FIXED_ADDRESS_MSK (0x00000004) -#define ALT_SGDMA_DESCRIPTOR_CONTROL_OWNED_BY_HW_MSK (0x00000080) +#define ALT_SGDMA_DESCRIPTOR_CONTROL_GENERATE_EOP_MSK 0x00000001 +#define ALT_SGDMA_DESCRIPTOR_CONTROL_READ_FIXED_ADDRESS_MSK 0x00000002 +#define ALT_SGDMA_DESCRIPTOR_CONTROL_WRITE_FIXED_ADDRESS_MSK 0x00000004 +#define ALT_SGDMA_DESCRIPTOR_CONTROL_OWNED_BY_HW_MSK 0x00000080
/*
- Descriptor status bit masks & offsets
@@ -39,7 +39,7 @@
The following bit-offsets are expressed relative to the LSB ofthe status register bitfield.*/ -#define ALT_SGDMA_DESCRIPTOR_STATUS_TERMINATED_BY_EOP_MSK (0x00000080) +#define ALT_SGDMA_DESCRIPTOR_STATUS_TERMINATED_BY_EOP_MSK 0x00000080
/*
- The SGDMA controller buffer descriptor allocates
@@ -85,12 +85,12 @@ struct alt_sgdma_registers { };
/* TSE Stuff */ -#define ALTERA_TSE_CMD_TX_ENA_MSK (0x00000001) -#define ALTERA_TSE_CMD_RX_ENA_MSK (0x00000002) -#define ALTERA_TSE_CMD_ETH_SPEED_MSK (0x00000008) -#define ALTERA_TSE_CMD_HD_ENA_MSK (0x00000400) -#define ALTERA_TSE_CMD_SW_RESET_MSK (0x00002000) -#define ALTERA_TSE_CMD_ENA_10_MSK (0x02000000) +#define ALTERA_TSE_CMD_TX_ENA_MSK 0x00000001 +#define ALTERA_TSE_CMD_RX_ENA_MSK 0x00000002 +#define ALTERA_TSE_CMD_ETH_SPEED_MSK 0x00000008 +#define ALTERA_TSE_CMD_HD_ENA_MSK 0x00000400 +#define ALTERA_TSE_CMD_SW_RESET_MSK 0x00002000 +#define ALTERA_TSE_CMD_ENA_10_MSK 0x02000000
#define ALT_TSE_SW_RESET_TIMEOUT (3 * CONFIG_SYS_HZ) #define ALT_TSE_SGDMA_BUSY_TIMEOUT (3 * CONFIG_SYS_HZ)
Replace numerical bit shift with BIT macro in altera_tse
:%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31
Signed-off-by: Thomas Chou thomas@wytron.com.tw Reviewed-by: Marek Vasut marex@denx.de Reviewed-by: Chin Liang See clsee@altera.com Reviewed-by: Jagan Teki jteki@openedev.com --- drivers/net/altera_tse.h | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/drivers/net/altera_tse.h b/drivers/net/altera_tse.h index 0981308..471a880 100644 --- a/drivers/net/altera_tse.h +++ b/drivers/net/altera_tse.h @@ -14,11 +14,11 @@ #define __packed_1_ __packed __aligned(1)
/* SGDMA Stuff */ -#define ALT_SGDMA_STATUS_BUSY_MSK 0x00000010 +#define ALT_SGDMA_STATUS_BUSY_MSK BIT(4)
-#define ALT_SGDMA_CONTROL_RUN_MSK 0x00000020 -#define ALT_SGDMA_CONTROL_STOP_DMA_ER_MSK 0x00000040 -#define ALT_SGDMA_CONTROL_SOFTWARERESET_MSK 0x00010000 +#define ALT_SGDMA_CONTROL_RUN_MSK BIT(5) +#define ALT_SGDMA_CONTROL_STOP_DMA_ER_MSK BIT(6) +#define ALT_SGDMA_CONTROL_SOFTWARERESET_MSK BIT(16)
/* * Descriptor control bit masks & offsets @@ -27,10 +27,10 @@ * The following bit-offsets are expressed relative to the LSB of * the control register bitfield. */ -#define ALT_SGDMA_DESCRIPTOR_CONTROL_GENERATE_EOP_MSK 0x00000001 -#define ALT_SGDMA_DESCRIPTOR_CONTROL_READ_FIXED_ADDRESS_MSK 0x00000002 -#define ALT_SGDMA_DESCRIPTOR_CONTROL_WRITE_FIXED_ADDRESS_MSK 0x00000004 -#define ALT_SGDMA_DESCRIPTOR_CONTROL_OWNED_BY_HW_MSK 0x00000080 +#define ALT_SGDMA_DESCRIPTOR_CONTROL_GENERATE_EOP_MSK BIT(0) +#define ALT_SGDMA_DESCRIPTOR_CONTROL_READ_FIXED_ADDRESS_MSK BIT(1) +#define ALT_SGDMA_DESCRIPTOR_CONTROL_WRITE_FIXED_ADDRESS_MSK BIT(2) +#define ALT_SGDMA_DESCRIPTOR_CONTROL_OWNED_BY_HW_MSK BIT(7)
/* * Descriptor status bit masks & offsets @@ -39,7 +39,7 @@ * The following bit-offsets are expressed relative to the LSB of * the status register bitfield. */ -#define ALT_SGDMA_DESCRIPTOR_STATUS_TERMINATED_BY_EOP_MSK 0x00000080 +#define ALT_SGDMA_DESCRIPTOR_STATUS_TERMINATED_BY_EOP_MSK BIT(7)
/* * The SGDMA controller buffer descriptor allocates @@ -85,12 +85,12 @@ struct alt_sgdma_registers { };
/* TSE Stuff */ -#define ALTERA_TSE_CMD_TX_ENA_MSK 0x00000001 -#define ALTERA_TSE_CMD_RX_ENA_MSK 0x00000002 -#define ALTERA_TSE_CMD_ETH_SPEED_MSK 0x00000008 -#define ALTERA_TSE_CMD_HD_ENA_MSK 0x00000400 -#define ALTERA_TSE_CMD_SW_RESET_MSK 0x00002000 -#define ALTERA_TSE_CMD_ENA_10_MSK 0x02000000 +#define ALTERA_TSE_CMD_TX_ENA_MSK BIT(0) +#define ALTERA_TSE_CMD_RX_ENA_MSK BIT(1) +#define ALTERA_TSE_CMD_ETH_SPEED_MSK BIT(3) +#define ALTERA_TSE_CMD_HD_ENA_MSK BIT(10) +#define ALTERA_TSE_CMD_SW_RESET_MSK BIT(13) +#define ALTERA_TSE_CMD_ENA_10_MSK BIT(25)
#define ALT_TSE_SW_RESET_TIMEOUT (3 * CONFIG_SYS_HZ) #define ALT_TSE_SGDMA_BUSY_TIMEOUT (3 * CONFIG_SYS_HZ)
On Thu, Nov 5, 2015 at 6:54 AM, Thomas Chou thomas@wytron.com.tw wrote:
Replace numerical bit shift with BIT macro in altera_tse
:%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31
Signed-off-by: Thomas Chou thomas@wytron.com.tw Reviewed-by: Marek Vasut marex@denx.de Reviewed-by: Chin Liang See clsee@altera.com Reviewed-by: Jagan Teki jteki@openedev.com
Acked-by: Joe Hershberger joe.hershberger@ni.com
On 2015年11月05日 20:54, Thomas Chou wrote:
Replace numerical bit shift with BIT macro in altera_tse
:%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31
Signed-off-by: Thomas Chou thomas@wytron.com.tw Reviewed-by: Marek Vasut marex@denx.de Reviewed-by: Chin Liang See clsee@altera.com Reviewed-by: Jagan Teki jteki@openedev.com
drivers/net/altera_tse.h | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-)
Applied to u-boot-nios.
diff --git a/drivers/net/altera_tse.h b/drivers/net/altera_tse.h index 0981308..471a880 100644 --- a/drivers/net/altera_tse.h +++ b/drivers/net/altera_tse.h @@ -14,11 +14,11 @@ #define __packed_1_ __packed __aligned(1)
/* SGDMA Stuff */ -#define ALT_SGDMA_STATUS_BUSY_MSK 0x00000010 +#define ALT_SGDMA_STATUS_BUSY_MSK BIT(4)
-#define ALT_SGDMA_CONTROL_RUN_MSK 0x00000020 -#define ALT_SGDMA_CONTROL_STOP_DMA_ER_MSK 0x00000040 -#define ALT_SGDMA_CONTROL_SOFTWARERESET_MSK 0x00010000 +#define ALT_SGDMA_CONTROL_RUN_MSK BIT(5) +#define ALT_SGDMA_CONTROL_STOP_DMA_ER_MSK BIT(6) +#define ALT_SGDMA_CONTROL_SOFTWARERESET_MSK BIT(16)
/*
- Descriptor control bit masks & offsets
@@ -27,10 +27,10 @@
The following bit-offsets are expressed relative to the LSB ofthe control register bitfield.*/ -#define ALT_SGDMA_DESCRIPTOR_CONTROL_GENERATE_EOP_MSK 0x00000001 -#define ALT_SGDMA_DESCRIPTOR_CONTROL_READ_FIXED_ADDRESS_MSK 0x00000002 -#define ALT_SGDMA_DESCRIPTOR_CONTROL_WRITE_FIXED_ADDRESS_MSK 0x00000004 -#define ALT_SGDMA_DESCRIPTOR_CONTROL_OWNED_BY_HW_MSK 0x00000080 +#define ALT_SGDMA_DESCRIPTOR_CONTROL_GENERATE_EOP_MSK BIT(0) +#define ALT_SGDMA_DESCRIPTOR_CONTROL_READ_FIXED_ADDRESS_MSK BIT(1) +#define ALT_SGDMA_DESCRIPTOR_CONTROL_WRITE_FIXED_ADDRESS_MSK BIT(2) +#define ALT_SGDMA_DESCRIPTOR_CONTROL_OWNED_BY_HW_MSK BIT(7)
/*
- Descriptor status bit masks & offsets
@@ -39,7 +39,7 @@
The following bit-offsets are expressed relative to the LSB ofthe status register bitfield.*/ -#define ALT_SGDMA_DESCRIPTOR_STATUS_TERMINATED_BY_EOP_MSK 0x00000080 +#define ALT_SGDMA_DESCRIPTOR_STATUS_TERMINATED_BY_EOP_MSK BIT(7)
/*
- The SGDMA controller buffer descriptor allocates
@@ -85,12 +85,12 @@ struct alt_sgdma_registers { };
/* TSE Stuff */ -#define ALTERA_TSE_CMD_TX_ENA_MSK 0x00000001 -#define ALTERA_TSE_CMD_RX_ENA_MSK 0x00000002 -#define ALTERA_TSE_CMD_ETH_SPEED_MSK 0x00000008 -#define ALTERA_TSE_CMD_HD_ENA_MSK 0x00000400 -#define ALTERA_TSE_CMD_SW_RESET_MSK 0x00002000 -#define ALTERA_TSE_CMD_ENA_10_MSK 0x02000000 +#define ALTERA_TSE_CMD_TX_ENA_MSK BIT(0) +#define ALTERA_TSE_CMD_RX_ENA_MSK BIT(1) +#define ALTERA_TSE_CMD_ETH_SPEED_MSK BIT(3) +#define ALTERA_TSE_CMD_HD_ENA_MSK BIT(10) +#define ALTERA_TSE_CMD_SW_RESET_MSK BIT(13) +#define ALTERA_TSE_CMD_ENA_10_MSK BIT(25)
#define ALT_TSE_SW_RESET_TIMEOUT (3 * CONFIG_SYS_HZ) #define ALT_TSE_SGDMA_BUSY_TIMEOUT (3 * CONFIG_SYS_HZ)
Hi Thomas,
On Thu, Nov 5, 2015 at 6:54 AM, Thomas Chou thomas@wytron.com.tw wrote:
Remove unused macro and regs def.
Signed-off-by: Thomas Chou thomas@wytron.com.tw Reviewed-by: Marek Vasut marex@denx.de Reviewed-by: Chin Liang See clsee@altera.com
Acked-by: Joe Hershberger joe.hershberger@ni.com
On 2015年11月05日 20:54, Thomas Chou wrote:
Remove unused macro and regs def.
Signed-off-by: Thomas Chou thomas@wytron.com.tw Reviewed-by: Marek Vasut marex@denx.de Reviewed-by: Chin Liang See clsee@altera.com
v2 remove unused mac regs def.
drivers/net/altera_tse.h | 104 ++--------------------------------------------- 1 file changed, 3 insertions(+), 101 deletions(-)
Applied to u-boot-nios.
diff --git a/drivers/net/altera_tse.h b/drivers/net/altera_tse.h index 08c4f66..f289bff 100644 --- a/drivers/net/altera_tse.h +++ b/drivers/net/altera_tse.h @@ -14,20 +14,12 @@ #define __packed_1_ __attribute__ ((packed, aligned(1)))
/* SGDMA Stuff */ -#define ALT_SGDMA_STATUS_ERROR_MSK (0x00000001) -#define ALT_SGDMA_STATUS_EOP_ENCOUNTERED_MSK (0x00000002) -#define ALT_SGDMA_STATUS_DESC_COMPLETED_MSK (0x00000004) -#define ALT_SGDMA_STATUS_CHAIN_COMPLETED_MSK (0x00000008) #define ALT_SGDMA_STATUS_BUSY_MSK (0x00000010)
#define ALT_SGDMA_CONTROL_RUN_MSK (0x00000020) #define ALT_SGDMA_CONTROL_STOP_DMA_ER_MSK (0x00000040) #define ALT_SGDMA_CONTROL_SOFTWARERESET_MSK (0x00010000)
-#define ALTERA_TSE_SGDMA_INTR_MASK (ALT_SGDMA_CONTROL_IE_CHAIN_COMPLETED_MSK \
| ALT_SGDMA_STATUS_DESC_COMPLETED_MSK \| ALT_SGDMA_CONTROL_IE_GLOBAL_MSK)- /*
- Descriptor control bit masks & offsets
@@ -38,7 +30,6 @@ #define ALT_SGDMA_DESCRIPTOR_CONTROL_GENERATE_EOP_MSK (0x00000001) #define ALT_SGDMA_DESCRIPTOR_CONTROL_READ_FIXED_ADDRESS_MSK (0x00000002) #define ALT_SGDMA_DESCRIPTOR_CONTROL_WRITE_FIXED_ADDRESS_MSK (0x00000004) -#define ALT_SGDMA_DESCRIPTOR_CONTROL_ATLANTIC_CHANNEL_MSK (0x00000008) #define ALT_SGDMA_DESCRIPTOR_CONTROL_OWNED_BY_HW_MSK (0x00000080)
/* @@ -48,15 +39,7 @@
The following bit-offsets are expressed relative to the LSB ofthe status register bitfield.*/ -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_CRC_MSK (0x00000001) -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_PARITY_MSK (0x00000002) -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_OVERFLOW_MSK (0x00000004) -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_SYNC_MSK (0x00000008) -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_UEOP_MSK (0x00000010) -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_MEOP_MSK (0x00000020) -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_MSOP_MSK (0x00000040) #define ALT_SGDMA_DESCRIPTOR_STATUS_TERMINATED_BY_EOP_MSK (0x00000080) -#define ALT_SGDMA_DESCRIPTOR_STATUS_ERROR_MSK (0x0000007F)
/*
- The SGDMA controller buffer descriptor allocates
@@ -104,37 +87,10 @@ struct alt_sgdma_registers { /* TSE Stuff */ #define ALTERA_TSE_CMD_TX_ENA_MSK (0x00000001) #define ALTERA_TSE_CMD_RX_ENA_MSK (0x00000002) -#define ALTERA_TSE_CMD_XON_GEN_MSK (0x00000004) #define ALTERA_TSE_CMD_ETH_SPEED_MSK (0x00000008) -#define ALTERA_TSE_CMD_PROMIS_EN_MSK (0x00000010) -#define ALTERA_TSE_CMD_PAD_EN_MSK (0x00000020) -#define ALTERA_TSE_CMD_CRC_FWD_MSK (0x00000040) -#define ALTERA_TSE_CMD_PAUSE_FWD_MSK (0x00000080) -#define ALTERA_TSE_CMD_PAUSE_IGNORE_MSK (0x00000100) -#define ALTERA_TSE_CMD_TX_ADDR_INS_MSK (0x00000200) #define ALTERA_TSE_CMD_HD_ENA_MSK (0x00000400) -#define ALTERA_TSE_CMD_EXCESS_COL_MSK (0x00000800) -#define ALTERA_TSE_CMD_LATE_COL_MSK (0x00001000) #define ALTERA_TSE_CMD_SW_RESET_MSK (0x00002000) -#define ALTERA_TSE_CMD_MHASH_SEL_MSK (0x00004000) -#define ALTERA_TSE_CMD_LOOPBACK_MSK (0x00008000) -/* Bits (18:16) = address select */ -#define ALTERA_TSE_CMD_TX_ADDR_SEL_MSK (0x00070000) -#define ALTERA_TSE_CMD_MAGIC_ENA_MSK (0x00080000) -#define ALTERA_TSE_CMD_SLEEP_MSK (0x00100000) -#define ALTERA_TSE_CMD_WAKEUP_MSK (0x00200000) -#define ALTERA_TSE_CMD_XOFF_GEN_MSK (0x00400000) -#define ALTERA_TSE_CMD_CNTL_FRM_ENA_MSK (0x00800000) -#define ALTERA_TSE_CMD_NO_LENGTH_CHECK_MSK (0x01000000) #define ALTERA_TSE_CMD_ENA_10_MSK (0x02000000) -#define ALTERA_TSE_CMD_RX_ERR_DISC_MSK (0x04000000) -/* Bits (30..27) reserved */ -#define ALTERA_TSE_CMD_CNT_RESET_MSK (0x80000000)
-#define ALTERA_TSE_TX_CMD_STAT_TX_SHIFT16 (0x00040000) -#define ALTERA_TSE_TX_CMD_STAT_OMIT_CRC (0x00020000)
-#define ALTERA_TSE_RX_CMD_STAT_RX_SHIFT16 (0x02000000)
#define ALT_TSE_SW_RESET_TIMEOUT (3 * CONFIG_SYS_HZ) #define ALT_TSE_SGDMA_BUSY_TIMEOUT (3 * CONFIG_SYS_HZ) @@ -160,67 +116,13 @@ struct alt_tse_mac { unsigned int mdio_phy0_addr; unsigned int mdio_phy1_addr;
- /* only if 100/1000 BaseX PCS, reserved otherwise */
- unsigned int reservedx44[5];
- unsigned int reg_read_access_status;
- unsigned int min_tx_ipg_length;
- /* IEEE 802.3 oEntity Managed Object Support */
- unsigned int aMACID_1; /*The MAC addresses */
- unsigned int aMACID_2;
- unsigned int aFramesTransmittedOK;
- unsigned int aFramesReceivedOK;
- unsigned int aFramesCheckSequenceErrors;
- unsigned int aAlignmentErrors;
- unsigned int aOctetsTransmittedOK;
- unsigned int aOctetsReceivedOK;
- /* IEEE 802.3 oPausedEntity Managed Object Support */
- unsigned int aTxPAUSEMACCtrlFrames;
- unsigned int aRxPAUSEMACCtrlFrames;
- /* IETF MIB (MIB-II) Object Support */
- unsigned int ifInErrors;
- unsigned int ifOutErrors;
- unsigned int ifInUcastPkts;
- unsigned int ifInMulticastPkts;
- unsigned int ifInBroadcastPkts;
- unsigned int ifOutDiscards;
- unsigned int ifOutUcastPkts;
- unsigned int ifOutMulticastPkts;
- unsigned int ifOutBroadcastPkts;
- /* IETF RMON MIB Object Support */
- unsigned int etherStatsDropEvent;
- unsigned int etherStatsOctets;
- unsigned int etherStatsPkts;
- unsigned int etherStatsUndersizePkts;
- unsigned int etherStatsOversizePkts;
- unsigned int etherStatsPkts64Octets;
- unsigned int etherStatsPkts65to127Octets;
- unsigned int etherStatsPkts128to255Octets;
- unsigned int etherStatsPkts256to511Octets;
- unsigned int etherStatsPkts512to1023Octets;
- unsigned int etherStatsPkts1024to1518Octets;
- unsigned int etherStatsPkts1519toXOctets;
- unsigned int etherStatsJabbers;
- unsigned int etherStatsFragments;
- unsigned int reservedxE4;
unsigned int reserved1[0x29];
/*FIFO control register. */ unsigned int tx_cmd_stat; unsigned int rx_cmd_stat;
- unsigned int ipaccTxConf;
- unsigned int ipaccRxConf;
- unsigned int ipaccRxStat;
- unsigned int ipaccRxStatSum;
- /*Multicast address resolution table */
- unsigned int hash_table[64];
unsigned int reserved2[0x44];
/*Registers 0 to 31 within PHY device 0/1 */ unsigned int mdio_phy0[0x20];
@@ -236,7 +138,7 @@ struct alt_tse_mac { unsigned int supp_mac_addr_3_0; unsigned int supp_mac_addr_3_1;
- unsigned int reservedx320[56];
unsigned int reserved3[0x38]; };
struct altera_tse_priv {
participants (5)
-
Chin Liang See -
Jagan Teki -
Joe Hershberger -
Marek Vasut -
Thomas Chou