RE: [U-Boot-Users] BDI2000 and MPC8260
-----Original Message----- From: Wolfgang Denk Sent: Thursday, September 01, 2005 10:50 In message 20050901111214.457804dc.ajz@cambridgebroadband.com you wrote:
The problem I am seeing is that the bdi2000 cannot
communicate with the PM828 if the HRW is not
present in the flash device. I.e. you need u-boot.bin
already loaded into flash in order to load
u-boot.bin into flash!
This is normal; with an erased flash, the processor will read a HRCW which sets external bus arbitration and CPU core disabled - there is nothing left for the BDI to communicate with.
We have anoter solution working here. To initally program the HRCW into flash we use another JTAG device (a Corellis JTAG interface) to wiggle th pins on the 8260 to program the flash. This works, but is fairly slow. To program 256 bytes of HRCW takes 10 - 15 seconds.
After this we switch to BDI2000 and program U-Boot.
This way we don't need yet another piece of HW on the board.
Rune Torgersen wrote:
-----Original Message----- From: Wolfgang Denk Sent: Thursday, September 01, 2005 10:50 In message 20050901111214.457804dc.ajz@cambridgebroadband.com you wrote:
The problem I am seeing is that the bdi2000 cannot
communicate with the PM828 if the HRW is not
present in the flash device. I.e. you need u-boot.bin
already loaded into flash in order to load
u-boot.bin into flash!
This is normal; with an erased flash, the processor will read a HRCW which sets external bus arbitration and CPU core disabled - there is nothing left for the BDI to communicate with.
We have anoter solution working here. To initally program the HRCW into flash we use another JTAG device (a Corellis JTAG interface) to wiggle th pins on the 8260 to program the flash. This works, but is fairly slow. To program 256 bytes of HRCW takes 10 - 15 seconds.
After this we switch to BDI2000 and program U-Boot.
This way we don't need yet another piece of HW on the board.
You realize of course that the HRCW is in the first 32 bytes of flash and you actually only need 4 bytes (offsets 0,8,16,24). If you optimized your load, you could get the 10-15 seconds down to probably 1 second. Since it only needs to be done once in a board's lifetime, this may be a "don't care."
Other thoughts: * Has anyone ever asked Abatron for an ability to use it as a raw JTAG accelerator? It should be unnecessary to have a separate Corellis JTAG accelerator to do this.
* Freescale seems to have stopped providing unfettered access to the BSDL (Boundary Scan Description Language) interface to their processors. For instance, the MPC8260 is not in the list: http://www.freescale.com/webapp/sps/site/overview.jsp?nodeId=0162468rH3bTdGZj9NtRjM
* JTAG can be bit-banged with a PC parallel port extremely cheaply although it is also very slow.
gvb
On Sep 6, 2005, at 11:44 AM, Jerry Van Baren wrote:
Other thoughts:
- Has anyone ever asked Abatron for an ability to use it as a raw JTAG
accelerator? It should be unnecessary to have a separate Corellis JTAG accelerator to do this.
Newer versions of the BDI2000 have raw JTAG commands that will provide this access. A proper 'expect' script should work.
- Freescale seems to have stopped providing unfettered access to the
BSDL
Even with the BSDL, it is a time consuming process :-)
- JTAG can be bit-banged with a PC parallel port extremely cheaply
although it is also very slow.
I usually do this with an 8xx and it's IO pins.
-- Dan
In message 431DB954.9030803@smiths-aerospace.com you wrote:
- Freescale seems to have stopped providing unfettered access to the
BSDL (Boundary Scan Description Language) interface to their processors. For instance, the MPC8260 is not in the list: http://www.freescale.com/webapp/sps/site/overview.jsp?nodeId=0162468rH3bTdGZj9NtRjM
We were never able to pass their NDA roadblocks when we asked for the necessary information to extend the BDM4GDB adapter for 82xx... :-(
- JTAG can be bit-banged with a PC parallel port extremely cheaply
although it is also very slow.
Be careful about the voltages, though.
Best regards,
Wolfgang Denk
Wolfgang Denk wrote:
In message 431DB954.9030803@smiths-aerospace.com you wrote:
- Freescale seems to have stopped providing unfettered access to the
BSDL (Boundary Scan Description Language) interface to their processors. For instance, the MPC8260 is not in the list: http://www.freescale.com/webapp/sps/site/overview.jsp?nodeId=0162468rH3bTdGZj9NtRjM
We were never able to pass their NDA roadblocks when we asked for the necessary information to extend the BDM4GDB adapter for 82xx... :-(
Slightly different question, different answer ;-). The BSDL is describing the processor I/O ring shift register, allowing the JTAG to wiggle pins. What you are referring to is the COP (?) debugger interface which is also accessed via JTAG but is proprietary. The BSDL _is_ available as Rune pointed out. This allows you to program memory (very slowly) by shifting an {address, data, chip select}, toggle the write line, repeat ad nausium.
Note that you have to be careful with wiggling pins via JTAG: if you inadvertantly set two pins that are connected together to be "output" and set them to fighting, one of them will lose (generally the processor). I would never do that, but know someone who did ;-).
[snip]
Best regards, Wolfgang Denk
Thanks, gvb
In message 431DF2A9.6020301@smiths-aerospace.com you wrote:
Slightly different question, different answer ;-). The BSDL is describing the processor I/O ring shift register, allowing the JTAG to wiggle pins. What you are referring to is the COP (?) debugger interface which is also accessed via JTAG but is proprietary. The BSDL
I know the difference. The result was the same :-(
Best regards,
Wolfgang Denk
participants (4)
-
Dan Malek -
Jerry Van Baren -
Rune Torgersen -
Wolfgang Denk