Hi Tom,

CI result: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/7572

The following changes since commit e644dfbb1786a4a3308b068e1f61cd9e2dfac237:

configs: Resync with savedefconfig (2021-05-15 08:10:13 -0400)

are available in the Git repository at:

git@source.denx.de:u-boot/custodians/u-boot-riscv.git

for you to fetch changes up to 89419279f4fe6bfd68dd518059ef2007295f1cb4:

riscv: Group assembly optimized implementation of memory routines into a submenu (2021-05-17 16:47:33 +0800)

---------------------------------------------------------------- Bin Meng (4): riscv: ax25-ae350: doc: Fix minor format issues riscv: Split SiFive CLINT support between SPL and U-Boot proper riscv: Fix memmove and optimise memcpy when misalign riscv: Group assembly optimized implementation of memory routines into a submenu

Sean Anderson (1): riscv: Fix arch_fixup_fdt always failing without /chosen

arch/riscv/Kconfig | 13 ++- arch/riscv/cpu/fu540/Kconfig | 2 +- arch/riscv/cpu/generic/Kconfig | 3 +- arch/riscv/include/asm/global_data.h | 2 +- arch/riscv/lib/Makefile | 2 +- arch/riscv/lib/fdt_fixup.c | 11 ++- arch/riscv/lib/memcpy.S | 223 +++++++++++++++++++++++++++++------------------ arch/riscv/lib/memmove.S | 176 +++++++++++++++++++++++++------------ doc/board/AndesTech/ax25-ae350.rst | 4 +- drivers/timer/Makefile | 2 +- 10 files changed, 284 insertions(+), 154 deletions(-)

Best regards, Leo