[U-Boot-Users] Bootp on PXA255 and resume from sleep
Hi all,
I am using U-Boot 1.0.2 on our custom platform which is based on the PXA255 and we use SMSC LAN91c96 ethernet chip. When I use "bootp" all I get are timeouts. I checked the code and I found the problem is in the udelay() located in the cpu/pxa/interrupts.c
bootp calls NetLoop (in net.c), which calls BootpRequest (bootp.c) which then calls NetSetTimeOut. This function retrives the current value of the counter OSCR and stores it in the timeStart variable.
Then the NetLoop enters the Main packet reception loop. During the packet sending in smc_send_packet the udelay() is used. This function, when called, resets the value of timer (OSCR = 0). At the end of the Main packet reception loop, the timout is tested, using the current value of the timer and the value stored, when the NetSetTimeout was called. The problem is, that the current value of the timer is smaller (due to udelay, which resets the OSCR) then the stored value (timeStart) and we always get a timeout. I modified the udelay_masked in the cpu/pxa/interrupts.c to this:
void udelay_masked (unsigned long usec) { ulong tmo;
tmo = usec / 1000; tmo *= CFG_HZ; tmo /= 1000;
#ifdef _DO_NOT_RESET_TIMER_ ulong tms; tms = get_timer_masked(); while((get_timer_masked() - tms) < tmo) /* NOP */;
#else reset_timer_masked ();
while (tmo >= get_timer_masked ()) /*NOP*/; #endif }
When I use this code, the bootp works as excpected. Has anyone else had problems like this?
The second question is about implementing resume from sleep. Has anybody implemented it? Where is the best place to check if this is reset due to Hardware reset or due to WakeUp event? In memsetup.S?
Thanks and best regards, Matej
In message 1084262222.1696.69.camel@mbmatejdebian.ultra.si you wrote:
I am using U-Boot 1.0.2 on our custom platform which is based on the PXA255 and we use SMSC LAN91c96 ethernet chip. When I use "bootp" all I get are timeouts. I checked the code and I found the problem is in the udelay() located in the cpu/pxa/interrupts.c
Did you have a look at a more recent version of U-Boot? This problem is believed to be fixed.
The second question is about implementing resume from sleep. Has anybody implemented it?
None that I know of.
Where is the best place to check if this is reset due to Hardware reset or due to WakeUp event? In memsetup.S?
Ask yourself: has this anything to do with setting up the memory controller? ==> No!
Best regards,
Wolfgang Denk
Hi
I am using U-Boot 1.0.2 on our custom platform which is based on the PXA255 and we use SMSC LAN91c96 ethernet chip. When I use "bootp" all I get are timeouts. I checked the code and I found the problem is in the udelay() located in the cpu/pxa/interrupts.c
Did you have a look at a more recent version of U-Boot? This problem is believed to be fixed.
No. Tried with the CVS version. Here is the log: ----------------------------------------------------------------------- U-Boot 1.1.2 (May 11 2004 - 11:28:32)
U-Boot code: A1F00000 -> A1F1984C BSS: -> A1F4DB80 RAM Configuration: Bank #0: a0000000 32 MB Flash: 2 MB *** Warning - bad CRC, using default environment
Bolfenk> bootp BOOTP broadcast 1 TFTP from server 172.18.1.53; our IP address is 172.18.1.18 Filename '/home/matej/Projects/bolfenk/images/uzImage'. Load address: 0xa1000000 Loading: T #T T T T T T T T T Retry count exceeded; starting again BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 BOOTP broadcast 5
Retry count exceeded; starting again BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 BOOTP broadcast 5
Retry count exceeded; starting again BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 BOOTP broadcast 5
Abort Bolfenk> -----------------------------------------------------------------------
When I replace the get_timer_masked: ----------------------------------------------------------------------- Bolfenk> bootp BOOTP broadcast 1 TFTP from server 172.18.1.53; our IP address is 172.18.1.18 Filename '/home/matej/Projects/bolfenk/images/uzImage'. Load address: 0xa1000000 Loading: #################################################################
################################################################# ###### done Bytes transferred = 693416 (a94a8 hex) Bolfenk> -----------------------------------------------------------------------
Where is the best place to check if this is reset due to Hardware reset or due to WakeUp event? In memsetup.S?
Ask yourself: has this anything to do with setting up the memory controller? ==> No!
Actually, IMHO it does. If you followed the ARM maling list, message PXA255 Resume, they talked about not touching the GPIO registers during resume. And since the GPIO registers are modified in the memsetup.S, this code should be aware of resume.
Also I found some "hints" on the WEB, qoute: " Second, your bootloader must find out if he got called because of a Hardware or Awake event. This can be done by checking RCSR. If RCSR_SMR is set, you> should load the value of PSPR to the PC. This can be all done in u-boot/boards/<yours>/memsetup.S "
What do you suggest? Maybe in cpu/pxa/start.S, just after the call to the memsetup in cpu_init_crit, before the MMU gets disbaled?
Thank you and best regards, Matej
participants (2)
-
Matej Kupljen -
Wolfgang Denk