[resent only to list, to avoid blocking due to too many recipients]

Olimex A64-Teres-I board is a mainboard (the only one so far) for Olimex Teres-I DIY laptop kit.

Key features: - Allwinner A64 Cortex-A53 - Mali-400MP2 GPU - AXP803 PMIC - 2GB DDR3 RAM - MicroSD Slot - 16GB eMMC Flash - eDP LCD display - HDMI - USB Host - Battery management - 5V DC power supply - Certified Open Source Hardware (OSHW)

Works: - i2C - MMC/SD - PWM backlight

Known broken: - USB

Company page: https://linux-sunxi.org/Olimex_Teres-A64 Community page: https://linux-sunxi.org/Olimex_Teres-A64 hardware sources: https://github.com/OLIMEX/DIY-LAPTOP/tree/master/HARDWARE/A64-TERES/TERES-PC...

This patch enables support for the A64-Teres-I board to u-boot, including enabling screen backlight (lacking from Linux device-tree).

Linux commit details about the sun50i-a64-teres-i.dts sync: "arm64: dts: allwinner: a64: Rename uart0_pins_a label to uart0_pb_pins" (sha1: d91ebb95b96c8840932dc3a10c9f243712555467)

Cosmetic warnings regarding whitespace and placement of SPDX notice for dts file was ignored.

config and .dtsi file are adapted from pinebook files.

Tested-by: Jonas Smedegaard dr@jones.dk Signed-off-by: Jonas Smedegaard dr@jones.dk ---

Changes for v2: * List Icenowy and Jonas as MAINTAINERS * Add commit hash in linux tree for sun50i-a64-teres-i.dts * Drop superfluous and unsupported Author: tag

Changes for v3: * Use tags sun50i a64 (not sunxi) * List key, working, and known broken features * Reference upstream pages. * Reference linux commit

--- MAINTAINERS | 8 + arch/arm/dts/Makefile | 3 +- arch/arm/dts/sun50i-a64-teres-i-u-boot.dtsi | 41 +++ arch/arm/dts/sun50i-a64-teres-i.dts | 270 ++++++++++++++++++++ configs/teres_i_defconfig | 21 ++ 5 files changed, 342 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/sun50i-a64-teres-i-u-boot.dtsi create mode 100644 arch/arm/dts/sun50i-a64-teres-i.dts create mode 100644 configs/teres_i_defconfig

diff --git a/MAINTAINERS b/MAINTAINERS index c77abba1e5..d6ba87a0ba 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -319,6 +319,14 @@ F: arch/arm/include/asm/arch-sunxi/ F: arch/arm/mach-sunxi/ F: board/sunxi/

+ARM SUNXI OLIMEX TERES-I +M: Jonas Smedegaard dr@jones.dk +M: Icenowy Zheng icenowy@aosc.io +S: Maintained +T: git https://salsa.debian.org/js/u-boot +F: arch/arm/dts/sun50i-a64-teres-i* +F: configs/teres_i_defconfig + ARM TEGRA M: Tom Warren twarren@nvidia.com S: Maintained diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 0aee8dfde0..eabe9e1ae3 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -483,7 +483,8 @@ dtb-$(CONFIG_MACH_SUN50I) += \ sun50i-a64-pine64-plus.dtb \ sun50i-a64-pine64.dtb \ sun50i-a64-pinebook.dtb \ - sun50i-a64-sopine-baseboard.dtb + sun50i-a64-sopine-baseboard.dtb \ + sun50i-a64-teres-i.dtb dtb-$(CONFIG_MACH_SUN9I) += \ sun9i-a80-optimus.dtb \ sun9i-a80-cubieboard4.dtb \ diff --git a/arch/arm/dts/sun50i-a64-teres-i-u-boot.dtsi b/arch/arm/dts/sun50i-a64-teres-i-u-boot.dtsi new file mode 100644 index 0000000000..1a64b7d09c --- /dev/null +++ b/arch/arm/dts/sun50i-a64-teres-i-u-boot.dtsi @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2019 Vasily Khoruzhick anarsoul@gmail.com + * + */ + +#include "sunxi-u-boot.dtsi" + +/ { + vdd_bl: regulator@0 { + compatible = "regulator-fixed"; + regulator-name = "bl-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */ + enable-active-high; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm 0 50000 0>; + brightness-levels = <0 5 10 15 20 30 40 55 70 85 100>; + default-brightness-level = <2>; + enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */ + power-supply = <&vdd_bl>; + }; +}; + +/* The ANX6345 eDP-bridge is on i2c */ +&i2c0 { + anx6345: edp-bridge@38 { + compatible = "analogix,anx6345"; + reg = <0x38>; + reset-gpios = <&pio 3 24 GPIO_ACTIVE_LOW>; /* PD24 */ + status = "okay"; + }; +}; + +&pwm { + status = "okay"; +}; diff --git a/arch/arm/dts/sun50i-a64-teres-i.dts b/arch/arm/dts/sun50i-a64-teres-i.dts new file mode 100644 index 0000000000..c455b24dd0 --- /dev/null +++ b/arch/arm/dts/sun50i-a64-teres-i.dts @@ -0,0 +1,270 @@ +/* + * Copyright (C) Harald Geyer harald@ccbib.org + * based on sun50i-a64-olinuxino.dts by Jagan Teki jteki@openedev.com + * + * SPDX-License-Identifier: (GPL-2.0 OR MIT) + */ + +/dts-v1/; + +#include "sun50i-a64.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/pwm/pwm.h> + +/ { + model = "Olimex A64 Teres-I"; + compatible = "olimex,a64-teres-i", "allwinner,sun50i-a64"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + + framebuffer-lcd { + eDP25-supply = <&reg_dldo2>; + eDP12-supply = <&reg_dldo3>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + lid-switch { + label = "Lid Switch"; + gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>; /* PL8 */ + linux,input-type = <EV_SW>; + linux,code = <SW_LID>; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + + capslock { + label = "teres-i:green:capslock"; + gpios = <&pio 2 7 GPIO_ACTIVE_HIGH>; /* PC7 */ + }; + + numlock { + label = "teres-i:green:numlock"; + gpios = <&pio 2 4 GPIO_ACTIVE_HIGH>; /* PC4 */ + }; + }; + + reg_usb1_vbus: usb1-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb1-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */ + status = "okay"; + }; + + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ + }; +}; + +&ehci1 { + status = "okay"; +}; + + +/* The ANX6345 eDP-bridge is on i2c0. There is no linux (mainline) + * driver for this chip at the moment, the bootloader initializes it. + * However it can be accessed with the i2c-dev driver from user space. + */ +&i2c0 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + status = "okay"; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + vmmc-supply = <&reg_dcdc1>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; + disable-wp; + bus-width = <4>; + status = "okay"; +}; + +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; + vmmc-supply = <&reg_aldo2>; + vqmmc-supply = <&reg_dldo4>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; + status = "okay"; + + rtl8723bs: wifi@1 { + reg = <1>; + interrupt-parent = <&r_pio>; + interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */ + interrupt-names = "host-wake"; + }; +}; + +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_pins>; + vmmc-supply = <&reg_dcdc1>; + vqmmc-supply = <&reg_dcdc1>; + bus-width = <8>; + non-removable; + cap-mmc-hw-reset; + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&r_rsb { + status = "okay"; + + axp803: pmic@3a3 { + compatible = "x-powers,axp803"; + reg = <0x3a3>; + interrupt-parent = <&r_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + wakeup-source; + }; +}; + +#include "axp803.dtsi" + +&reg_aldo1 { + regulator-always-on; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-name = "vcc-pe"; +}; + +&reg_aldo2 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-pl"; +}; + +&reg_aldo3 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-pll-avcc"; +}; + +&reg_dcdc1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-3v3"; +}; + +&reg_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1040000>; + regulator-max-microvolt = <1300000>; + regulator-name = "vdd-cpux"; +}; + +/* DCDC3 is polyphased with DCDC2 */ + +&reg_dcdc5 { + regulator-always-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vcc-ddr3"; +}; + +&reg_dcdc6 { + regulator-always-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-sys"; +}; + +&reg_dldo1 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-hdmi"; +}; + +&reg_dldo2 { + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-name = "vcc-pd"; +}; + +&reg_dldo3 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-name = "vdd-edp"; +}; + +&reg_dldo4 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi-io"; +}; + +&reg_eldo1 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "cpvdd"; +}; + +&reg_eldo2 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-dvdd-csi"; +}; + +&reg_fldo1 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-name = "vcc-1v2-hsic"; +}; + +/* + * The A64 chip cannot work without this regulator off, although + * it seems to be only driving the AR100 core. + * Maybe we don't still know well about CPUs domain. + */ +&reg_fldo2 { + regulator-always-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-cpus"; +}; + +&reg_rtc_ldo { + regulator-name = "vcc-rtc"; +}; + +&simplefb_hdmi { + vcc-hdmi-supply = <&reg_dldo1>; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pb_pins>; + status = "okay"; +}; + +&usbphy { + usb1_vbus-supply = <&reg_usb1_vbus>; + status = "okay"; +}; diff --git a/configs/teres_i_defconfig b/configs/teres_i_defconfig new file mode 100644 index 0000000000..939dc24408 --- /dev/null +++ b/configs/teres_i_defconfig @@ -0,0 +1,21 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_SPL=y +CONFIG_MACH_SUN50I=y +CONFIG_DRAM_CLK=552 +CONFIG_DRAM_ZQ=3881949 +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +CONFIG_I2C0_ENABLE=y +# CONFIG_CMD_FLASH is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-teres-i" +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_PWM=y +CONFIG_PWM_SUNXI=y +CONFIG_USB_EHCI_HCD=y +CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +# CONFIG_USB_GADGET is not set +CONFIG_VIDEO_BRIDGE=y +CONFIG_VIDEO_BRIDGE_ANALOGIX_ANX6345=y