Dear Roger

On 07/18/2013 02:10 AM, Roger Quadros wrote:

Dan,

On 07/17/2013 11:16 PM, Dan Murphy wrote:

...

• Enable the OMAP5 EHCI host clocks
• Add OMAP5 EHCI register definitions
• Add OMAP5 ES2 host revision

Signed-off-by: Dan Murphy dmurphy@ti.com

v3 - Updated per comments - http://patchwork.ozlabs.org/patch/258230/

arch/arm/cpu/armv7/omap5/hw_data.c | 17 ++++++++++++ arch/arm/include/asm/arch-omap5/clock.h | 6 +++++ arch/arm/include/asm/arch-omap5/ehci.h | 43 +++++++++++++++++++++++++++++++ arch/arm/include/asm/ehci-omap.h | 1 + drivers/usb/host/ehci-omap.c | 2 +- 5 files changed, 68 insertions(+), 1 deletion(-) create mode 100644 arch/arm/include/asm/arch-omap5/ehci.h

diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index 07b1108..b1be748 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -414,6 +414,10 @@ void enable_basic_clocks(void) (*prcm)->cm_l4per_gpio6_clkctrl, (*prcm)->cm_l4per_gpio7_clkctrl, (*prcm)->cm_l4per_gpio8_clkctrl, +#ifdef CONFIG_USB_EHCI_OMAP

• (*prcm)->cm_clksel_usb_60mhz,
  

• (*prcm)->cm_l3init_hsusbtll_clkctrl,
  

+#endif 0 };

@@ -425,6 +429,9 @@ void enable_basic_clocks(void) (*prcm)->cm_wkup_wdtimer2_clkctrl, (*prcm)->cm_l4per_uart3_clkctrl, (*prcm)->cm_l4per_i2c1_clkctrl, +#ifdef CONFIG_USB_EHCI_OMAP

• (*prcm)->cm_l3init_hsusbhost_clkctrl,
  

+#endif 0 };

@@ -448,6 +455,16 @@ void enable_basic_clocks(void) setbits_le32((*prcm)->cm_wkup_gptimer1_clkctrl, GPTIMER1_CLKCTRL_CLKSEL_MASK);

+#ifdef CONFIG_USB_EHCI

• /* Enable port 2 and 3 clocks*/
• setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl,

• 	USB_HOST_HS_CLKCTRL_MASK);
  

For consistency, maybe you should enable all 3 port clocks since you are enabling all 3 TLL clocks below?

So I thought about this we should enable all 3 clocks since it is a common file and disable the unused clocks in the board file.

Or we should enable the specific port clocks during ehci_hcd_init in the board file only since it is a board implementation detail.

Thoughts?

...

• /* Enable all 3 usb host ports tll clocks*/
• setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,

• 	USB_TLL_HS_CLKCTRL_MASK);
  

+#endif

• do_enable_clocks(clk_domains_essential, clk_modules_hw_auto_essential, clk_modules_explicit_en_essential,

diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h index 4d2765d..3a58337 100644 --- a/arch/arm/include/asm/arch-omap5/clock.h +++ b/arch/arm/include/asm/arch-omap5/clock.h @@ -165,6 +165,12 @@ /* CM_L3INIT_USBPHY_CLKCTRL */ #define USBPHY_CLKCTRL_OPTFCLKEN_PHY_48M_MASK 8

+/* CM_L3INIT_USB_HOST_HS_CLKCTRL */ +#define USB_HOST_HS_CLKCTRL_MASK 0x56C0

+/* CM_L3INIT_USB_TLL_HS_CLKCTRL */ +#define USB_TLL_HS_CLKCTRL_MASK 0x700

/* CM_MPU_MPU_CLKCTRL */ #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_SHIFT 24 #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_MASK (3 << 24) diff --git a/arch/arm/include/asm/arch-omap5/ehci.h b/arch/arm/include/asm/arch-omap5/ehci.h new file mode 100644 index 0000000..3921e4a --- /dev/null +++ b/arch/arm/include/asm/arch-omap5/ehci.h @@ -0,0 +1,43 @@ +/*

• • Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com*
• • Author: Govindraj R govindraj.raja@ti.com
• • This program is free software; you can redistribute it and/or
• • modify it under the terms of the GNU General Public License as
• • published by the Free Software Foundation; either version 2 of
• • the License, or (at your option) any later version.
• • This program is distributed in the hope that it will be useful,
• • but WITHOUT ANY WARRANTY; without even the implied warranty of
• • MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
• • GNU General Public License for more details.
• • You should have received a copy of the GNU General Public License
• • along with this program; if not, write to the Free Software
• • Foundation, Inc., 59 Temple Place, Suite 330, Boston,
• • MA 02111-1307 USA
• */

+#ifndef _EHCI_H +#define _EHCI_H

+#define OMAP_EHCI_BASE (OMAP54XX_L4_CORE_BASE + 0x64C00) +#define OMAP_UHH_BASE (OMAP54XX_L4_CORE_BASE + 0x64000) +#define OMAP_USBTLL_BASE (OMAP54XX_L4_CORE_BASE + 0x62000)

+/* TLL Register Set */ +#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE (1 << 3) +#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP (1 << 2) +#define OMAP_USBTLL_SYSCONFIG_SOFTRESET (1 << 1) +#define OMAP_USBTLL_SYSCONFIG_CACTIVITY (1 << 8) +#define OMAP_USBTLL_SYSSTATUS_RESETDONE 1

+#define OMAP_UHH_SYSCONFIG_SOFTRESET 1 +#define OMAP_UHH_SYSSTATUS_EHCI_RESETDONE (1 << 2) +#define OMAP_UHH_SYSCONFIG_NOIDLE (1 << 2) +#define OMAP_UHH_SYSCONFIG_NOSTDBY (1 << 4)

+#define OMAP_UHH_SYSCONFIG_VAL (OMAP_UHH_SYSCONFIG_NOIDLE | \

• 			OMAP_UHH_SYSCONFIG_NOSTDBY)
  

+#endif /* _EHCI_H */ diff --git a/arch/arm/include/asm/ehci-omap.h b/arch/arm/include/asm/ehci-omap.h index 77e8170..0b09e9d 100644 --- a/arch/arm/include/asm/ehci-omap.h +++ b/arch/arm/include/asm/ehci-omap.h @@ -42,6 +42,7 @@ enum usbhs_omap_port_mode { /* Values of UHH_REVISION - Note: these are not given in the TRM */ #define OMAP_USBHS_REV1 0x00000010 /* OMAP3 */ #define OMAP_USBHS_REV2 0x50700100 /* OMAP4 */ +#define OMAP_USBHS_REV2_1 0x50700101 /* OMAP5 */

/* UHH Register Set */ #define OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN (1 << 2) diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c index 086c697..17f2214 100644 --- a/drivers/usb/host/ehci-omap.c +++ b/drivers/usb/host/ehci-omap.c @@ -208,7 +208,7 @@ int omap_ehci_hcd_init(struct omap_usbhs_board_data *usbhs_pdata, clrbits_le32(&reg, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS); else setbits_le32(&reg, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS);

• } else if (rev == OMAP_USBHS_REV2) {

• } else if ((rev == OMAP_USBHS_REV2) || (rev == OMAP_USBHS_REV2_1)) { clrsetbits_le32(&reg, (OMAP_P1_MODE_CLEAR | OMAP_P2_MODE_CLEAR), OMAP4_UHH_HOSTCONFIG_APP_START_CLK);

As OMAP5 has 3 ports, are we missing OMAP_P3_MODE_CLEAR here? Better to put REV2_1 in a separate else {}?

Also, REV2 is for OMAP4 which has only 2 ports so I don't understand why this is in the code for REV2. if (is_ehci_hsic_mode(usbhs_pdata->port_mode[2])) setbits_le32(&reg, OMAP_P3_MODE_HSIC);

That could be moved into REV2_1 as well.

OK will add else case for rev 2.1.

A little below in the file I see this.

omap_ehci_phy_reset(0, 10);

This function takes care only of PHY1 and PHY2 but not PHY3. Could this be the reason why the PORT3 (i.e. LAN chip) is not working?

No that is not the reason. The GPIO would be reset based on PHY1 value in this patch series. But I should technically add the PHY3 GPIO as well.

Alternatively that function should be called there only be called if we are in PHY mode. i.e. is_ehci_phy_mode(), as it seems to release the PHY reset.

cheers, -roger

cheers, -roger

On Fri, Jul 19, 2013 at 12:30:54PM +0300, Roger Quadros wrote:

On 07/18/2013 08:48 PM, Dan Murphy wrote:

...

Dear Roger

On 07/18/2013 02:10 AM, Roger Quadros wrote:

...

Dan,

On 07/17/2013 11:16 PM, Dan Murphy wrote:

...

• Enable the OMAP5 EHCI host clocks
• Add OMAP5 EHCI register definitions
• Add OMAP5 ES2 host revision

Signed-off-by: Dan Murphy dmurphy@ti.com

v3 - Updated per comments - http://patchwork.ozlabs.org/patch/258230/

arch/arm/cpu/armv7/omap5/hw_data.c | 17 ++++++++++++ arch/arm/include/asm/arch-omap5/clock.h | 6 +++++ arch/arm/include/asm/arch-omap5/ehci.h | 43 +++++++++++++++++++++++++++++++ arch/arm/include/asm/ehci-omap.h | 1 + drivers/usb/host/ehci-omap.c | 2 +- 5 files changed, 68 insertions(+), 1 deletion(-) create mode 100644 arch/arm/include/asm/arch-omap5/ehci.h

diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index 07b1108..b1be748 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -414,6 +414,10 @@ void enable_basic_clocks(void) (*prcm)->cm_l4per_gpio6_clkctrl, (*prcm)->cm_l4per_gpio7_clkctrl, (*prcm)->cm_l4per_gpio8_clkctrl, +#ifdef CONFIG_USB_EHCI_OMAP

• (*prcm)->cm_clksel_usb_60mhz,
  

• (*prcm)->cm_l3init_hsusbtll_clkctrl,
  

+#endif 0 };

@@ -425,6 +429,9 @@ void enable_basic_clocks(void) (*prcm)->cm_wkup_wdtimer2_clkctrl, (*prcm)->cm_l4per_uart3_clkctrl, (*prcm)->cm_l4per_i2c1_clkctrl, +#ifdef CONFIG_USB_EHCI_OMAP

• (*prcm)->cm_l3init_hsusbhost_clkctrl,
  

+#endif 0 };

@@ -448,6 +455,16 @@ void enable_basic_clocks(void) setbits_le32((*prcm)->cm_wkup_gptimer1_clkctrl, GPTIMER1_CLKCTRL_CLKSEL_MASK);

+#ifdef CONFIG_USB_EHCI

• /* Enable port 2 and 3 clocks*/
• setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl,

• 	USB_HOST_HS_CLKCTRL_MASK);
  

For consistency, maybe you should enable all 3 port clocks since you are enabling all 3 TLL clocks below?

So I thought about this we should enable all 3 clocks since it is a common file and disable the unused clocks in the board file.

Or we should enable the specific port clocks during ehci_hcd_init in the board file only since it is a board implementation detail.

Thoughts?

IMHO enabling the clocks based on board is best.

Agree. We only enable what we need, not enable and then disable as someone will forget to disable (or not know they need to). Even if this means adding a define or 3 for which ports we do have.

Dear Dan Murphy,

Fix the linker error for missing ulpi_reset when ulpi is not defined in the board config.

Signed-off-by: Dan Murphy dmurphy@ti.com

Acked-by: Marek Vasut marex@denx.de

---

v3 - No updates - http://patchwork.ozlabs.org/patch/258228/

drivers/usb/host/ehci-omap.c | 7 +++++++ 1 file changed, 7 insertions(+)

diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c index 17f2214..bd7191c 100644 --- a/drivers/usb/host/ehci-omap.c +++ b/drivers/usb/host/ehci-omap.c @@ -90,6 +90,7 @@ static void omap_usbhs_hsic_init(int port) writel(reg, &usbtll->channel_conf + port); }

+#ifdef CONFIG_USB_ULPI static void omap_ehci_soft_phy_reset(int port) { struct ulpi_viewport ulpi_vp; @@ -99,6 +100,12 @@ static void omap_ehci_soft_phy_reset(int port)

ulpi_reset(&ulpi_vp); } +#else +static void omap_ehci_soft_phy_reset(int port) +{

• return;

+} +#endif

inline int __board_usb_init(void) {

Best regards, Marek Vasut

Dear Dan Murphy,

Set the usbethaddr based on the OMAP DIE_ID registers which should be unique for each processor.

Then set this as the usb ethernet MAC address.

Signed-off-by: Dan Murphy dmurphy@ti.com

v3 - new patch

board/ti/omap5_uevm/evm.c | 26 ++++++++++++++++++++++++++ include/configs/omap5_uevm.h | 2 ++ 2 files changed, 28 insertions(+)

diff --git a/board/ti/omap5_uevm/evm.c b/board/ti/omap5_uevm/evm.c index bf14cd2..9add0fd 100644 --- a/board/ti/omap5_uevm/evm.c +++ b/board/ti/omap5_uevm/evm.c @@ -33,6 +33,11 @@ #include <usb.h> #include <asm/arch/ehci.h> #include <asm/ehci-omap.h>

+#define MAX_DEVICE_MAC 20 +#define DIE_ID_REG_BASE (OMAP54XX_L4_CORE_BASE + 0x2000) +#define DIE_ID_REG_OFFSET 0x200

#endif

DECLARE_GLOBAL_DATA_PTR; @@ -121,6 +126,27 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor) { int ret; int auxclk;

• int val[4] = { 0 };
• int reg;
• char device_mac[MAX_DEVICE_MAC];
• reg = DIE_ID_REG_BASE + DIE_ID_REG_OFFSET;
• val[0] = readl(reg);
• val[1] = readl(reg + 0x8);
• val[2] = readl(reg + 0xC);
• val[3] = readl(reg + 0x10);
• /* create a fake MAC address from the processor ID code.

• * first byte is 0x02 to signify locally administered.
  

• */
  

/* * valid * multiline * comment ... has that leading newline on the top. [1] */

• snprintf(device_mac, MAX_DEVICE_MAC, "%02X:%02X:%02X:%02X:%02X:%02X",

• 		0x02, val[3] & 0xff, val[2] & 0xff, val[1] & 
  

0xff,

• 		val[0] & 0xff, (val[0] >> 8 & 0xff));
  

+#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG

• setenv("usbethaddr", device_mac);

+#endif

Urgh ... this is a big fat NAK. No, just don't do this, please. A kitten will die if you set variables in the code like this. Another one will die for such a config option.

You might work around this problem by setting a different env variable (yet I am still unhappy to see this) and then in the board environment have a command to load the USB mac address from that other variable. But do not enforce the mac address on users.

auxclk = readl((*prcm)->scrm_auxclk1); /* Request auxilary clock */ diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h index 0740a32..53b86ec 100644 --- a/include/configs/omap5_uevm.h +++ b/include/configs/omap5_uevm.h @@ -79,5 +79,7 @@

#define CONSOLEDEV "ttyO2"

+#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG

#define CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC 16296 #endif /* __CONFIG_OMAP5_EVM_H */

[1] http://www.denx.de/wiki/U-Boot/CodingStyle

Best regards, Marek Vasut

Dear Dan Murphy,

On 07/17/2013 11:28 PM, Marek Vasut wrote:

...

Dear Dan Murphy,

...

Set the usbethaddr based on the OMAP DIE_ID registers which should be unique for each processor.

Then set this as the usb ethernet MAC address.

Signed-off-by: Dan Murphy dmurphy@ti.com

v3 - new patch

board/ti/omap5_uevm/evm.c | 26 ++++++++++++++++++++++++++ include/configs/omap5_uevm.h | 2 ++ 2 files changed, 28 insertions(+)

diff --git a/board/ti/omap5_uevm/evm.c b/board/ti/omap5_uevm/evm.c index bf14cd2..9add0fd 100644 --- a/board/ti/omap5_uevm/evm.c +++ b/board/ti/omap5_uevm/evm.c @@ -33,6 +33,11 @@

#include <usb.h> #include <asm/arch/ehci.h> #include <asm/ehci-omap.h>

+#define MAX_DEVICE_MAC 20 +#define DIE_ID_REG_BASE (OMAP54XX_L4_CORE_BASE + 0x2000) +#define DIE_ID_REG_OFFSET 0x200

#endif

DECLARE_GLOBAL_DATA_PTR;

@@ -121,6 +126,27 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor) {

int ret; int auxclk;

• int val[4] = { 0 };
• int reg;
• char device_mac[MAX_DEVICE_MAC];
• reg = DIE_ID_REG_BASE + DIE_ID_REG_OFFSET;
• val[0] = readl(reg);
• val[1] = readl(reg + 0x8);
• val[2] = readl(reg + 0xC);
• val[3] = readl(reg + 0x10);
• /* create a fake MAC address from the processor ID code.

• * first byte is 0x02 to signify locally administered.
  

• */
  

/*

• valid
• multiline
• comment ... has that leading newline on the top. [1]

*/

Will fix

...

...

• snprintf(device_mac, MAX_DEVICE_MAC, "%02X:%02X:%02X:%02X:%02X:%02X",

• 		0x02, val[3] & 0xff, val[2] & 0xff, val[1] &
  

0xff,

...

• 		val[0] & 0xff, (val[0] >> 8 & 0xff));
  

+#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG

• setenv("usbethaddr", device_mac);

+#endif

Urgh ... this is a big fat NAK. No, just don't do this, please. A kitten will die if you set variables in the code like this. Another one will die for such a config option.

You might work around this problem by setting a different env variable (yet I am still unhappy to see this) and then in the board environment have a command to load the USB mac address from that other variable. But do not enforce the mac address on users.

I will modify the usbethaddr only if the user has not already set the variable. This is the way I see it in other code as well.

Is that acceptable?

That'd also make sense, yeah.

Best regards, Marek Vasut

Dear Dan Murphy,

Add a __weak function that can be overridden to reset devices attached to an ehci devices after the FEAT_POWER has been submitted

Signed-off-by: Dan Murphy dmurphy@ti.com

v3 - Modified location of the weak function - http://patchwork.ozlabs.org/patch/258229/

common/usb_hub.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)

diff --git a/common/usb_hub.c b/common/usb_hub.c index 774ba63..c655b75 100644 --- a/common/usb_hub.c +++ b/common/usb_hub.c @@ -62,6 +62,10 @@ static struct usb_hub_device hub_dev[USB_MAX_HUB]; static int usb_hub_index;

+__weak void usb_hub_reset_devices(int port) +{

• return;

+}

static int usb_get_hub_descriptor(struct usb_device *dev, void *data, int size) { @@ -444,6 +448,14 @@ static int usb_hub_configure(struct usb_device *dev) "" : "no "); usb_hub_power_on(hub);

• /*

• * Reset any devices that may be in a bad state when applying
  

• * the power.  This is a __weak function.  Resettig of the devices
  

• * should occur in the board file of the device.
  

• */
  

• for (i = 0; i < dev->maxchild; i++)

• usb_hub_reset_devices(i + 1);
  

• for (i = 0; i < dev->maxchild; i++) { ALLOC_CACHE_ALIGN_BUFFER(struct usb_port_status, portsts, 1); unsigned short portstatus, portchange;

We hae like 10 reset hooks in the usb code, this means something just isn't right. The device doesn't enumerate, right ? Have you tried waiting a little after releasing the reset and before starting the EHCI ?

Best regards, Marek Vasut

Dear Dan Murphy,

Marek

On 07/17/2013 11:30 PM, Marek Vasut wrote:

...

Dear Dan Murphy,

...

Add a __weak function that can be overridden to reset devices attached to an ehci devices after the FEAT_POWER has been submitted

Signed-off-by: Dan Murphy dmurphy@ti.com

v3 - Modified location of the weak function - http://patchwork.ozlabs.org/patch/258229/

common/usb_hub.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)

diff --git a/common/usb_hub.c b/common/usb_hub.c index 774ba63..c655b75 100644 --- a/common/usb_hub.c +++ b/common/usb_hub.c @@ -62,6 +62,10 @@

static struct usb_hub_device hub_dev[USB_MAX_HUB]; static int usb_hub_index;

+__weak void usb_hub_reset_devices(int port) +{

• return;

+}

static int usb_get_hub_descriptor(struct usb_device *dev, void *data, int

size) { @@ -444,6 +448,14 @@ static int usb_hub_configure(struct usb_device *dev)

     "" : "no ");

usb_hub_power_on(hub);

• /*

• * Reset any devices that may be in a bad state when applying
  

• * the power.  This is a __weak function.  Resettig of the devices
  

• * should occur in the board file of the device.
  

• */
  

• for (i = 0; i < dev->maxchild; i++)

• usb_hub_reset_devices(i + 1);
  

• for (i = 0; i < dev->maxchild; i++) {

  ALLOC_CACHE_ALIGN_BUFFER(struct usb_port_status, portsts, 1); unsigned short portstatus, portchange;

We hae like 10 reset hooks in the usb code, this means something just isn't right. The device doesn't enumerate, right ? Have you tried waiting a little after releasing the reset and before starting the EHCI ?

Best regards, Marek Vasut

Sorry for the delay in the response I have been looking heavily into this.

I see we have many reset hooks but they all seem to mean something for different components.

The one I am introducing is for the device itself and made it weak as there are devices that work properly like the 3503.

What I am finding is that I have to apply port power and then hit the device's reset line to get the device to enumerate. Or I can hold the 9730 device in reset throughout the full USB init sequence and upon releasing it after port power the device is detected.

There is no opportunity to release the reset while the USB detection state machine is running

I have contacted the vendor to see if there are any known anomalies with this part if there is then I can document this in the commit.

Sigh, ok, that's unfortunate. I keep wondering how come it works in Linux. But anyway, if the manufacturer won't come up with anything, we will apply this stuff.

Best regards, Marek Vasut

Marek

On 07/17/2013 11:30 PM, Marek Vasut wrote:

Dear Dan Murphy,

...

Add the call back to reset the LAN9730 after the FEAT_POWER has been called.

Signed-off-by: Dan Murphy dmurphy@ti.com

v3 - Added this patch to separate the patch series - http://patchwork.ozlabs.org/patch/258229/

board/ti/omap5_uevm/evm.c | 11 +++++++++++ 1 file changed, 11 insertions(+)

diff --git a/board/ti/omap5_uevm/evm.c b/board/ti/omap5_uevm/evm.c index 9add0fd..42253fd 100644 --- a/board/ti/omap5_uevm/evm.c +++ b/board/ti/omap5_uevm/evm.c @@ -31,6 +31,7 @@

#ifdef CONFIG_USB_EHCI #include <usb.h> +#include <asm/gpio.h> #include <asm/arch/ehci.h> #include <asm/ehci-omap.h>

@@ -169,4 +170,14 @@ int ehci_hcd_stop(void) ret = omap_ehci_hcd_stop(); return ret; }

+void usb_hub_reset_devices(int port) +{

• /* The LAN9730 needs to be reset after the port power has been set. */
• if (port == 3) {

• gpio_direction_output(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO, 0);
  

• udelay(10);
  

• gpio_direction_output(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO, 1);
  

• }

+}

Do you really need a config option for a board-specific GPIO used in a board file?

Sorry I missed addressing this comment.

I am not adding a config option but I am re-using the CONFIG option that already exists. I did not want to define the GPIO number twice.

This CONFIG option is also used in the ehci-omap.c file.

Dan

...

#endif

Best regards, Marek Vasut