Hi Rick,

-----Original Message----- From: Rick Chen rickchen36@gmail.com Sent: Thursday, July 23, 2020 7:56 AM To: Sagar Kadam sagar.kadam@sifive.com Cc: U-Boot Mailing List u-boot@lists.denx.de; Paul Walmsley ( Sifive) paul.walmsley@sifive.com; Palmer Dabbelt palmer@dabbelt.com; Anup Patel anup.patel@wdc.com; Atish Patra atish.patra@wdc.com; Lukasz Majewski lukma@denx.de; Pragnesh Patel pragnesh.patel@sifive.com; Bin Meng bmeng.cn@gmail.com; Jagan Teki jagan@amarulasolutions.com; Simon Glass sjg@chromium.org; Trevor Woerner twoerner@gmail.com; rick rick@andestech.com; Alan Kao alankao@andestech.com Subject: Re: [PATCH v3 5/5] configs: reset: fu540: enable dm reset framework for SiFive SoC

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Hi Sagar

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From: Sagar Shrikant Kadam [mailto:sagar.kadam@sifive.com] Sent: Friday, July 10, 2020 4:38 PM To: u-boot@lists.denx.de Cc: Rick Jian-Zhi Chen(陳建志); paul.walmsley@sifive.com; palmer@dabbelt.com; anup.patel@wdc.com; atish.patra@wdc.com; lukma@denx.de; pragnesh.patel@sifive.com; bin.meng@windriver.com; jagan@amarulasolutions.com; sjg@chromium.org; twoerner@gmail.com; abrodkin@synopsys.com; Eugeniy.Paltsev@synopsys.com; patrick@blueri.se; weijie.gao@mediatek.com; festevam@gmail.com; Sagar Shrikant Kadam Subject: [PATCH v3 5/5] configs: reset: fu540: enable dm reset framework for SiFive SoC

Add necessary defconfig and Kconfig entries to enable SiFive SoC's reset

driver so as to utilise U-Boot's reset framework.

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Signed-off-by: Sagar Shrikant Kadam sagar.kadam@sifive.com Reviewed-by: Pragnesh Patel Pragnesh.patel@sifive.com Reviewed-by: Bin Meng bin.meng@windriver.com Tested-by: Bin Meng bin.meng@windriver.com

---

configs/sifive_fu540_defconfig | 2 ++ drivers/reset/Kconfig | 9 +++++++++ drivers/reset/Makefile | 1 + 3 files changed, 12 insertions(+)

diff --git a/configs/sifive_fu540_defconfig b/configs/sifive_fu540_defconfig index 32347c2..12f2469 100644 --- a/configs/sifive_fu540_defconfig +++ b/configs/sifive_fu540_defconfig @@ -20,3 +20,5 @@ CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-

a00"

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CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_CLK=y CONFIG_DM_MTD=y +CONFIG_SPL_DM_RESET=y +CONFIG_DM_RESET=y diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 88d3be1..627f8e8 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -148,4 +148,13 @@ config RESET_IMX7 help Support for reset controller on i.MX7/8 SoCs.

+config RESET_SIFIVE

•   bool "Reset Driver for SiFive SoC's"
  

•   depends on DM_RESET && CLK_SIFIVE_FU540_PRCI &&
  

TARGET_SIFIVE_FU540

...

•   default y
  

•   help
  

•     PRCI module within SiFive SoC's provides mechanism to reset
  

•     different hw blocks like DDR, gemgxl. With this driver we leverage
  

•     U-Boot's reset framework to reset these hardware blocks.
  

endmenu diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 0a044d5..e3c27c4 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -23,3 +23,4 @@ obj-$(CONFIG_RESET_MTMIPS) += reset-mtmips.o obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o obj-$(CONFIG_RESET_HISILICON) += reset-hisilicon.o obj-$(CONFIG_RESET_IMX7) += reset-imx7.o +obj-$(CONFIG_RESET_SIFIVE) += reset-sifive.o

This patch conflicts with u-boot/master, please rebase.

Ok, I will rebase the series on u-boot/master and send it.

Thanks & BR, Sagar

Applying: dt-bindings: prci: add indexes for reset signals available in prci Applying: fu540: prci: use common reset indexes defined in binding header Applying: fu540: dtsi: add reset producer and consumer entries Applying: sifive: reset: add DM based reset driver for SiFive SoC's Applying: configs: reset: fu540: enable dm reset framework for SiFive SoC error: patch failed: drivers/reset/Kconfig:148 error: drivers/reset/Kconfig: patch does not apply error: patch failed: drivers/reset/Makefile:23 error: drivers/reset/Makefile: patch does not apply Patch failed at 0005 configs: reset: fu540: enable dm reset framework for SiFive SoC

Thanks, Rick