[PATCH u-boot-marvell 1/3] arm64: a37xx: pinctrl: Fix definitions for MPP pins 20-22

All 3 MPP pins (20, 21 and 22) can be configured individually and also can be configured to GPIO functions. Fix definitions for these MPP pins in existing pin groups. After this change GPIO function can be enabled just for one of these 3 pins.
Signed-off-by: Pali Rohár pali@kernel.org --- drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c index bb7a76baed1f..a5407a16ee36 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -200,9 +200,11 @@ static struct armada_37xx_pin_group armada_37xx_sb_groups[] = { PIN_GRP_GPIO("pcie1", 3, 1, BIT(5), "pcie"), /* this actually controls "pcie1_reset" */ PIN_GRP_GPIO("pcie1_clkreq", 4, 1, BIT(9), "pcie"), PIN_GRP_GPIO("pcie1_wakeup", 5, 1, BIT(10), "pcie"), - PIN_GRP_GPIO("ptp", 20, 3, BIT(11) | BIT(12) | BIT(13), "ptp"), - PIN_GRP("ptp_clk", 21, 1, BIT(6), "ptp", "mii"), - PIN_GRP("ptp_trig", 22, 1, BIT(7), "ptp", "mii"), + PIN_GRP_GPIO("ptp", 20, 1, BIT(11), "ptp"), + PIN_GRP_GPIO_3("ptp_clk", 21, 1, BIT(6) | BIT(12), 0, BIT(6), BIT(12), + "ptp", "mii"), + PIN_GRP_GPIO_3("ptp_trig", 22, 1, BIT(7) | BIT(13), 0, BIT(7), BIT(13), + "ptp", "mii"), PIN_GRP_GPIO_3("mii_col", 23, 1, BIT(8) | BIT(14), 0, BIT(8), BIT(14), "mii", "mii_err"), };

Macro PIN_GRP() is not used, remove it.
Signed-off-by: Pali Rohár pali@kernel.org --- drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 10 ---------- 1 file changed, 10 deletions(-)
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c index a5407a16ee36..32b49f167c66 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -99,16 +99,6 @@ struct armada_37xx_pinctrl { unsigned int nfuncs; };
-#define PIN_GRP(_name, _start, _nr, _mask, _func1, _func2) \ - { \ - .name = _name, \ - .start_pin = _start, \ - .npins = _nr, \ - .reg_mask = _mask, \ - .val = {0, _mask}, \ - .funcs = {_func1, _func2} \ - } - #define PIN_GRP_GPIO_0(_name, _start, _nr) \ { \ .name = _name, \

On 04.08.22 12:41, Pali Rohár wrote:
Macro PIN_GRP() is not used, remove it.
Signed-off-by: Pali Rohár pali@kernel.org
Reviewed-by: Stefan Roese sr@denx.de
Thanks, Stefan
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 10 ---------- 1 file changed, 10 deletions(-)
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c index a5407a16ee36..32b49f167c66 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -99,16 +99,6 @@ struct armada_37xx_pinctrl { unsigned int nfuncs; };
-#define PIN_GRP(_name, _start, _nr, _mask, _func1, _func2) \
- { \
.name = _name, \
.start_pin = _start, \
.npins = _nr, \
.reg_mask = _mask, \
.val = {0, _mask}, \
.funcs = {_func1, _func2} \
- }
- #define PIN_GRP_GPIO_0(_name, _start, _nr) \ { \ .name = _name, \
Viele Grüße, Stefan Roese

On 04.08.22 12:41, Pali Rohár wrote:
Macro PIN_GRP() is not used, remove it.
Signed-off-by: Pali Rohár pali@kernel.org
Applied to u-boot-marvell/master
Thanks, Stefan
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 10 ---------- 1 file changed, 10 deletions(-)
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c index a5407a16ee36..32b49f167c66 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -99,16 +99,6 @@ struct armada_37xx_pinctrl { unsigned int nfuncs; };
-#define PIN_GRP(_name, _start, _nr, _mask, _func1, _func2) \
- { \
.name = _name, \
.start_pin = _start, \
.npins = _nr, \
.reg_mask = _mask, \
.val = {0, _mask}, \
.funcs = {_func1, _func2} \
- }
- #define PIN_GRP_GPIO_0(_name, _start, _nr) \ { \ .name = _name, \
Viele Grüße, Stefan Roese

In more cases group name consist of function name followed by function number. So if function name is just prefix of group name, show group name.
So in 'pinmux status -a' command output would be visible also extended function number, which is useful for debugging.
Signed-off-by: Pali Rohár pali@kernel.org --- drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c index 32b49f167c66..25fbe39abd19 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -406,7 +406,17 @@ static int armada_37xx_pmx_get_pin_muxing(struct udevice *dev, unsigned int sele
for (f = 0; f < NB_FUNCS && grp->funcs[f]; f++) { if (grp->val[f] == val) { - strlcpy(buf, grp->funcs[f], size); + /* + * In more cases group name consist of + * function name followed by function + * number. So if function name is just + * prefix of group name, show group name. + */ + if (strncmp(grp->name, grp->funcs[f], + strlen(grp->funcs[f])) == 0) + strlcpy(buf, grp->name, size); + else + strlcpy(buf, grp->funcs[f], size); return 0; } }

On 04.08.22 12:41, Pali Rohár wrote:
In more cases group name consist of function name followed by function number. So if function name is just prefix of group name, show group name.
So in 'pinmux status -a' command output would be visible also extended function number, which is useful for debugging.
Signed-off-by: Pali Rohár pali@kernel.org
Reviewed-by: Stefan Roese sr@denx.de
Thanks, Stefan
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c index 32b49f167c66..25fbe39abd19 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -406,7 +406,17 @@ static int armada_37xx_pmx_get_pin_muxing(struct udevice *dev, unsigned int sele
for (f = 0; f < NB_FUNCS && grp->funcs[f]; f++) { if (grp->val[f] == val) {
strlcpy(buf, grp->funcs[f], size);
/*
* In more cases group name consist of
* function name followed by function
* number. So if function name is just
* prefix of group name, show group name.
*/
if (strncmp(grp->name, grp->funcs[f],
strlen(grp->funcs[f])) == 0)
strlcpy(buf, grp->name, size);
else
strlcpy(buf, grp->funcs[f], size); return 0; } }
Viele Grüße, Stefan Roese

On 04.08.22 12:41, Pali Rohár wrote:
In more cases group name consist of function name followed by function number. So if function name is just prefix of group name, show group name.
So in 'pinmux status -a' command output would be visible also extended function number, which is useful for debugging.
Signed-off-by: Pali Rohár pali@kernel.org
Applied to u-boot-marvell/master
Thanks, Stefan
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c index 32b49f167c66..25fbe39abd19 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -406,7 +406,17 @@ static int armada_37xx_pmx_get_pin_muxing(struct udevice *dev, unsigned int sele
for (f = 0; f < NB_FUNCS && grp->funcs[f]; f++) { if (grp->val[f] == val) {
strlcpy(buf, grp->funcs[f], size);
/*
* In more cases group name consist of
* function name followed by function
* number. So if function name is just
* prefix of group name, show group name.
*/
if (strncmp(grp->name, grp->funcs[f],
strlen(grp->funcs[f])) == 0)
strlcpy(buf, grp->name, size);
else
strlcpy(buf, grp->funcs[f], size); return 0; } }
Viele Grüße, Stefan Roese

On 04.08.22 12:41, Pali Rohár wrote:
All 3 MPP pins (20, 21 and 22) can be configured individually and also can be configured to GPIO functions. Fix definitions for these MPP pins in existing pin groups. After this change GPIO function can be enabled just for one of these 3 pins.
Signed-off-by: Pali Rohár pali@kernel.org
Reviewed-by: Stefan Roese sr@denx.de
Thanks, Stefan
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c index bb7a76baed1f..a5407a16ee36 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -200,9 +200,11 @@ static struct armada_37xx_pin_group armada_37xx_sb_groups[] = { PIN_GRP_GPIO("pcie1", 3, 1, BIT(5), "pcie"), /* this actually controls "pcie1_reset" */ PIN_GRP_GPIO("pcie1_clkreq", 4, 1, BIT(9), "pcie"), PIN_GRP_GPIO("pcie1_wakeup", 5, 1, BIT(10), "pcie"),
- PIN_GRP_GPIO("ptp", 20, 3, BIT(11) | BIT(12) | BIT(13), "ptp"),
- PIN_GRP("ptp_clk", 21, 1, BIT(6), "ptp", "mii"),
- PIN_GRP("ptp_trig", 22, 1, BIT(7), "ptp", "mii"),
- PIN_GRP_GPIO("ptp", 20, 1, BIT(11), "ptp"),
- PIN_GRP_GPIO_3("ptp_clk", 21, 1, BIT(6) | BIT(12), 0, BIT(6), BIT(12),
"ptp", "mii"),
- PIN_GRP_GPIO_3("ptp_trig", 22, 1, BIT(7) | BIT(13), 0, BIT(7), BIT(13),
PIN_GRP_GPIO_3("mii_col", 23, 1, BIT(8) | BIT(14), 0, BIT(8), BIT(14), "mii", "mii_err"), };"ptp", "mii"),
Viele Grüße, Stefan Roese

On 04.08.22 12:41, Pali Rohár wrote:
All 3 MPP pins (20, 21 and 22) can be configured individually and also can be configured to GPIO functions. Fix definitions for these MPP pins in existing pin groups. After this change GPIO function can be enabled just for one of these 3 pins.
Signed-off-by: Pali Rohár pali@kernel.org
Applied to u-boot-marvell/master
Thanks, Stefan
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c index bb7a76baed1f..a5407a16ee36 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -200,9 +200,11 @@ static struct armada_37xx_pin_group armada_37xx_sb_groups[] = { PIN_GRP_GPIO("pcie1", 3, 1, BIT(5), "pcie"), /* this actually controls "pcie1_reset" */ PIN_GRP_GPIO("pcie1_clkreq", 4, 1, BIT(9), "pcie"), PIN_GRP_GPIO("pcie1_wakeup", 5, 1, BIT(10), "pcie"),
- PIN_GRP_GPIO("ptp", 20, 3, BIT(11) | BIT(12) | BIT(13), "ptp"),
- PIN_GRP("ptp_clk", 21, 1, BIT(6), "ptp", "mii"),
- PIN_GRP("ptp_trig", 22, 1, BIT(7), "ptp", "mii"),
- PIN_GRP_GPIO("ptp", 20, 1, BIT(11), "ptp"),
- PIN_GRP_GPIO_3("ptp_clk", 21, 1, BIT(6) | BIT(12), 0, BIT(6), BIT(12),
"ptp", "mii"),
- PIN_GRP_GPIO_3("ptp_trig", 22, 1, BIT(7) | BIT(13), 0, BIT(7), BIT(13),
PIN_GRP_GPIO_3("mii_col", 23, 1, BIT(8) | BIT(14), 0, BIT(8), BIT(14), "mii", "mii_err"), };"ptp", "mii"),
Viele Grüße, Stefan Roese
participants (2)
-
Pali Rohár
-
Stefan Roese