[PATCH 1/1] riscv: qemu: provide more SPL boot methods
QEMU can supply block devices or semihosting to U-Boot SPL. Allow booting from these.
Signed-off-by: Heinrich Schuchardt heinrich.schuchardt@canonical.com --- board/emulation/qemu-riscv/qemu-riscv.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-)
diff --git a/board/emulation/qemu-riscv/qemu-riscv.c b/board/emulation/qemu-riscv/qemu-riscv.c index ae3b7a3295..b2fe3e9f0c 100644 --- a/board/emulation/qemu-riscv/qemu-riscv.c +++ b/board/emulation/qemu-riscv/qemu-riscv.c @@ -69,10 +69,21 @@ int board_late_init(void) }
#ifdef CONFIG_SPL -u32 spl_boot_device(void) +void board_boot_order(u32 *spl_boot_list) { - /* RISC-V QEMU only supports RAM as SPL boot device */ - return BOOT_DEVICE_RAM; + int index = 0; + + if (IS_ENABLED(CONFIG_SPL_NVME)) + spl_boot_list[index++] = BOOT_DEVICE_NVME; + if (IS_ENABLED(CONFIG_SPL_SATA)) + spl_boot_list[index++] = BOOT_DEVICE_SATA; + if (IS_ENABLED(CONFIG_SPL_USB_STORAGE)) + spl_boot_list[index++] = BOOT_DEVICE_USB; + if (IS_ENABLED(CONFIG_SPL_SEMIHOSTING)) + spl_boot_list[index++] = BOOT_DEVICE_SMH; + /* RAM last as CONFIG_SPL_RAW_IMAGE_SUPPORT=y may lead to crash */ + if (IS_ENABLED(CONFIG_SPL_RAM_SUPPORT)) + spl_boot_list[index++] = BOOT_DEVICE_RAM; } #endif
Hi Heinrich,
On Sat, Jul 22, 2023 at 7:10 PM Heinrich Schuchardt heinrich.schuchardt@canonical.com wrote:
QEMU can supply block devices or semihosting to U-Boot SPL. Allow booting from these.
Signed-off-by: Heinrich Schuchardt heinrich.schuchardt@canonical.com
board/emulation/qemu-riscv/qemu-riscv.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-)
diff --git a/board/emulation/qemu-riscv/qemu-riscv.c b/board/emulation/qemu-riscv/qemu-riscv.c index ae3b7a3295..b2fe3e9f0c 100644 --- a/board/emulation/qemu-riscv/qemu-riscv.c +++ b/board/emulation/qemu-riscv/qemu-riscv.c @@ -69,10 +69,21 @@ int board_late_init(void) }
#ifdef CONFIG_SPL -u32 spl_boot_device(void) +void board_boot_order(u32 *spl_boot_list) {
/* RISC-V QEMU only supports RAM as SPL boot device */return BOOT_DEVICE_RAM;
int index = 0;if (IS_ENABLED(CONFIG_SPL_NVME))spl_boot_list[index++] = BOOT_DEVICE_NVME;if (IS_ENABLED(CONFIG_SPL_SATA))spl_boot_list[index++] = BOOT_DEVICE_SATA;if (IS_ENABLED(CONFIG_SPL_USB_STORAGE))spl_boot_list[index++] = BOOT_DEVICE_USB;if (IS_ENABLED(CONFIG_SPL_SEMIHOSTING))spl_boot_list[index++] = BOOT_DEVICE_SMH;/* RAM last as CONFIG_SPL_RAW_IMAGE_SUPPORT=y may lead to crash */if (IS_ENABLED(CONFIG_SPL_RAM_SUPPORT))spl_boot_list[index++] = BOOT_DEVICE_RAM;} #endif
Please include instructions on how to boot U-Boot proper from these additional devices in qemu-riscv.rst
Regards, Bin
On 7/22/23 16:22, Bin Meng wrote:
Hi Heinrich,
On Sat, Jul 22, 2023 at 7:10 PM Heinrich Schuchardt heinrich.schuchardt@canonical.com wrote:
QEMU can supply block devices or semihosting to U-Boot SPL. Allow booting from these.
Signed-off-by: Heinrich Schuchardt heinrich.schuchardt@canonical.com
board/emulation/qemu-riscv/qemu-riscv.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-)
diff --git a/board/emulation/qemu-riscv/qemu-riscv.c b/board/emulation/qemu-riscv/qemu-riscv.c index ae3b7a3295..b2fe3e9f0c 100644 --- a/board/emulation/qemu-riscv/qemu-riscv.c +++ b/board/emulation/qemu-riscv/qemu-riscv.c @@ -69,10 +69,21 @@ int board_late_init(void) }
#ifdef CONFIG_SPL -u32 spl_boot_device(void) +void board_boot_order(u32 *spl_boot_list) {
/* RISC-V QEMU only supports RAM as SPL boot device */return BOOT_DEVICE_RAM;
int index = 0;if (IS_ENABLED(CONFIG_SPL_NVME))spl_boot_list[index++] = BOOT_DEVICE_NVME;if (IS_ENABLED(CONFIG_SPL_SATA))spl_boot_list[index++] = BOOT_DEVICE_SATA;if (IS_ENABLED(CONFIG_SPL_USB_STORAGE))spl_boot_list[index++] = BOOT_DEVICE_USB;if (IS_ENABLED(CONFIG_SPL_SEMIHOSTING))spl_boot_list[index++] = BOOT_DEVICE_SMH;/* RAM last as CONFIG_SPL_RAW_IMAGE_SUPPORT=y may lead to crash */if (IS_ENABLED(CONFIG_SPL_RAM_SUPPORT))spl_boot_list[index++] = BOOT_DEVICE_RAM;Please include instructions on how to boot U-Boot proper from these additional devices in qemu-riscv.rst
A general description of SPL boot methods seems to be lacking. This should include relevant configuration settings. But as this is not QEMU or RISC-V specific this information should live in a different place (doc/usage/).
There are a few fixes that should be accepted before writing the documentation:
Partition code has a bug:
part: check CONFIG_IS_ENABLED(ENV_SUPPORT) https://lore.kernel.org/u-boot/20230721233418.GG3630934@bill-the-cat/T/#t
For Semihosting FIT support is missing:
[PATCH 1/1] spl: add FIT support to semihosting boot method https://lore.kernel.org/u-boot/20230722192748.52856-1-heinrich.schuchardt@ca...
NVMe uses the wrong configuration variable:
[PATCH 1/1] spl: blk: use CONFIG_SPL_FS_LOAD_PAYLOAD_NAME https://lore.kernel.org/u-boot/20230721120943.23931-1-heinrich.schuchardt@ca...
NVMe uses incorrect partition numbers:
[PATCH 1/1] spl: blk: partition numbers are hexadecimal https://lore.kernel.org/u-boot/20230722104544.52217-1-heinrich.schuchardt@ca...
SATA must call pci_init():
[PATCH 1/1] spl: initialize PCI before booting from SATA https://lore.kernel.org/u-boot/20230722215702.125114-1-heinrich.schuchardt@c...
With the fixes I am able to boot u-boot.itb with any of the boot methods in this patch.
Best regards
Heinrich
participants (2)
-
Bin Meng -
Heinrich Schuchardt