[U-Boot] [RFC][PATCH] ARM: mxs: Added application UART driver

The driver is ported from a driver that was implemented using u-boot 2009.
The driver makes it possible to use a regular application UART as the U-Boot output console for MXS CPUs.
Signed-off-by: Andreas Wass andreas.wass@dalelven.com Cc: Fabio Estevam fabio.estevam@freescale.com Cc: Marek Vasut marex@denx.de --- arch/arm/include/asm/arch-mxs/regs-uartapp.h | 321 +++++++++++++++++++++++++++ drivers/serial/Makefile | 1 + drivers/serial/mxs_auart.c | 118 ++++++++++ drivers/serial/serial.c | 3 +- 4 files changed, 442 insertions(+), 1 deletion(-) create mode 100644 arch/arm/include/asm/arch-mxs/regs-uartapp.h create mode 100644 drivers/serial/mxs_auart.c
diff --git a/arch/arm/include/asm/arch-mxs/regs-uartapp.h b/arch/arm/include/asm/arch-mxs/regs-uartapp.h new file mode 100644 index 0000000..5e871b6 --- /dev/null +++ b/arch/arm/include/asm/arch-mxs/regs-uartapp.h @@ -0,0 +1,321 @@ +/* + * Freescale MXS UARTAPP Register Definitions + * + * Copyright (C) 2013 Andreas Wass andreas.wass@dalelven.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __ARCH_ARM___MXS_UARTAPP_H +#define __ARCH_ARM___MXS_UARTAPP_H + +#include <asm/imx-common/regs-common.h> + +#ifndef __ASSEMBLY__ +struct mxs_uartapp_regs { + mxs_reg_32(hw_uartapp_ctrl0) + mxs_reg_32(hw_uartapp_ctrl1) + mxs_reg_32(hw_uartapp_ctrl2) + mxs_reg_32(hw_uartapp_linectrl) + mxs_reg_32(hw_uartapp_linectrl2) + mxs_reg_32(hw_uartapp_intr) + mxs_reg_32(hw_uartapp_data) + mxs_reg_32(hw_uartapp_stat) + mxs_reg_32(hw_uartapp_debug) + mxs_reg_32(hw_uartapp_version) + mxs_reg_32(hw_uartapp_autobaud) +}; +#endif + + +#define BM_UARTAPP_CTRL0_SFTRST (1 << 31) +#define BM_UARTAPP_CTRL0_CLKGATE (1 << 30) +#define BM_UARTAPP_CTRL0_RUN (1 << 29) +#define BM_UARTAPP_CTRL0_RX_SOURCE (1 << 28) +#define BM_UARTAPP_CTRL0_RXTO_ENABLE (1 << 27) +#define BP_UARTAPP_CTRL0_RXTIMEOUT (1 << 4) +#define BM_UARTAPP_CTRL0_RXTIMEOUT 0x07FF0000 +#define BF_UARTAPP_CTRL0_RXTIMEOUT(v) \ + (((v) << 16) & BM_UARTAPP_CTRL0_RXTIMEOUT) +#define BP_UARTAPP_CTRL0_XFER_COUNT 0 +#define BM_UARTAPP_CTRL0_XFER_COUNT 0x0000FFFF +#define BF_UARTAPP_CTRL0_XFER_COUNT(v) \ + (((v) << BP_UARTAPP_CTRL0_XFER_COUNT) & \ + BM_UARTAPP_CTRL0_XFER_COUNT) + +#define BP_UARTAPP_CTRL1_RSVD2 29 +#define BM_UARTAPP_CTRL1_RSVD2 0xE0000000 +#define BF_UARTAPP_CTRL1_RSVD2(v) \ + (((v) << BP_UARTAPP_CTRL1_RSVD2) & \ + BM_UARTAPP_CTRL1_RSVD2) + +#define BM_UARTAPP_CTRL1_RUN (1 << 28) +#define BP_UARTAPP_CTRL1_RSVD1 16 +#define BM_UARTAPP_CTRL1_RSVD1 0x0FFF0000 +#define BF_UARTAPP_CTRL1_RSVD1(v) \ + (((v) << BP_UARTAPP_CTRL1_RSVD1) & \ + BM_UARTAPP_CTRL1_RSVD1) + +#define BP_UARTAPP_CTRL1_XFER_COUNT 0 +#define BM_UARTAPP_CTRL1_XFER_COUNT 0x0000FFFF +#define BF_UARTAPP_CTRL1_XFER_COUNT(v) \ + (((v) << BP_UARTAPP_CTRL1_XFER_COUNT) & \ + BM_UARTAPP_CTRL1_XFER_COUNT) + +#define BM_UARTAPP_CTRL2_INVERT_RTS (1 << 31) +#define BM_UARTAPP_CTRL2_INVERT_CTS (1 << 30) +#define BM_UARTAPP_CTRL2_INVERT_TX (1 << 29) +#define BM_UARTAPP_CTRL2_INVERT_RX (1 << 28) +#define BM_UARTAPP_CTRL2_RTS_SEMAPHORE (1 << 27) +#define BM_UARTAPP_CTRL2_DMAONERR (1 << 26) +#define BM_UARTAPP_CTRL2_TXDMAE (1 << 25) +#define BM_UARTAPP_CTRL2_RXDMAE (1 << 24) +#define BM_UARTAPP_CTRL2_RSVD2 (1 << 23) +#define BP_UARTAPP_CTRL2_RXIFLSEL 20 +#define BM_UARTAPP_CTRL2_RXIFLSEL 0x00700000 +#define BF_UARTAPP_CTRL2_RXIFLSEL(v) \ + (((v) << BP_UARTAPP_CTRL2_RXIFLSEL) & \ + BM_UARTAPP_CTRL2_RXIFLSEL) + +#define BV_UARTAPP_CTRL2_RXIFLSEL__NOT_EMPTY 0x0 +#define BV_UARTAPP_CTRL2_RXIFLSEL__ONE_QUARTER 0x1 +#define BV_UARTAPP_CTRL2_RXIFLSEL__ONE_HALF 0x2 +#define BV_UARTAPP_CTRL2_RXIFLSEL__THREE_QUARTERS 0x3 +#define BV_UARTAPP_CTRL2_RXIFLSEL__SEVEN_EIGHTHS 0x4 +#define BV_UARTAPP_CTRL2_RXIFLSEL__INVALID5 0x5 +#define BV_UARTAPP_CTRL2_RXIFLSEL__INVALID6 0x6 +#define BV_UARTAPP_CTRL2_RXIFLSEL__INVALID7 0x7 +#define BM_UARTAPP_CTRL2_RSVD3 (1 << 19) +#define BP_UARTAPP_CTRL2_TXIFLSEL 16 +#define BM_UARTAPP_CTRL2_TXIFLSEL 0x00070000 +#define BF_UARTAPP_CTRL2_TXIFLSEL(v) \ + (((v) << BP_UARTAPP_CTRL2_TXIFLSEL) & \ + BM_UARTAPP_CTRL2_TXIFLSEL) +#define BV_UARTAPP_CTRL2_TXIFLSEL__EMPTY 0x0 +#define BV_UARTAPP_CTRL2_TXIFLSEL__ONE_QUARTER 0x1 +#define BV_UARTAPP_CTRL2_TXIFLSEL__ONE_HALF 0x2 +#define BV_UARTAPP_CTRL2_TXIFLSEL__THREE_QUARTERS 0x3 +#define BV_UARTAPP_CTRL2_TXIFLSEL__SEVEN_EIGHTHS 0x4 +#define BV_UARTAPP_CTRL2_TXIFLSEL__INVALID5 0x5 +#define BV_UARTAPP_CTRL2_TXIFLSEL__INVALID6 0x6 +#define BV_UARTAPP_CTRL2_TXIFLSEL__INVALID7 0x7 +#define BM_UARTAPP_CTRL2_CTSEN (1 << 15) +#define BM_UARTAPP_CTRL2_RTSEN (1 << 14) +#define BM_UARTAPP_CTRL2_OUT2 (1 << 13) +#define BM_UARTAPP_CTRL2_OUT1 (1 << 12) +#define BM_UARTAPP_CTRL2_RTS (1 << 11) +#define BM_UARTAPP_CTRL2_DTR (1 << 10) +#define BM_UARTAPP_CTRL2_RXE (1 << 9) +#define BM_UARTAPP_CTRL2_TXE (1 << 8) +#define BM_UARTAPP_CTRL2_LBE (1 << 7) +#define BM_UARTAPP_CTRL2_USE_LCR2 (1 << 6) +#define BP_UARTAPP_CTRL2_RSVD4 3 +#define BM_UARTAPP_CTRL2_RSVD4 0x00000038 +#define BF_UARTAPP_CTRL2_RSVD4(v) \ + (((v) << BP_UARTAPP_CTRL2_RSVD4) & \ + BM_UARTAPP_CTRL2_RSVD4) + +#define BM_UARTAPP_CTRL2_SIRLP (1 << 2) +#define BM_UARTAPP_CTRL2_SIREN (1 << 1) +#define BM_UARTAPP_CTRL2_UARTEN (1 << 0) + +#define BP_UARTAPP_LINECTRL_BAUD_DIVINT 16 +#define BM_UARTAPP_LINECTRL_BAUD_DIVINT 0xFFFF0000 +#define BF_UARTAPP_LINECTRL_BAUD_DIVINT(v) \ + (((v) << BP_UARTAPP_LINECTRL_BAUD_DIVINT) & \ + BM_UARTAPP_LINECTRL_BAUD_DIVINT) + +#define BP_UARTAPP_LINECTRL_RSVD 14 +#define BM_UARTAPP_LINECTRL_RSVD 0x0000C000 +#define BF_UARTAPP_LINECTRL_RSVD(v) \ + (((v) << BP_UARTAPP_LINECTRL_RSVD) & \ + BM_UARTAPP_LINECTRL_RSVD) + +#define BP_UARTAPP_LINECTRL_BAUD_DIVFRAC 8 +#define BM_UARTAPP_LINECTRL_BAUD_DIVFRAC 0x00003F00 +#define BF_UARTAPP_LINECTRL_BAUD_DIVFRAC(v) \ + (((v) << BP_UARTAPP_LINECTRL_BAUD_DIVFRAC) & \ + BM_UARTAPP_LINECTRL_BAUD_DIVFRAC) + +#define BM_UARTAPP_LINECTRL_SPS (1 << 7) +#define BP_UARTAPP_LINECTRL_WLEN 5 +#define BM_UARTAPP_LINECTRL_WLEN 0x00000060 +#define BF_UARTAPP_LINECTRL_WLEN(v) \ + (((v) << BP_UARTAPP_LINECTRL_WLEN) & \ + BM_UARTAPP_LINECTRL_WLEN) + +#define BM_UARTAPP_LINECTRL_FEN (1 << 4) +#define BM_UARTAPP_LINECTRL_STP2 (1 << 3) +#define BM_UARTAPP_LINECTRL_EPS (1 << 2) +#define BM_UARTAPP_LINECTRL_PEN (1 << 1) +#define BM_UARTAPP_LINECTRL_BRK (1 << 0) + +#define BP_UARTAPP_LINECTRL2_BAUD_DIVINT 16 +#define BM_UARTAPP_LINECTRL2_BAUD_DIVINT 0xFFFF0000 +#define BF_UARTAPP_LINECTRL2_BAUD_DIVINT(v) \ + (((v) << BP_UARTAPP_LINECTRL2_BAUD_DIVINT) & \ + BM_UARTAPP_LINECTRL2_BAUD_DIVINT) + +#define BP_UARTAPP_LINECTRL2_RSVD 14 +#define BM_UARTAPP_LINECTRL2_RSVD 0x0000C000 +#define BF_UARTAPP_LINECTRL2_RSVD(v) \ + (((v) << BP_UARTAPP_LINECTRL2_RSVD) & \ + BM_UARTAPP_LINECTRL2_RSVD) + +#define BP_UARTAPP_LINECTRL2_BAUD_DIVFRAC 8 +#define BM_UARTAPP_LINECTRL2_BAUD_DIVFRAC 0x00003F00 +#define BF_UARTAPP_LINECTRL2_BAUD_DIVFRAC(v) \ + (((v) << BP_UARTAPP_LINECTRL2_BAUD_DIVFRAC) & \ + BM_UARTAPP_LINECTRL2_BAUD_DIVFRAC) + +#define BM_UARTAPP_LINECTRL2_SPS (1 << 7) +#define BP_UARTAPP_LINECTRL2_WLEN 5 +#define BM_UARTAPP_LINECTRL2_WLEN 0x00000060 +#define BF_UARTAPP_LINECTRL2_WLEN(v) \ + (((v) << BP_UARTAPP_LINECTRL2_WLEN) & \ + BM_UARTAPP_LINECTRL2_WLEN) + +#define BM_UARTAPP_LINECTRL2_FEN (1 << 4) +#define BM_UARTAPP_LINECTRL2_STP2 (1 << 3) +#define BM_UARTAPP_LINECTRL2_EPS (1 << 2) +#define BM_UARTAPP_LINECTRL2_PEN (1 << 1) +#define BM_UARTAPP_LINECTRL2_RSVD1 (1 << 0) + +#define BP_UARTAPP_INTR_RSVD1 28 +#define BM_UARTAPP_INTR_RSVD1 0xF0000000 +#define BF_UARTAPP_INTR_RSVD1(v) \ + (((v) << BP_UARTAPP_INTR_RSVD1) & \ + BM_UARTAPP_INTR_RSVD1) + +#define BM_UARTAPP_INTR_ABDIEN (1 << 27) +#define BM_UARTAPP_INTR_OEIEN (1 << 26) +#define BM_UARTAPP_INTR_BEIEN (1 << 25) +#define BM_UARTAPP_INTR_PEIEN (1 << 24) +#define BM_UARTAPP_INTR_FEIEN (1 << 23) +#define BM_UARTAPP_INTR_RTIEN (1 << 22) +#define BM_UARTAPP_INTR_TXIEN (1 << 21) +#define BM_UARTAPP_INTR_RXIEN (1 << 20) +#define BM_UARTAPP_INTR_DSRMIEN (1 << 19) +#define BM_UARTAPP_INTR_DCDMIEN (1 << 18) +#define BM_UARTAPP_INTR_CTSMIEN (1 << 17) +#define BM_UARTAPP_INTR_RIMIEN (1 << 16) +#define BP_UARTAPP_INTR_RSVD2 12 +#define BM_UARTAPP_INTR_RSVD2 0x0000F000 +#define BF_UARTAPP_INTR_RSVD2(v) \ + (((v) << BP_UARTAPP_INTR_RSVD2) & \ + BM_UARTAPP_INTR_RSVD2) + +#define BM_UARTAPP_INTR_ABDIS (1 << 11) +#define BM_UARTAPP_INTR_OEIS (1 << 10) +#define BM_UARTAPP_INTR_BEIS (1 << 9) +#define BM_UARTAPP_INTR_PEIS (1 << 8) +#define BM_UARTAPP_INTR_FEIS (1 << 7) +#define BM_UARTAPP_INTR_RTIS (1 << 6) +#define BM_UARTAPP_INTR_TXIS (1 << 5) +#define BM_UARTAPP_INTR_RXIS (1 << 4) +#define BM_UARTAPP_INTR_DSRMIS (1 << 3) +#define BM_UARTAPP_INTR_DCDMIS (1 << 2) +#define BM_UARTAPP_INTR_CTSMIS (1 << 1) +#define BM_UARTAPP_INTR_RIMIS (1 << 0) + +#define BP_UARTAPP_DATA_DATA 0 +#define BM_UARTAPP_DATA_DATA 0xFFFFFFFF +#define BF_UARTAPP_DATA_DATA(v) (v) + +#define BM_UARTAPP_STAT_PRESENT (1 << 31) +#define BV_UARTAPP_STAT_PRESENT__UNAVAILABLE 0x0 +#define BV_UARTAPP_STAT_PRESENT__AVAILABLE 0x1 + +#define BM_UARTAPP_STAT_HISPEED (1 << 30) +#define BV_UARTAPP_STAT_HISPEED__UNAVAILABLE 0x0 +#define BV_UARTAPP_STAT_HISPEED__AVAILABLE 0x1 + +#define BM_UARTAPP_STAT_BUSY (1 << 29) +#define BM_UARTAPP_STAT_CTS (1 << 28) +#define BM_UARTAPP_STAT_TXFE (1 << 27) +#define BM_UARTAPP_STAT_RXFF (1 << 26) +#define BM_UARTAPP_STAT_TXFF (1 << 25) +#define BM_UARTAPP_STAT_RXFE (1 << 24) +#define BP_UARTAPP_STAT_RXBYTE_INVALID 20 +#define BM_UARTAPP_STAT_RXBYTE_INVALID 0x00F00000 +#define BF_UARTAPP_STAT_RXBYTE_INVALID(v) \ + (((v) << BP_UARTAPP_STAT_RXBYTE_INVALID) & \ + BM_UARTAPP_STAT_RXBYTE_INVALID) + +#define BM_UARTAPP_STAT_OERR (1 << 19) +#define BM_UARTAPP_STAT_BERR (1 << 18) +#define BM_UARTAPP_STAT_PERR (1 << 17) +#define BM_UARTAPP_STAT_FERR (1 << 16) +#define BP_UARTAPP_STAT_RXCOUNT 0 +#define BM_UARTAPP_STAT_RXCOUNT 0x0000FFFF +#define BF_UARTAPP_STAT_RXCOUNT(v) \ + (((v) << BP_UARTAPP_STAT_RXCOUNT) & \ + BM_UARTAPP_STAT_RXCOUNT) + +#define BP_UARTAPP_DEBUG_RXIBAUD_DIV 16 +#define BM_UARTAPP_DEBUG_RXIBAUD_DIV 0xFFFF0000 +#define BF_UARTAPP_DEBUG_RXIBAUD_DIV(v) \ + (((v) << BP_UARTAPP_DEBUG_RXIBAUD_DIV) & \ + BM_UARTAPP_DEBUG_RXIBAUD_DIV) + +#define BP_UARTAPP_DEBUG_RXFBAUD_DIV 10 +#define BM_UARTAPP_DEBUG_RXFBAUD_DIV 0x0000FC00 +#define BF_UARTAPP_DEBUG_RXFBAUD_DIV(v) \ + (((v) << BP_UARTAPP_DEBUG_RXFBAUD_DIV) & \ + BM_UARTAPP_DEBUG_RXFBAUD_DIV) + +#define BP_UARTAPP_DEBUG_RSVD1 6 +#define BM_UARTAPP_DEBUG_RSVD1 0x000003C0 +#define BF_UARTAPP_DEBUG_RSVD1(v) \ + (((v) << BP_UARTAPP_DEBUG_RSVD1) & \ + BM_UARTAPP_DEBUG_RSVD1) + +#define BM_UARTAPP_DEBUG_TXDMARUN (1 << 5) +#define BM_UARTAPP_DEBUG_RXDMARUN (1 << 4) +#define BM_UARTAPP_DEBUG_TXCMDEND (1 << 3) +#define BM_UARTAPP_DEBUG_RXCMDEND (1 << 2) +#define BM_UARTAPP_DEBUG_TXDMARQ (1 << 1) +#define BM_UARTAPP_DEBUG_RXDMARQ (1 << 0) + +#define BP_UARTAPP_VERSION_MAJOR 24 +#define BM_UARTAPP_VERSION_MAJOR 0xFF000000 +#define BF_UARTAPP_VERSION_MAJOR(v) \ + (((v) << BP_UARTAPP_VERSION_MAJOR) & \ + BM_UARTAPP_VERSION_MAJOR) + +#define BP_UARTAPP_VERSION_MINOR 16 +#define BM_UARTAPP_VERSION_MINOR 0x00FF0000 +#define BF_UARTAPP_VERSION_MINOR(v) \ + (((v) << BP_UARTAPP_VERSION_MINOR) & \ + BM_UARTAPP_VERSION_MINOR) + +#define BP_UARTAPP_VERSION_STEP 0 +#define BM_UARTAPP_VERSION_STEP 0x0000FFFF +#define BF_UARTAPP_VERSION_STEP(v) \ + (((v) << BP_UARTAPP_VERSION_STEP) & \ + BM_UARTAPP_VERSION_STEP) + +#define BP_UARTAPP_AUTOBAUD_REFCHAR1 24 +#define BM_UARTAPP_AUTOBAUD_REFCHAR1 0xFF000000 +#define BF_UARTAPP_AUTOBAUD_REFCHAR1(v) \ + (((v) << BP_UARTAPP_AUTOBAUD_REFCHAR1) & \ + BM_UARTAPP_AUTOBAUD_REFCHAR1) + +#define BP_UARTAPP_AUTOBAUD_REFCHAR0 16 +#define BM_UARTAPP_AUTOBAUD_REFCHAR0 0x00FF0000 +#define BF_UARTAPP_AUTOBAUD_REFCHAR0(v) \ + (((v) << BP_UARTAPP_AUTOBAUD_REFCHAR0) & \ + BM_UARTAPP_AUTOBAUD_REFCHAR0) + +#define BP_UARTAPP_AUTOBAUD_RSVD1 5 +#define BM_UARTAPP_AUTOBAUD_RSVD1 0x0000FFE0 +#define BF_UARTAPP_AUTOBAUD_RSVD1(v) \ + (((v) << BP_UARTAPP_AUTOBAUD_RSVD1) & \ + BM_UARTAPP_AUTOBAUD_RSVD1) + +#define BM_UARTAPP_AUTOBAUD_UPDATE_TX (1 << 4) +#define BM_UARTAPP_AUTOBAUD_TWO_REF_CHARS (1 << 3) +#define BM_UARTAPP_AUTOBAUD_START_WITH_RUNBIT (1 << 2) +#define BM_UARTAPP_AUTOBAUD_START_BAUD_DETECT (1 << 1) +#define BM_UARTAPP_AUTOBAUD_BAUD_DETECT_ENABLE (1 << 0) +#endif /* __ARCH_ARM___UARTAPP_H */ diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 697f2bb..4c45bfa 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -38,6 +38,7 @@ COBJS-$(CONFIG_SCIF_CONSOLE) += serial_sh.o COBJS-$(CONFIG_ZYNQ_SERIAL) += serial_zynq.o COBJS-$(CONFIG_BFIN_SERIAL) += serial_bfin.o COBJS-$(CONFIG_FSL_LPUART) += serial_lpuart.o +COBJS-$(CONFIG_MXS_AUART) += mxs_auart.o
ifndef CONFIG_SPL_BUILD COBJS-$(CONFIG_USB_TTY) += usbtty.o diff --git a/drivers/serial/mxs_auart.c b/drivers/serial/mxs_auart.c new file mode 100644 index 0000000..a99dccf --- /dev/null +++ b/drivers/serial/mxs_auart.c @@ -0,0 +1,118 @@ +/* + * Driver to use an application UART as console output for Freescale + * MXS devices. + * + * Copyright (C) 2013 Andreas Wass andreas.wass@dalelven.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <common.h> +#include <asm/io.h> +#include <serial.h> +#include <linux/compiler.h> +#include <asm/arch/regs-base.h> +#include <asm/arch/regs-uartapp.h> +#include <asm/arch/sys_proto.h> + +DECLARE_GLOBAL_DATA_PTR; + +#ifndef CONFIG_MXS_AUART_BASE +#error "CONFIG_MXS_AUART_BASE must be set to the base UART to use" +#endif + +#ifndef CONFIG_MXS_AUART_CLK +/* At least the i.MX28 always uses a 24MHz clock for AUART */ +#define CONFIG_MXS_AUART_CLK 24000000 +#endif + +static struct mxs_uartapp_regs *get_uartapp_registers(void) +{ + return (struct mxs_uartapp_regs*)CONFIG_MXS_AUART_BASE; +} + +/* + * Set baud rate. The settings are always 8n1 + */ +void mxs_auart_setbrg(void) +{ + u32 div; + u32 linectrl = 0; + struct mxs_uartapp_regs *regs = get_uartapp_registers(); + + div = (CONFIG_MXS_AUART_CLK * 32) / CONFIG_BAUDRATE; + linectrl |= BF_UARTAPP_LINECTRL_BAUD_DIVFRAC(div & 0x3F); + linectrl |= BF_UARTAPP_LINECTRL_BAUD_DIVINT(div >> 6); + linectrl |= BF_UARTAPP_LINECTRL_WLEN(3); + linectrl |= BM_UARTAPP_LINECTRL_FEN; + + writel(linectrl, ®s->hw_uartapp_linectrl); +} + +int mxs_auart_init(void) +{ + struct mxs_uartapp_regs *regs = get_uartapp_registers(); + mxs_reset_block(®s->hw_uartapp_ctrl0_reg); + writel(0, ®s->hw_uartapp_intr); + serial_setbrg(); + + writel(BM_UARTAPP_CTRL2_RTSEN | + BM_UARTAPP_CTRL2_CTSEN | + BM_UARTAPP_CTRL2_USE_LCR2, + ®s->hw_uartapp_ctrl2_clr); + + writel(BM_UARTAPP_CTRL2_RXE | + BM_UARTAPP_CTRL2_TXE | + BM_UARTAPP_CTRL2_UARTEN, + ®s->hw_uartapp_ctrl2_set); + return 0; +} + +void mxs_auart_putc(const char c) +{ + struct mxs_uartapp_regs *regs = get_uartapp_registers(); + while (readl(®s->hw_uartapp_stat) & BM_UARTAPP_STAT_TXFF) + ; + + writel(c, ®s->hw_uartapp_data); + + if (c == '\n') + mxs_auart_putc('\r'); +} + +int mxs_auart_tstc(void) +{ + struct mxs_uartapp_regs *regs = get_uartapp_registers(); + + return !(readl(®s->hw_uartapp_stat) & BM_UARTAPP_STAT_RXFE); +} + +int mxs_auart_getc(void) +{ + struct mxs_uartapp_regs *regs = get_uartapp_registers(); + + while (!mxs_auart_tstc()) + ; + + return readl(®s->hw_uartapp_data) & 0xFF; +} + +static struct serial_device mxs_auart_drv = { + .name = "mxs_auart_serial", + .start = mxs_auart_init, + .stop = NULL, + .setbrg = mxs_auart_setbrg, + .putc = mxs_auart_putc, + .puts = default_serial_puts, + .getc = mxs_auart_getc, + .tstc = mxs_auart_tstc, +}; + +void mxs_auart_initialize(void) +{ + serial_register(&mxs_auart_drv); +} + +__weak struct serial_device *default_serial_console(void) +{ + return &mxs_auart_drv; +} diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index 6730135..2bc42a7 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -159,6 +159,7 @@ serial_initfunc(pl01x_serial_initialize); serial_initfunc(s3c44b0_serial_initialize); serial_initfunc(sa1100_serial_initialize); serial_initfunc(sh_serial_initialize); +serial_initfunc(mxs_auart_initialize);
/** * serial_register() - Register serial driver with serial driver core @@ -251,7 +252,7 @@ void serial_initialize(void) s3c44b0_serial_initialize(); sa1100_serial_initialize(); sh_serial_initialize(); - + mxs_auart_initialize(); serial_assign(default_serial_console()->name); }

Dear Andreas Wass,
The driver is ported from a driver that was implemented using u-boot 2009.
The driver makes it possible to use a regular application UART as the U-Boot output console for MXS CPUs.
Signed-off-by: Andreas Wass andreas.wass@dalelven.com Cc: Fabio Estevam fabio.estevam@freescale.com Cc: Marek Vasut marex@denx.de
arch/arm/include/asm/arch-mxs/regs-uartapp.h | 321 +++++++++++++++++++++++++++ drivers/serial/Makefile | 1 + drivers/serial/mxs_auart.c | 118 ++++++++++ drivers/serial/serial.c | 3 +- 4 files changed, 442 insertions(+), 1 deletion(-) create mode 100644 arch/arm/include/asm/arch-mxs/regs-uartapp.h create mode 100644 drivers/serial/mxs_auart.c
diff --git a/arch/arm/include/asm/arch-mxs/regs-uartapp.h b/arch/arm/include/asm/arch-mxs/regs-uartapp.h new file mode 100644 index 0000000..5e871b6 --- /dev/null +++ b/arch/arm/include/asm/arch-mxs/regs-uartapp.h @@ -0,0 +1,321 @@ +/*
- Freescale MXS UARTAPP Register Definitions
- Copyright (C) 2013 Andreas Wass andreas.wass@dalelven.com
- SPDX-License-Identifier: GPL-2.0+
- */
This is pulled from LTIB, right? Make sure to add proper comment about it (see the rest of the drivers).
+#ifndef __ARCH_ARM___MXS_UARTAPP_H +#define __ARCH_ARM___MXS_UARTAPP_H
+#include <asm/imx-common/regs-common.h>
+#ifndef __ASSEMBLY__ +struct mxs_uartapp_regs {
- mxs_reg_32(hw_uartapp_ctrl0)
- mxs_reg_32(hw_uartapp_ctrl1)
- mxs_reg_32(hw_uartapp_ctrl2)
- mxs_reg_32(hw_uartapp_linectrl)
- mxs_reg_32(hw_uartapp_linectrl2)
- mxs_reg_32(hw_uartapp_intr)
- mxs_reg_32(hw_uartapp_data)
- mxs_reg_32(hw_uartapp_stat)
- mxs_reg_32(hw_uartapp_debug)
- mxs_reg_32(hw_uartapp_version)
- mxs_reg_32(hw_uartapp_autobaud)
+}; +#endif
+#define BM_UARTAPP_CTRL0_SFTRST (1 << 31) +#define BM_UARTAPP_CTRL0_CLKGATE (1 << 30) +#define BM_UARTAPP_CTRL0_RUN (1 << 29) +#define BM_UARTAPP_CTRL0_RX_SOURCE (1 << 28) +#define BM_UARTAPP_CTRL0_RXTO_ENABLE (1 << 27) +#define BP_UARTAPP_CTRL0_RXTIMEOUT (1 << 4) +#define BM_UARTAPP_CTRL0_RXTIMEOUT 0x07FF0000 +#define BF_UARTAPP_CTRL0_RXTIMEOUT(v) \
- (((v) << 16) & BM_UARTAPP_CTRL0_RXTIMEOUT)
+#define BP_UARTAPP_CTRL0_XFER_COUNT 0 +#define BM_UARTAPP_CTRL0_XFER_COUNT 0x0000FFFF +#define BF_UARTAPP_CTRL0_XFER_COUNT(v) \
- (((v) << BP_UARTAPP_CTRL0_XFER_COUNT) & \
BM_UARTAPP_CTRL0_XFER_COUNT)
Can you rework it so the register/mask/offset definition pattern matches the rest of the files with registers?
- Drop the leading "B[A-Z]_" - Add _MASK suffix to 'mask' vars (transfor the BM_ vars) - The BF_ vars are not needed at all - Add _OFFSET suffix to 'offset' vars (transform the BP_ vars)
It should be a simple 'sed' job.
[...]
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 697f2bb..4c45bfa 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -38,6 +38,7 @@ COBJS-$(CONFIG_SCIF_CONSOLE) += serial_sh.o COBJS-$(CONFIG_ZYNQ_SERIAL) += serial_zynq.o COBJS-$(CONFIG_BFIN_SERIAL) += serial_bfin.o COBJS-$(CONFIG_FSL_LPUART) += serial_lpuart.o +COBJS-$(CONFIG_MXS_AUART) += mxs_auart.o
ifndef CONFIG_SPL_BUILD COBJS-$(CONFIG_USB_TTY) += usbtty.o diff --git a/drivers/serial/mxs_auart.c b/drivers/serial/mxs_auart.c new file mode 100644 index 0000000..a99dccf --- /dev/null +++ b/drivers/serial/mxs_auart.c @@ -0,0 +1,118 @@ +/*
- Driver to use an application UART as console output for Freescale
- MXS devices.
- Copyright (C) 2013 Andreas Wass andreas.wass@dalelven.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <common.h> +#include <asm/io.h> +#include <serial.h> +#include <linux/compiler.h> +#include <asm/arch/regs-base.h> +#include <asm/arch/regs-uartapp.h> +#include <asm/arch/sys_proto.h>
+DECLARE_GLOBAL_DATA_PTR;
+#ifndef CONFIG_MXS_AUART_BASE +#error "CONFIG_MXS_AUART_BASE must be set to the base UART to use" +#endif
+#ifndef CONFIG_MXS_AUART_CLK +/* At least the i.MX28 always uses a 24MHz clock for AUART */ +#define CONFIG_MXS_AUART_CLK 24000000 +#endif
Just drop the leading CONFIG_ here and remove the ifdef, the AUART is always supplied from XTAL , so we dont need a config for this.
+static struct mxs_uartapp_regs *get_uartapp_registers(void) +{
- return (struct mxs_uartapp_regs*)CONFIG_MXS_AUART_BASE;
+}
+/*
- Set baud rate. The settings are always 8n1
- */
+void mxs_auart_setbrg(void) +{
- u32 div;
- u32 linectrl = 0;
- struct mxs_uartapp_regs *regs = get_uartapp_registers();
- div = (CONFIG_MXS_AUART_CLK * 32) / CONFIG_BAUDRATE;
- linectrl |= BF_UARTAPP_LINECTRL_BAUD_DIVFRAC(div & 0x3F);
- linectrl |= BF_UARTAPP_LINECTRL_BAUD_DIVINT(div >> 6);
- linectrl |= BF_UARTAPP_LINECTRL_WLEN(3);
- linectrl |= BM_UARTAPP_LINECTRL_FEN;
- writel(linectrl, ®s->hw_uartapp_linectrl);
+}
+int mxs_auart_init(void) +{
- struct mxs_uartapp_regs *regs = get_uartapp_registers();
- mxs_reset_block(®s->hw_uartapp_ctrl0_reg);
- writel(0, ®s->hw_uartapp_intr);
You might want to comment on this a little.
- serial_setbrg();
- writel(BM_UARTAPP_CTRL2_RTSEN |
BM_UARTAPP_CTRL2_CTSEN |
BM_UARTAPP_CTRL2_USE_LCR2,
®s->hw_uartapp_ctrl2_clr);
- writel(BM_UARTAPP_CTRL2_RXE |
BM_UARTAPP_CTRL2_TXE |
BM_UARTAPP_CTRL2_UARTEN,
®s->hw_uartapp_ctrl2_set);
- return 0;
+}
[...]
diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index 6730135..2bc42a7 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -159,6 +159,7 @@ serial_initfunc(pl01x_serial_initialize); serial_initfunc(s3c44b0_serial_initialize); serial_initfunc(sa1100_serial_initialize); serial_initfunc(sh_serial_initialize); +serial_initfunc(mxs_auart_initialize);
/**
- serial_register() - Register serial driver with serial driver core
@@ -251,7 +252,7 @@ void serial_initialize(void) s3c44b0_serial_initialize(); sa1100_serial_initialize(); sh_serial_initialize();
- mxs_auart_initialize();
Keep the newline here please.
serial_assign(default_serial_console()->name); }
participants (2)
-
Andreas Wass
-
Marek Vasut