[PATCH 0/4] stm32mp: add minimal RCC support for STM32MP13
Add a minimal support for STM32MP13 RCC, the reset and clock controller - update of the RCC MISC driver to bind the correct clock and reset driver - reset driver, same than STM32MP15x = drivers/reset/stm32-reset.c - clock driver, add a empty driver for STM32MP13x = drivers/clk/stm32/clk-stm32mp13.c - Add RCC node in SOC device tree with u-boot,dm-pre-reloc property
This serie is only a preliminary step for STM32MP13 clock and reset support in U-Boot, based on Linux kernel binding introduced by [1] and it prepares the next device tree alignment with Linux kernel.
The functional STMP13 clock driver based on CCF and on SCMI clocks provided by OP-TEE and the clock and reset references in SOC device tree will be pushed when the associated patches in [1] will be accepted.
[1] Introduction of STM32MP13 RCC driver (Reset Clock Controller) https://lore.kernel.org/linux-arm-kernel/20220316131000.9874-1-gabriel.ferna...
Patrick Delaunay (4): clk: Add directory for STM32 clock drivers clk: stm32mp13: add a STM32MP13 RCC clock driver misc: stm32mp13: introduce STM32MP13 RCC driver ARM: dts: stm32: add rcc node for STM32MP13
MAINTAINERS | 2 +- arch/arm/dts/stm32mp13-u-boot.dtsi | 4 ++++ arch/arm/dts/stm32mp131.dtsi | 7 ++++++ drivers/clk/Kconfig | 17 +------------- drivers/clk/Makefile | 5 ++--- drivers/clk/stm32/Kconfig | 31 ++++++++++++++++++++++++++ drivers/clk/stm32/Makefile | 8 +++++++ drivers/clk/stm32/clk-stm32mp13.c | 21 +++++++++++++++++ drivers/clk/{ => stm32}/clk_stm32f.c | 0 drivers/clk/{ => stm32}/clk_stm32h7.c | 0 drivers/clk/{ => stm32}/clk_stm32mp1.c | 0 drivers/misc/stm32_rcc.c | 6 +++++ 12 files changed, 81 insertions(+), 20 deletions(-) create mode 100644 drivers/clk/stm32/Kconfig create mode 100644 drivers/clk/stm32/Makefile create mode 100644 drivers/clk/stm32/clk-stm32mp13.c rename drivers/clk/{ => stm32}/clk_stm32f.c (100%) rename drivers/clk/{ => stm32}/clk_stm32h7.c (100%) rename drivers/clk/{ => stm32}/clk_stm32mp1.c (100%)
Add a directory in drivers/clk to regroup the clock drivers for all STM32 Soc with CONFIG_ARCH_STM32 (MCUs with cortex M) or CONFIG_ARCH_STM32MP (MPUs with cortex A).
Signed-off-by: Patrick Delaunay patrick.delaunay@foss.st.com ---
MAINTAINERS | 2 +- drivers/clk/Kconfig | 17 +---------------- drivers/clk/Makefile | 5 ++--- drivers/clk/stm32/Kconfig | 23 +++++++++++++++++++++++ drivers/clk/stm32/Makefile | 7 +++++++ drivers/clk/{ => stm32}/clk_stm32f.c | 0 drivers/clk/{ => stm32}/clk_stm32h7.c | 0 drivers/clk/{ => stm32}/clk_stm32mp1.c | 0 8 files changed, 34 insertions(+), 20 deletions(-) create mode 100644 drivers/clk/stm32/Kconfig create mode 100644 drivers/clk/stm32/Makefile rename drivers/clk/{ => stm32}/clk_stm32f.c (100%) rename drivers/clk/{ => stm32}/clk_stm32h7.c (100%) rename drivers/clk/{ => stm32}/clk_stm32mp1.c (100%)
diff --git a/MAINTAINERS b/MAINTAINERS index 56be0bfad0..3f37edd716 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -469,7 +469,7 @@ S: Maintained F: arch/arm/mach-stm32mp/ F: doc/board/st/ F: drivers/adc/stm32-adc* -F: drivers/clk/clk_stm32mp1.c +F: drivers/clk/stm32/ F: drivers/gpio/stm32_gpio.c F: drivers/hwspinlock/stm32_hwspinlock.c F: drivers/i2c/stm32f7_i2c.c diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 6dc271f71b..98ad481d9e 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -140,22 +140,6 @@ config CLK_SCMI by a SCMI agent based on SCMI clock protocol communication with a SCMI server.
-config CLK_STM32F - bool "Enable clock driver support for STM32F family" - depends on CLK && (STM32F7 || STM32F4) - default y - help - This clock driver adds support for RCC clock management - for STM32F4 and STM32F7 SoCs. - -config CLK_STM32MP1 - bool "Enable RCC clock driver for STM32MP1" - depends on ARCH_STM32MP && CLK - default y - help - Enable the STM32 clock (RCC) driver. Enable support for - manipulating STM32MP1's on-SoC clocks. - config CLK_HSDK bool "Enable cgu clock driver for HSDK boards" depends on CLK && TARGET_HSDK @@ -225,6 +209,7 @@ source "drivers/clk/owl/Kconfig" source "drivers/clk/renesas/Kconfig" source "drivers/clk/sunxi/Kconfig" source "drivers/clk/sifive/Kconfig" +source "drivers/clk/stm32/Kconfig" source "drivers/clk/tegra/Kconfig" source "drivers/clk/ti/Kconfig" source "drivers/clk/uniphier/Kconfig" diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index bb4eee5d99..09fbaf6233 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -22,6 +22,8 @@ obj-$(CONFIG_ARCH_MESON) += meson/ obj-$(CONFIG_ARCH_MTMIPS) += mtmips/ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ obj-$(CONFIG_ARCH_SOCFPGA) += altera/ +obj-$(CONFIG_ARCH_STM32) += stm32/ +obj-$(CONFIG_ARCH_STM32MP) += stm32/ obj-$(CONFIG_ARCH_SUNXI) += sunxi/ obj-$(CONFIG_CLK_AT91) += at91/ obj-$(CONFIG_CLK_BCM6345) += clk_bcm6345.o @@ -38,8 +40,6 @@ obj-$(CONFIG_CLK_OWL) += owl/ obj-$(CONFIG_CLK_RENESAS) += renesas/ obj-$(CONFIG_CLK_SCMI) += clk_scmi.o obj-$(CONFIG_CLK_SIFIVE) += sifive/ -obj-$(CONFIG_CLK_STM32F) += clk_stm32f.o -obj-$(CONFIG_CLK_STM32MP1) += clk_stm32mp1.o obj-$(CONFIG_CLK_UNIPHIER) += uniphier/ obj-$(CONFIG_CLK_VERSACLOCK) += clk_versaclock.o obj-$(CONFIG_CLK_VERSAL) += clk_versal.o @@ -52,4 +52,3 @@ obj-$(CONFIG_MACH_PIC32) += clk_pic32.o obj-$(CONFIG_SANDBOX_CLK_CCF) += clk_sandbox_ccf.o obj-$(CONFIG_SANDBOX) += clk_sandbox.o obj-$(CONFIG_SANDBOX) += clk_sandbox_test.o -obj-$(CONFIG_STM32H7) += clk_stm32h7.o diff --git a/drivers/clk/stm32/Kconfig b/drivers/clk/stm32/Kconfig new file mode 100644 index 0000000000..eac3fc1e9d --- /dev/null +++ b/drivers/clk/stm32/Kconfig @@ -0,0 +1,23 @@ +config CLK_STM32F + bool "Enable clock driver support for STM32F family" + depends on CLK && (STM32F7 || STM32F4) + default y + help + This clock driver adds support for RCC clock management + for STM32F4 and STM32F7 SoCs. + +config CLK_STM32H7 + bool "Enable clock driver support for STM32H7 family" + depends on CLK && STM32H7 + default y + help + This clock driver adds support for RCC clock management + for STM32H7 SoCs. + +config CLK_STM32MP1 + bool "Enable RCC clock driver for STM32MP15" + depends on ARCH_STM32MP && CLK + default y if STM32MP15x + help + Enable the STM32 clock (RCC) driver. Enable support for + manipulating STM32MP15's on-SoC clocks. diff --git a/drivers/clk/stm32/Makefile b/drivers/clk/stm32/Makefile new file mode 100644 index 0000000000..b420eeaa4e --- /dev/null +++ b/drivers/clk/stm32/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# Copyright (C) 2022, STMicroelectronics - All Rights Reserved + +obj-$(CONFIG_CLK_STM32F) += clk_stm32f.o +obj-$(CONFIG_CLK_STM32H7) += clk_stm32h7.o +obj-$(CONFIG_CLK_STM32MP1) += clk_stm32mp1.o diff --git a/drivers/clk/clk_stm32f.c b/drivers/clk/stm32/clk_stm32f.c similarity index 100% rename from drivers/clk/clk_stm32f.c rename to drivers/clk/stm32/clk_stm32f.c diff --git a/drivers/clk/clk_stm32h7.c b/drivers/clk/stm32/clk_stm32h7.c similarity index 100% rename from drivers/clk/clk_stm32h7.c rename to drivers/clk/stm32/clk_stm32h7.c diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/stm32/clk_stm32mp1.c similarity index 100% rename from drivers/clk/clk_stm32mp1.c rename to drivers/clk/stm32/clk_stm32mp1.c
On 5/10/22 3:51 AM, Patrick Delaunay wrote:
Add a directory in drivers/clk to regroup the clock drivers for all STM32 Soc with CONFIG_ARCH_STM32 (MCUs with cortex M) or CONFIG_ARCH_STM32MP (MPUs with cortex A).
Signed-off-by: Patrick Delaunay patrick.delaunay@foss.st.com
MAINTAINERS | 2 +- drivers/clk/Kconfig | 17 +---------------- drivers/clk/Makefile | 5 ++--- drivers/clk/stm32/Kconfig | 23 +++++++++++++++++++++++ drivers/clk/stm32/Makefile | 7 +++++++ drivers/clk/{ => stm32}/clk_stm32f.c | 0 drivers/clk/{ => stm32}/clk_stm32h7.c | 0 drivers/clk/{ => stm32}/clk_stm32mp1.c | 0 8 files changed, 34 insertions(+), 20 deletions(-) create mode 100644 drivers/clk/stm32/Kconfig create mode 100644 drivers/clk/stm32/Makefile rename drivers/clk/{ => stm32}/clk_stm32f.c (100%) rename drivers/clk/{ => stm32}/clk_stm32h7.c (100%) rename drivers/clk/{ => stm32}/clk_stm32mp1.c (100%)
diff --git a/MAINTAINERS b/MAINTAINERS index 56be0bfad0..3f37edd716 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -469,7 +469,7 @@ S: Maintained F: arch/arm/mach-stm32mp/ F: doc/board/st/ F: drivers/adc/stm32-adc* -F: drivers/clk/clk_stm32mp1.c +F: drivers/clk/stm32/ F: drivers/gpio/stm32_gpio.c F: drivers/hwspinlock/stm32_hwspinlock.c F: drivers/i2c/stm32f7_i2c.c diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 6dc271f71b..98ad481d9e 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -140,22 +140,6 @@ config CLK_SCMI by a SCMI agent based on SCMI clock protocol communication with a SCMI server.
-config CLK_STM32F
- bool "Enable clock driver support for STM32F family"
- depends on CLK && (STM32F7 || STM32F4)
- default y
- help
This clock driver adds support for RCC clock managementfor STM32F4 and STM32F7 SoCs.-config CLK_STM32MP1
- bool "Enable RCC clock driver for STM32MP1"
- depends on ARCH_STM32MP && CLK
- default y
- help
Enable the STM32 clock (RCC) driver. Enable support formanipulating STM32MP1's on-SoC clocks.- config CLK_HSDK bool "Enable cgu clock driver for HSDK boards" depends on CLK && TARGET_HSDK
@@ -225,6 +209,7 @@ source "drivers/clk/owl/Kconfig" source "drivers/clk/renesas/Kconfig" source "drivers/clk/sunxi/Kconfig" source "drivers/clk/sifive/Kconfig" +source "drivers/clk/stm32/Kconfig" source "drivers/clk/tegra/Kconfig" source "drivers/clk/ti/Kconfig" source "drivers/clk/uniphier/Kconfig" diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index bb4eee5d99..09fbaf6233 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -22,6 +22,8 @@ obj-$(CONFIG_ARCH_MESON) += meson/ obj-$(CONFIG_ARCH_MTMIPS) += mtmips/ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ obj-$(CONFIG_ARCH_SOCFPGA) += altera/ +obj-$(CONFIG_ARCH_STM32) += stm32/ +obj-$(CONFIG_ARCH_STM32MP) += stm32/ obj-$(CONFIG_ARCH_SUNXI) += sunxi/ obj-$(CONFIG_CLK_AT91) += at91/ obj-$(CONFIG_CLK_BCM6345) += clk_bcm6345.o @@ -38,8 +40,6 @@ obj-$(CONFIG_CLK_OWL) += owl/ obj-$(CONFIG_CLK_RENESAS) += renesas/ obj-$(CONFIG_CLK_SCMI) += clk_scmi.o obj-$(CONFIG_CLK_SIFIVE) += sifive/ -obj-$(CONFIG_CLK_STM32F) += clk_stm32f.o -obj-$(CONFIG_CLK_STM32MP1) += clk_stm32mp1.o obj-$(CONFIG_CLK_UNIPHIER) += uniphier/ obj-$(CONFIG_CLK_VERSACLOCK) += clk_versaclock.o obj-$(CONFIG_CLK_VERSAL) += clk_versal.o @@ -52,4 +52,3 @@ obj-$(CONFIG_MACH_PIC32) += clk_pic32.o obj-$(CONFIG_SANDBOX_CLK_CCF) += clk_sandbox_ccf.o obj-$(CONFIG_SANDBOX) += clk_sandbox.o obj-$(CONFIG_SANDBOX) += clk_sandbox_test.o -obj-$(CONFIG_STM32H7) += clk_stm32h7.o diff --git a/drivers/clk/stm32/Kconfig b/drivers/clk/stm32/Kconfig new file mode 100644 index 0000000000..eac3fc1e9d --- /dev/null +++ b/drivers/clk/stm32/Kconfig @@ -0,0 +1,23 @@ +config CLK_STM32F
- bool "Enable clock driver support for STM32F family"
- depends on CLK && (STM32F7 || STM32F4)
- default y
- help
This clock driver adds support for RCC clock managementfor STM32F4 and STM32F7 SoCs.+config CLK_STM32H7
- bool "Enable clock driver support for STM32H7 family"
- depends on CLK && STM32H7
- default y
- help
This clock driver adds support for RCC clock managementfor STM32H7 SoCs.+config CLK_STM32MP1
- bool "Enable RCC clock driver for STM32MP15"
- depends on ARCH_STM32MP && CLK
- default y if STM32MP15x
- help
Enable the STM32 clock (RCC) driver. Enable support formanipulating STM32MP15's on-SoC clocks.diff --git a/drivers/clk/stm32/Makefile b/drivers/clk/stm32/Makefile new file mode 100644 index 0000000000..b420eeaa4e --- /dev/null +++ b/drivers/clk/stm32/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# Copyright (C) 2022, STMicroelectronics - All Rights Reserved
+obj-$(CONFIG_CLK_STM32F) += clk_stm32f.o +obj-$(CONFIG_CLK_STM32H7) += clk_stm32h7.o +obj-$(CONFIG_CLK_STM32MP1) += clk_stm32mp1.o diff --git a/drivers/clk/clk_stm32f.c b/drivers/clk/stm32/clk_stm32f.c similarity index 100% rename from drivers/clk/clk_stm32f.c rename to drivers/clk/stm32/clk_stm32f.c diff --git a/drivers/clk/clk_stm32h7.c b/drivers/clk/stm32/clk_stm32h7.c similarity index 100% rename from drivers/clk/clk_stm32h7.c rename to drivers/clk/stm32/clk_stm32h7.c diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/stm32/clk_stm32mp1.c similarity index 100% rename from drivers/clk/clk_stm32mp1.c rename to drivers/clk/stm32/clk_stm32mp1.c
Reviewed-by: Sean Anderson seanga2@gmail.com
Introduce a minimal STM32MP13 RCC driver only to allow bind of RCC MISC driver.
Signed-off-by: Patrick Delaunay patrick.delaunay@foss.st.com ---
drivers/clk/stm32/Kconfig | 8 ++++++++ drivers/clk/stm32/Makefile | 1 + drivers/clk/stm32/clk-stm32mp13.c | 21 +++++++++++++++++++++ 3 files changed, 30 insertions(+) create mode 100644 drivers/clk/stm32/clk-stm32mp13.c
diff --git a/drivers/clk/stm32/Kconfig b/drivers/clk/stm32/Kconfig index eac3fc1e9d..7444164b81 100644 --- a/drivers/clk/stm32/Kconfig +++ b/drivers/clk/stm32/Kconfig @@ -21,3 +21,11 @@ config CLK_STM32MP1 help Enable the STM32 clock (RCC) driver. Enable support for manipulating STM32MP15's on-SoC clocks. + +config CLK_STM32MP13 + bool "Enable RCC clock driver for STM32MP13" + depends on ARCH_STM32MP && CLK + default y if STM32MP13x + help + Enable the STM32 clock (RCC) driver. Enable support for + manipulating STM32MP13's on-SoC clocks. diff --git a/drivers/clk/stm32/Makefile b/drivers/clk/stm32/Makefile index b420eeaa4e..feeb796f76 100644 --- a/drivers/clk/stm32/Makefile +++ b/drivers/clk/stm32/Makefile @@ -5,3 +5,4 @@ obj-$(CONFIG_CLK_STM32F) += clk_stm32f.o obj-$(CONFIG_CLK_STM32H7) += clk_stm32h7.o obj-$(CONFIG_CLK_STM32MP1) += clk_stm32mp1.o +obj-$(CONFIG_CLK_STM32MP13) += clk-stm32mp13.o \ No newline at end of file diff --git a/drivers/clk/stm32/clk-stm32mp13.c b/drivers/clk/stm32/clk-stm32mp13.c new file mode 100644 index 0000000000..afd116361b --- /dev/null +++ b/drivers/clk/stm32/clk-stm32mp13.c @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause +/* + * Copyright (C) 2022, STMicroelectronics - All Rights Reserved + * Author: Gabriel Fernandez gabriel.fernandez@st.com for STMicroelectronics. + */ + +#define LOG_CATEGORY UCLASS_CLK + +#include <common.h> +#include <dm.h> + +static int stm32mp1_clk_probe(struct udevice *dev) +{ + return -EINVAL; +} + +U_BOOT_DRIVER(stm32mp1_clock) = { + .name = "stm32mp13_clk", + .id = UCLASS_CLK, + .probe = stm32mp1_clk_probe, +};
Hi,
On Tue, May 10, 2022 at 09:51:11AM +0200, Patrick Delaunay wrote:
Introduce a minimal STM32MP13 RCC driver only to allow bind of RCC MISC driver.
Consider s/only/just/ and s/bind of/binding of the/.
diff --git a/drivers/clk/stm32/Makefile b/drivers/clk/stm32/Makefile -%<- obj-$(CONFIG_CLK_STM32MP1) += clk_stm32mp1.o +obj-$(CONFIG_CLK_STM32MP13) += clk-stm32mp13.o \ No newline at end of file
Could you add a newline here? I think it was there in the previous patch. Also, note that the new file name seems to break the convention of using underscores.
All the best
Add the MISC RCC driver for STM32MP13, and bind it to the RCC reset driver, required for initial support.
Signed-off-by: Patrick Delaunay patrick.delaunay@foss.st.com ---
drivers/misc/stm32_rcc.c | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/drivers/misc/stm32_rcc.c b/drivers/misc/stm32_rcc.c index f14d6e26d9..b816503bfa 100644 --- a/drivers/misc/stm32_rcc.c +++ b/drivers/misc/stm32_rcc.c @@ -39,6 +39,11 @@ struct stm32_rcc_clk stm32_rcc_clk_mp1 = { .soc = STM32MP1, };
+struct stm32_rcc_clk stm32_rcc_clk_mp13 = { + .drv_name = "stm32mp13_clk", + .soc = STM32MP1, +}; + static int stm32_rcc_bind(struct udevice *dev) { struct udevice *child; @@ -79,6 +84,7 @@ static const struct udevice_id stm32_rcc_ids[] = { {.compatible = "st,stm32f746-rcc", .data = (ulong)&stm32_rcc_clk_f7 }, {.compatible = "st,stm32h743-rcc", .data = (ulong)&stm32_rcc_clk_h7 }, {.compatible = "st,stm32mp1-rcc", .data = (ulong)&stm32_rcc_clk_mp1 }, + {.compatible = "st,stm32mp13-rcc", .data = (ulong)&stm32_rcc_clk_mp13 }, { } };
Add the RCC node, not yet in Linux kernel device tree to handle the U-Boot RCC drivers.
Signed-off-by: Patrick Delaunay patrick.delaunay@foss.st.com ---
arch/arm/dts/stm32mp13-u-boot.dtsi | 4 ++++ arch/arm/dts/stm32mp131.dtsi | 7 +++++++ 2 files changed, 11 insertions(+)
diff --git a/arch/arm/dts/stm32mp13-u-boot.dtsi b/arch/arm/dts/stm32mp13-u-boot.dtsi index 1b5b358690..126f282816 100644 --- a/arch/arm/dts/stm32mp13-u-boot.dtsi +++ b/arch/arm/dts/stm32mp13-u-boot.dtsi @@ -86,6 +86,10 @@ u-boot,dm-pre-reloc; };
+&rcc { + u-boot,dm-pre-reloc; +}; + &syscfg { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/stm32mp131.dtsi b/arch/arm/dts/stm32mp131.dtsi index 950e172e45..fcb0af09b5 100644 --- a/arch/arm/dts/stm32mp131.dtsi +++ b/arch/arm/dts/stm32mp131.dtsi @@ -159,6 +159,13 @@ dma-channels = <16>; };
+ rcc: rcc@50000000 { + compatible = "st,stm32mp13-rcc", "syscon"; + reg = <0x50000000 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + exti: interrupt-controller@5000d000 { compatible = "st,stm32mp13-exti", "syscon"; interrupt-controller;
Hi Patrick,
On 5/10/22 3:51 AM, Patrick Delaunay wrote:
Add a minimal support for STM32MP13 RCC, the reset and clock controller
- update of the RCC MISC driver to bind the correct clock and reset driver
- reset driver, same than STM32MP15x = drivers/reset/stm32-reset.c
- clock driver, add a empty driver for STM32MP13x = drivers/clk/stm32/clk-stm32mp13.c
- Add RCC node in SOC device tree with u-boot,dm-pre-reloc property
This serie is only a preliminary step for STM32MP13 clock and reset support in U-Boot, based on Linux kernel binding introduced by [1] and it prepares the next device tree alignment with Linux kernel.
The functional STMP13 clock driver based on CCF and on SCMI clocks provided by OP-TEE and the clock and reset references in SOC device tree will be pushed when the associated patches in [1] will be accepted.
[1] Introduction of STM32MP13 RCC driver (Reset Clock Controller) https://lore.kernel.org/linux-arm-kernel/20220316131000.9874-1-gabriel.ferna...
I'm not really sure what the purpose of this series is. Can you elaborate a bit on why we need a dummy clock driver? Why don't you just add the binding to the device tree without the associated driver?
--Sean
Hi,
On 5/11/22 18:44, Sean Anderson wrote:
Hi Patrick,
On 5/10/22 3:51 AM, Patrick Delaunay wrote:
Add a minimal support for STM32MP13 RCC, the reset and clock controller
- update of the RCC MISC driver to bind the correct clock and reset
driver
- reset driver, same than STM32MP15x = drivers/reset/stm32-reset.c
- clock driver, add a empty driver for STM32MP13x =
drivers/clk/stm32/clk-stm32mp13.c
- Add RCC node in SOC device tree with u-boot,dm-pre-reloc property
This serie is only a preliminary step for STM32MP13 clock and reset support in U-Boot, based on Linux kernel binding introduced by [1] and it prepares the next device tree alignment with Linux kernel.
The functional STMP13 clock driver based on CCF and on SCMI clocks provided by OP-TEE and the clock and reset references in SOC device tree will be pushed when the associated patches in [1] will be accepted.
[1] Introduction of STM32MP13 RCC driver (Reset Clock Controller) https://lore.kernel.org/linux-arm-kernel/20220316131000.9874-1-gabriel.ferna...
I'm not really sure what the purpose of this series is. Can you elaborate a bit on why we need a dummy clock driver? Why don't you just add the binding to the device tree without the associated driver?
After this serie, the RCC reset part is functional on STM32MP13 (probe and ops)
even if the associated binding is not present in device tree.
tested with:
------------------------- arch/arm/dts/stm32mp131.dtsi ------------------------- index fcb0af09b5..d9c6185bcf 100644 @@ -197,6 +197,7 @@ interrupt-names = "cmd_irq"; clocks = <&clk_pll4_p>; clock-names = "apb_pclk"; + resets = <&rcc 14224>; cap-sd-highspeed; cap-mmc-highspeed; max-frequency = <130000000>;
A dummy STM32MP13 clock driver is requested to allow RCC MISC and RCC RESET
binding and probe without issue.
This reset support was requested by SDMCC driver and SD-Card boot, before the patch:
http://patchwork.ozlabs.org/project/uboot/patch/20220506160540.13.I39b69e8dc...
As we solve the SDMCC dependency issue (reset become optionnal), so this serie is no more mandatory.
This serie is a just a cleanup / preliminary step, but I can drop this dummy RCC driver if it is disturbing.
--Sean
Patrick
Hi Patrick,
On 5/17/22 4:12 AM, Patrick DELAUNAY wrote:
Hi,
On 5/11/22 18:44, Sean Anderson wrote:
Hi Patrick,
On 5/10/22 3:51 AM, Patrick Delaunay wrote:
Add a minimal support for STM32MP13 RCC, the reset and clock controller
- update of the RCC MISC driver to bind the correct clock and reset driver
- reset driver, same than STM32MP15x = drivers/reset/stm32-reset.c
- clock driver, add a empty driver for STM32MP13x =
drivers/clk/stm32/clk-stm32mp13.c
- Add RCC node in SOC device tree with u-boot,dm-pre-reloc property
This serie is only a preliminary step for STM32MP13 clock and reset support in U-Boot, based on Linux kernel binding introduced by [1] and it prepares the next device tree alignment with Linux kernel.
The functional STMP13 clock driver based on CCF and on SCMI clocks provided by OP-TEE and the clock and reset references in SOC device tree will be pushed when the associated patches in [1] will be accepted.
[1] Introduction of STM32MP13 RCC driver (Reset Clock Controller) https://lore.kernel.org/linux-arm-kernel/20220316131000.9874-1-gabriel.ferna...
I'm not really sure what the purpose of this series is. Can you elaborate a bit on why we need a dummy clock driver? Why don't you just add the binding to the device tree without the associated driver?
After this serie, the RCC reset part is functional on STM32MP13 (probe and ops)
even if the associated binding is not present in device tree.
tested with:
------------------------- arch/arm/dts/stm32mp131.dtsi ------------------------- index fcb0af09b5..d9c6185bcf 100644 @@ -197,6 +197,7 @@ interrupt-names = "cmd_irq"; clocks = <&clk_pll4_p>; clock-names = "apb_pclk"; + resets = <&rcc 14224>; cap-sd-highspeed; cap-mmc-highspeed; max-frequency = <130000000>;
A dummy STM32MP13 clock driver is requested to allow RCC MISC and RCC RESET
binding and probe without issue.
Shouldn't the solution be to make the clock optional in the user?
This reset support was requested by SDMCC driver and SD-Card boot, before the patch:
http://patchwork.ozlabs.org/project/uboot/patch/20220506160540.13.I39b69e8dc...
As we solve the SDMCC dependency issue (reset become optionnal), so this serie is no more mandatory.
This serie is a just a cleanup / preliminary step, but I can drop this dummy RCC driver if it is disturbing.
I would like that, since this is not mandatory.
--Sean
participants (4)
-
Grzegorz Szymaszek -
Patrick DELAUNAY -
Patrick Delaunay
-
Sean Anderson