[U-Boot] Boot count support on P1020
Hi,
I'd like to enable boot count feature on custom P1020 based board. If my understanding is correct, the implementation requires some register or memory location that preserves its value across reboots.
Can Freescale folks on the list please point to such location in P1/P2 SoCs.
Thanks a lot.
Felix.
On Jan 26, 2011, at 2:43 PM, Felix Radensky wrote:
Hi,
I'd like to enable boot count feature on custom P1020 based board. If my understanding is correct, the implementation requires some register or memory location that preserves its value across reboots.
Can Freescale folks on the list please point to such location in P1/P2 SoCs.
Thanks a lot.
What kinda reset do you expect to occur? Depending on this the answer might be that we dont have any such registers that persist across reboots.
- k
Dear Kumar Gala,
In message C2AA15B2-FD90-45EA-A9B1-8B1E6FA4B143@kernel.crashing.org you wrote:
What kinda reset do you expect to occur? Depending on this the answer might be that we dont have any such registers that persist across reboots.
external hard reset ?
Best regards,
Wolfgang Denk
On Jan 26, 2011, at 4:00 PM, Wolfgang Denk wrote:
Dear Kumar Gala,
In message C2AA15B2-FD90-45EA-A9B1-8B1E6FA4B143@kernel.crashing.org you wrote:
What kinda reset do you expect to occur? Depending on this the answer might be that we dont have any such registers that persist across reboots.
external hard reset ?
If so, there isnt any state saved across such a reset in the SoC
- k
Hi Kumar,
On 01/27/2011 05:29 AM, Kumar Gala wrote:
On Jan 26, 2011, at 4:00 PM, Wolfgang Denk wrote:
Dear Kumar Gala,
In messageC2AA15B2-FD90-45EA-A9B1-8B1E6FA4B143@kernel.crashing.org you wrote:
What kinda reset do you expect to occur? Depending on this the answer might be that we dont have any such registers that persist across reboots.
external hard reset ?
If so, there isnt any state saved across such a reset in the SoC
- k
Thanks a lot for a prompt reply. Looks like a have to use board I2C EEPROM to save state across reboots.
Felix.
Dear Kumar Gala,
In message 087EF8C3-9D3F-4228-8DB8-C8F8EF61BADF@kernel.crashing.org you wrote:
external hard reset ?
If so, there isnt any state saved across such a reset in the SoC
Hm, so really all registers are explicitly initialized? What a pitty.
Best regards,
Wolfgang Denk
participants (3)
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Felix Radensky -
Kumar Gala -
Wolfgang Denk