[U-Boot] [PATCH v2 0/9] Further support for the kmp204x architecture
This patch series refines the support for the kmp204x designs. The main additions are: - further support of the QRIO CPLD (bootcounter and GPIO) - support of the new kmcoge4 board based on kmp204x - support of I2C deblocking - support for FPGA configuration (PCIe FPGA) - various fixes and smaller enhancements
Changes in v2: - change bootcounter implementation to use generic driver
Rainer Boschung (2): kmp204x: support for QRIO1 bootcounter kmp204x: I2C deblocking for I2C-bus1 added
Valentin Longchamp (7): kmp204x: introduce QRIO GPIO functions kmp204x: implement workaround for A-006559 kmp204x: add support for the kmcoge4 board kmp204x: update I2C field of RCW KM: add the KM_UBI_PART_BOOT_OPTS #define kmp204x: enable support for SPANSION SPI NOR kmp204x: initial support for PCIe FPGA configuration
board/keymile/kmp204x/Makefile | 2 +- board/keymile/kmp204x/kmp204x.c | 128 ++++++++++++----------------- board/keymile/kmp204x/kmp204x.h | 10 +++ board/keymile/kmp204x/pbi.cfg | 10 +++ board/keymile/kmp204x/pci.c | 85 ++++++++++++++++++++ board/keymile/kmp204x/qrio.c | 147 ++++++++++++++++++++++++++++++++++ board/keymile/kmp204x/rcw_kmp204x.cfg | 2 +- boards.cfg | 1 + include/configs/km/keymile-common.h | 10 ++- include/configs/km/kmp204x-common.h | 21 ++++- include/configs/kmp204x.h | 7 +- 11 files changed, 340 insertions(+), 83 deletions(-) create mode 100644 board/keymile/kmp204x/qrio.c
From: Rainer Boschung rainer.boschung@keymile.com
- make use of the QRIO1 32bit register at 0x20 as bootcounter register - check for BOOTCOUNT_MAGIC pattern when before bootcounter value is read
Signed-off-by: Rainer Boschung rainer.boschung@keymile.com Signed-off-by: Valentin Longchamp valentin.longchamp@keymile.com
---
Changes in v2: - change bootcounter implementation to use generic driver
board/keymile/kmp204x/kmp204x.c | 20 -------------------- include/configs/km/kmp204x-common.h | 6 ++++-- 2 files changed, 4 insertions(+), 22 deletions(-)
diff --git a/board/keymile/kmp204x/kmp204x.c b/board/keymile/kmp204x/kmp204x.c index f02642a..20a3264 100644 --- a/board/keymile/kmp204x/kmp204x.c +++ b/board/keymile/kmp204x/kmp204x.c @@ -133,26 +133,6 @@ void qrio_prstcfg(u8 bit, u8 mode) out_be32(qrio_base + PRSTCFG_OFF, prstcfg); }
- -#define BOOTCOUNT_OFF 0x12 - -void bootcount_store(ulong counter) -{ - u8 val; - void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; - - val = (counter <= 255) ? (u8)counter : 255; - out_8(qrio_base + BOOTCOUNT_OFF, val); -} - -ulong bootcount_load(void) -{ - u8 val; - void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; - val = in_8(qrio_base + BOOTCOUNT_OFF); - return val; -} - #define NUM_SRDS_BANKS 2 #define PHY_RST 15
diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index 50330cc..e33ac90 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -149,8 +149,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_KM_KERNEL_ADDR 0x1000000 /* max kernel size 15.5Mbytes */ #define CONFIG_KM_FDT_ADDR 0x1F80000 /* max dtb size 0.5Mbytes */
-#define CONFIG_BOOTCOUNT_LIMIT - /* * Local Bus Definitions */ @@ -207,6 +205,10 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_QRIO_BR_PRELIM /* QRIO Base Address */ #define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_QRIO_OR_PRELIM /* QRIO Options */
+/* bootcounter in QRIO */ +#define CONFIG_BOOTCOUNT_LIMIT +#define CONFIG_SYS_BOOTCOUNT_ADDR (CONFIG_SYS_QRIO_BASE + 0x20) + #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */ #define CONFIG_MISC_INIT_R
On 01/27/2014 02:49 AM, Valentin Longchamp wrote:
From: Rainer Boschung rainer.boschung@keymile.com
- make use of the QRIO1 32bit register at 0x20 as bootcounter register
- check for BOOTCOUNT_MAGIC pattern when before bootcounter value is read
Signed-off-by: Rainer Boschung rainer.boschung@keymile.com Signed-off-by: Valentin Longchamp valentin.longchamp@keymile.com
Changes in v2:
- change bootcounter implementation to use generic driver
Applied to u-boot-mpc85xx master branch.
York
The QRIO GPIO functions can be of general interest. They are thus added to a qrio.c and their prototype are available from kmp204x.h. The QRIO prst function are also included in this file, as well as the functions required for the I2C deblocking support (open-drain).
Signed-off-by: Valentin Longchamp valentin.longchamp@keymile.com ---
Changes in v2: None
board/keymile/kmp204x/Makefile | 2 +- board/keymile/kmp204x/kmp204x.c | 56 --------------- board/keymile/kmp204x/kmp204x.h | 10 +++ board/keymile/kmp204x/qrio.c | 147 ++++++++++++++++++++++++++++++++++++++++ 4 files changed, 158 insertions(+), 57 deletions(-) create mode 100644 board/keymile/kmp204x/qrio.c
diff --git a/board/keymile/kmp204x/Makefile b/board/keymile/kmp204x/Makefile index 3e69ee2..c57ca08 100644 --- a/board/keymile/kmp204x/Makefile +++ b/board/keymile/kmp204x/Makefile @@ -8,5 +8,5 @@ # SPDX-License-Identifier: GPL-2.0+ #
-obj-y := kmp204x.o ddr.o eth.o tlb.o pci.o law.o \ +obj-y := kmp204x.o ddr.o eth.o tlb.o pci.o law.o qrio.o \ ../common/common.o ../common/ivm.o diff --git a/board/keymile/kmp204x/kmp204x.c b/board/keymile/kmp204x/kmp204x.c index 20a3264..bbb2453 100644 --- a/board/keymile/kmp204x/kmp204x.c +++ b/board/keymile/kmp204x/kmp204x.c @@ -77,62 +77,6 @@ unsigned long get_board_sys_clk(unsigned long dummy) return 66666666; }
-#define WDMASK_OFF 0x16 - -static void qrio_wdmask(u8 bit, bool wden) -{ - u16 wdmask; - void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; - - wdmask = in_be16(qrio_base + WDMASK_OFF); - - if (wden) - wdmask |= (1 << bit); - else - wdmask &= ~(1 << bit); - - out_be16(qrio_base + WDMASK_OFF, wdmask); -} - -#define PRST_OFF 0x1a - -void qrio_prst(u8 bit, bool en, bool wden) -{ - u16 prst; - void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; - - qrio_wdmask(bit, wden); - - prst = in_be16(qrio_base + PRST_OFF); - - if (en) - prst &= ~(1 << bit); - else - prst |= (1 << bit); - - out_be16(qrio_base + PRST_OFF, prst); -} - -#define PRSTCFG_OFF 0x1c - -void qrio_prstcfg(u8 bit, u8 mode) -{ - u32 prstcfg; - u8 i; - void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; - - prstcfg = in_be32(qrio_base + PRSTCFG_OFF); - - for (i = 0; i < 2; i++) { - if (mode & (1<<i)) - set_bit(2*bit+i, &prstcfg); - else - clear_bit(2*bit+i, &prstcfg); - } - - out_be32(qrio_base + PRSTCFG_OFF, prstcfg); -} - #define NUM_SRDS_BANKS 2 #define PHY_RST 15
diff --git a/board/keymile/kmp204x/kmp204x.h b/board/keymile/kmp204x/kmp204x.h index b6ba672..0267596 100644 --- a/board/keymile/kmp204x/kmp204x.h +++ b/board/keymile/kmp204x/kmp204x.h @@ -5,6 +5,16 @@ * SPDX-License-Identifier: GPL-2.0+ */
+/* QRIO GPIO ports */ +#define GPIO_A 0x40 +#define GPIO_B 0x60 + +int qrio_get_gpio(u8 port_off, u8 gpio_nr); +void qrio_set_opendrain_gpio(u8 port_off, u8 gpio_nr, u8 val); +void qrio_set_gpio(u8 port_off, u8 gpio_nr, bool value); +void qrio_gpio_direction_output(u8 port_off, u8 gpio_nr, bool value); +void qrio_gpio_direction_input(u8 port_off, u8 gpio_nr); + #define PRSTCFG_POWUP_UNIT_CORE_RST 0x0 #define PRSTCFG_POWUP_UNIT_RST 0x1 #define PRSTCFG_POWUP_RST 0x3 diff --git a/board/keymile/kmp204x/qrio.c b/board/keymile/kmp204x/qrio.c new file mode 100644 index 0000000..e6b3521 --- /dev/null +++ b/board/keymile/kmp204x/qrio.c @@ -0,0 +1,147 @@ +/* + * (C) Copyright 2013 Keymile AG + * Valentin Longchamp valentin.longchamp@keymile.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> + +#include "../common/common.h" +#include "kmp204x.h" + +/* QRIO GPIO register offsets */ +#define DIRECT_OFF 0x18 +#define GPRT_OFF 0x1c + +int qrio_get_gpio(u8 port_off, u8 gpio_nr) +{ + u32 gprt; + + void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; + + gprt = in_be32(qrio_base + port_off + GPRT_OFF); + + return (gprt >> gpio_nr) & 1U; +} + +void qrio_set_gpio(u8 port_off, u8 gpio_nr, bool value) +{ + u32 gprt, mask; + + void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; + + mask = 1U << gpio_nr; + + gprt = in_be32(qrio_base + port_off + GPRT_OFF); + if (value) + gprt |= mask; + else + gprt &= ~mask; + + out_be32(qrio_base + port_off + GPRT_OFF, gprt); +} + +void qrio_gpio_direction_output(u8 port_off, u8 gpio_nr, bool value) +{ + u32 direct, mask; + + void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; + + mask = 1U << gpio_nr; + + direct = in_be32(qrio_base + port_off + DIRECT_OFF); + direct |= mask; + out_be32(qrio_base + port_off + DIRECT_OFF, direct); + + qrio_set_gpio(port_off, gpio_nr, value); +} + +void qrio_gpio_direction_input(u8 port_off, u8 gpio_nr) +{ + u32 direct, mask; + + void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; + + mask = 1U << gpio_nr; + + direct = in_be32(qrio_base + port_off + DIRECT_OFF); + direct &= ~mask; + out_be32(qrio_base + port_off + DIRECT_OFF, direct); +} + +void qrio_set_opendrain_gpio(u8 port_off, u8 gpio_nr, u8 val) +{ + u32 direct, mask; + + void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; + + mask = 1U << gpio_nr; + + direct = in_be32(qrio_base + port_off + DIRECT_OFF); + if (val == 0) + /* set to output -> GPIO drives low */ + direct |= mask; + else + /* set to input -> GPIO floating */ + direct &= ~mask; + + out_be32(qrio_base + port_off + DIRECT_OFF, direct); +} + +#define WDMASK_OFF 0x16 + +static void qrio_wdmask(u8 bit, bool wden) +{ + u16 wdmask; + void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; + + wdmask = in_be16(qrio_base + WDMASK_OFF); + + if (wden) + wdmask |= (1 << bit); + else + wdmask &= ~(1 << bit); + + out_be16(qrio_base + WDMASK_OFF, wdmask); +} + +#define PRST_OFF 0x1a + +void qrio_prst(u8 bit, bool en, bool wden) +{ + u16 prst; + void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; + + qrio_wdmask(bit, wden); + + prst = in_be16(qrio_base + PRST_OFF); + + if (en) + prst &= ~(1 << bit); + else + prst |= (1 << bit); + + out_be16(qrio_base + PRST_OFF, prst); +} + +#define PRSTCFG_OFF 0x1c + +void qrio_prstcfg(u8 bit, u8 mode) +{ + u32 prstcfg; + u8 i; + void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; + + prstcfg = in_be32(qrio_base + PRSTCFG_OFF); + + for (i = 0; i < 2; i++) { + if (mode & (1<<i)) + set_bit(2*bit+i, &prstcfg); + else + clear_bit(2*bit+i, &prstcfg); + } + + out_be32(qrio_base + PRSTCFG_OFF, prstcfg); +} +
On 01/27/2014 02:49 AM, Valentin Longchamp wrote:
The QRIO GPIO functions can be of general interest. They are thus added to a qrio.c and their prototype are available from kmp204x.h. The QRIO prst function are also included in this file, as well as the functions required for the I2C deblocking support (open-drain).
Signed-off-by: Valentin Longchamp valentin.longchamp@keymile.com
Changes in v2: None
Applied to u-boot-mpc85xx master branch.
York
From: Rainer Boschung rainer.boschung@keymile.com
-uses common deblocking algorithm from ../common/common.c -supports deblocking of of I2C-bus1 by means of QRIO GPIO - SCL1 = GPIO_A16 - SDA1 = GPIO_A17
QRIO GPIOs act in an open-drain-like manner, for 0 GPIO drives low and for 1 the GPIO is an input and must be pulled up externaly!
Signed-off-by: Rainer Boschung rainer.boschung@keymile.com Signed-off-by: Valentin Longchamp valentin.longchamp@keymile.com ---
Changes in v2: None
board/keymile/kmp204x/kmp204x.c | 53 ++++++++++++++++++++++++++++++++++--- include/configs/km/kmp204x-common.h | 10 +++++++ 2 files changed, 60 insertions(+), 3 deletions(-)
diff --git a/board/keymile/kmp204x/kmp204x.c b/board/keymile/kmp204x/kmp204x.c index bbb2453..8d6eecb 100644 --- a/board/keymile/kmp204x/kmp204x.c +++ b/board/keymile/kmp204x/kmp204x.c @@ -33,12 +33,51 @@ int checkboard(void) return 0; }
-/* TODO: implement the I2C deblocking function */ -int i2c_make_abort(void) +/* I2C deblocking uses the algorithm defined in ../common/common.c, which + * makes use of 2 QRIO GPIOs to act on the SCL and SDA signals of an I2C bus. + * According to the standard I2C IOs must not drive HI-Levels, so the + * QRIO GPIOs are used in open-drain fashion: + * -> 0 GPIO configured as output that drives low + * -> 1 GPIO configured as input pull-up ties high + */ + +/* GPIOs used for deblocking I2C bus 1 */ +#define DBLK_PORT1 GPIO_A +#define DBLK_SCL1 16 +#define DBLK_SDA1 17 + +/* By default deblock GPIOs are floating */ +static void i2c_deblock_gpio_cfg(void) +{ + /* set I2C bus 1 deblocking GPIOs input, but 0 value for open drain */ + qrio_gpio_direction_input(DBLK_PORT1, DBLK_SCL1); + qrio_gpio_direction_input(DBLK_PORT1, DBLK_SDA1); + + qrio_set_gpio(DBLK_PORT1, DBLK_SCL1, 0); + qrio_set_gpio(DBLK_PORT1, DBLK_SDA1, 0); +} + +void set_sda(int state) +{ + qrio_set_opendrain_gpio(DBLK_PORT1, DBLK_SDA1, state); +} + +void set_scl(int state) +{ + qrio_set_opendrain_gpio(DBLK_PORT1, DBLK_SCL1, state); +} + +int get_sda(void) +{ + return qrio_get_gpio(DBLK_PORT1, DBLK_SDA1); +} + +int get_scl(void) { - return 1; + return qrio_get_gpio(DBLK_PORT1, DBLK_SCL1); }
+ #define ZL30158_RST 8 #define ZL30343_RST 9
@@ -77,6 +116,14 @@ unsigned long get_board_sys_clk(unsigned long dummy) return 66666666; }
+int misc_init_f(void) +{ + /* configure QRIO pis for i2c deblocking */ + i2c_deblock_gpio_cfg(); + + return 0; +} + #define NUM_SRDS_BANKS 2 #define PHY_RST 15
diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index e33ac90..626879a 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -211,6 +211,7 @@ unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */ +#define CONFIG_MISC_INIT_F #define CONFIG_MISC_INIT_R #define CONFIG_LAST_STAGE_INIT
@@ -266,7 +267,10 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
/* I2C */ + #define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_INIT_BOARD +#define CONFIG_SYS_I2C_SPEED 100000 /* deblocking */ #define CONFIG_SYS_NUM_I2C_BUSES 3 #define CONFIG_SYS_I2C_MAX_HOPS 1 #define CONFIG_SYS_I2C_FSL /* Use FSL I2C driver */ @@ -279,6 +283,12 @@ unsigned long get_board_sys_clk(unsigned long dummy); {0, {{I2C_MUX_PCA9547, 0x70, 1 } } }, \ {0, {{I2C_MUX_PCA9547, 0x70, 2 } } }, \ } +#ifndef __ASSEMBLY__ +void set_sda(int state); +void set_scl(int state); +int get_sda(void); +int get_scl(void); +#endif
#define CONFIG_KM_IVM_BUS 1 /* I2C1 (Mux-Port 1)*/
On 01/27/2014 02:49 AM, Valentin Longchamp wrote:
From: Rainer Boschung rainer.boschung@keymile.com
-uses common deblocking algorithm from ../common/common.c
I don't see any algorithm in the common.c file.
-supports deblocking of of I2C-bus1 by means of QRIO GPIO
- SCL1 = GPIO_A16
- SDA1 = GPIO_A17
QRIO GPIOs act in an open-drain-like manner, for 0 GPIO drives low and for 1 the GPIO is an input and must be pulled up externaly!
Signed-off-by: Rainer Boschung rainer.boschung@keymile.com Signed-off-by: Valentin Longchamp valentin.longchamp@keymile.com
Changes in v2: None
board/keymile/kmp204x/kmp204x.c | 53 ++++++++++++++++++++++++++++++++++--- include/configs/km/kmp204x-common.h | 10 +++++++ 2 files changed, 60 insertions(+), 3 deletions(-)
diff --git a/board/keymile/kmp204x/kmp204x.c b/board/keymile/kmp204x/kmp204x.c index bbb2453..8d6eecb 100644 --- a/board/keymile/kmp204x/kmp204x.c +++ b/board/keymile/kmp204x/kmp204x.c @@ -33,12 +33,51 @@ int checkboard(void) return 0; }
-/* TODO: implement the I2C deblocking function */ -int i2c_make_abort(void) +/* I2C deblocking uses the algorithm defined in ../common/common.c, which
- makes use of 2 QRIO GPIOs to act on the SCL and SDA signals of an I2C bus.
- According to the standard I2C IOs must not drive HI-Levels, so the
- QRIO GPIOs are used in open-drain fashion:
- -> 0 GPIO configured as output that drives low
- -> 1 GPIO configured as input pull-up ties high
- */
I failed to understand these comments as well. Are these comments copy-n-paste?
York
On 01/30/2014 03:30 AM, York Sun wrote:
On 01/27/2014 02:49 AM, Valentin Longchamp wrote:
From: Rainer Boschung rainer.boschung@keymile.com
-uses common deblocking algorithm from ../common/common.c
I don't see any algorithm in the common.c file.
The file is board/keymile/common/common.c, where the i2c_make_abort() and the i2c_write_start_seq() functions are defined. I guess that's what Rainer means with "algorithm".
I agree that the relative path for the file is not very fortunate and that's why you have not found the functions.
-supports deblocking of of I2C-bus1 by means of QRIO GPIO
- SCL1 = GPIO_A16
- SDA1 = GPIO_A17
QRIO GPIOs act in an open-drain-like manner, for 0 GPIO drives low and for 1 the GPIO is an input and must be pulled up externaly!
Signed-off-by: Rainer Boschung rainer.boschung@keymile.com Signed-off-by: Valentin Longchamp valentin.longchamp@keymile.com
Changes in v2: None
board/keymile/kmp204x/kmp204x.c | 53 ++++++++++++++++++++++++++++++++++--- include/configs/km/kmp204x-common.h | 10 +++++++ 2 files changed, 60 insertions(+), 3 deletions(-)
diff --git a/board/keymile/kmp204x/kmp204x.c b/board/keymile/kmp204x/kmp204x.c index bbb2453..8d6eecb 100644 --- a/board/keymile/kmp204x/kmp204x.c +++ b/board/keymile/kmp204x/kmp204x.c @@ -33,12 +33,51 @@ int checkboard(void) return 0; }
-/* TODO: implement the I2C deblocking function */ -int i2c_make_abort(void) +/* I2C deblocking uses the algorithm defined in ../common/common.c, which
- makes use of 2 QRIO GPIOs to act on the SCL and SDA signals of an I2C bus.
- According to the standard I2C IOs must not drive HI-Levels, so the
- QRIO GPIOs are used in open-drain fashion:
- -> 0 GPIO configured as output that drives low
- -> 1 GPIO configured as input pull-up ties high
- */
I failed to understand these comments as well. Are these comments copy-n-paste?
I will let Rainer answer this as he has written this comment. But I don't think it's copy-n-paste. It's maybe not very clear for people who don't know the hardware.
Valentin
On 01/30/2014 08:32 AM, Valentin Longchamp wrote:
On 01/30/2014 03:30 AM, York Sun wrote:
On 01/27/2014 02:49 AM, Valentin Longchamp wrote:
From: Rainer Boschung rainer.boschung@keymile.com
-uses common deblocking algorithm from ../common/common.c
I don't see any algorithm in the common.c file.
The file is board/keymile/common/common.c, where the i2c_make_abort() and the i2c_write_start_seq() functions are defined. I guess that's what Rainer means with "algorithm".
That is what I meant. I will add a more precise comment.
I agree that the relative path for the file is not very fortunate and that's why you have not found the functions.
-supports deblocking of of I2C-bus1 by means of QRIO GPIO
- SCL1 = GPIO_A16
- SDA1 = GPIO_A17
QRIO GPIOs act in an open-drain-like manner, for 0 GPIO drives low and for 1 the GPIO is an input and must be pulled up externaly!
Signed-off-by: Rainer Boschung rainer.boschung@keymile.com Signed-off-by: Valentin Longchamp valentin.longchamp@keymile.com
Changes in v2: None
board/keymile/kmp204x/kmp204x.c | 53 ++++++++++++++++++++++++++++++++++--- include/configs/km/kmp204x-common.h | 10 +++++++ 2 files changed, 60 insertions(+), 3 deletions(-)
diff --git a/board/keymile/kmp204x/kmp204x.c b/board/keymile/kmp204x/kmp204x.c index bbb2453..8d6eecb 100644 --- a/board/keymile/kmp204x/kmp204x.c +++ b/board/keymile/kmp204x/kmp204x.c @@ -33,12 +33,51 @@ int checkboard(void) return 0; }
-/* TODO: implement the I2C deblocking function */ -int i2c_make_abort(void) +/* I2C deblocking uses the algorithm defined in ../common/common.c, +which
- makes use of 2 QRIO GPIOs to act on the SCL and SDA signals of an I2C bus.
- According to the standard I2C IOs must not drive HI-Levels, so
+the
- QRIO GPIOs are used in open-drain fashion:
- -> 0 GPIO configured as output that drives low
- -> 1 GPIO configured as input pull-up ties high */
I failed to understand these comments as well. Are these comments copy-n-paste?
I will let Rainer answer this as he has written this comment. But I don't think it's copy-n-paste. It's maybe not very clear for people who don't know the hardware.
No the comment isn't copy-n-paste. The GPIO just drives low states, for a high states the pin is not driven (= GPIO configured as input), it is pull-up by a resistor. I will try to clarify this comment.
Valentin
Rainer
On 01/30/2014 01:17 AM, Boschung, Rainer wrote:
On 01/30/2014 08:32 AM, Valentin Longchamp wrote:
On 01/30/2014 03:30 AM, York Sun wrote:
On 01/27/2014 02:49 AM, Valentin Longchamp wrote:
From: Rainer Boschung rainer.boschung@keymile.com
-uses common deblocking algorithm from ../common/common.c
I don't see any algorithm in the common.c file.
The file is board/keymile/common/common.c, where the i2c_make_abort() and the i2c_write_start_seq() functions are defined. I guess that's what Rainer means with "algorithm".
That is what I meant. I will add a more precise comment.
Please send v3 for this patch only, or an incremental patch. I will swap/squash the patch.
York
From: Rainer Boschung rainer.boschung@keymile.com
This patch adds support for using some GPIOs that are connected to the I2C bus to force the bus lines state and perform some bus deblocking sequences.
The KM common deblocking algorithm from board/keymile/common/common.c is used. The GPIO lines used for deblocking the I2C bus are some external GPIOs provided by the QRIO CPLD: - SCL = GPIOA_20 - SDA = GPIOA_21
The QRIO GPIOs act in an open-drain-like manner, for 0 the line is driven low and for 1 the GPIO is set as input and the line gets pulled-up.
Signed-off-by: Rainer Boschung rainer.boschung@keymile.com Signed-off-by: Valentin Longchamp valentin.longchamp@keymile.com
---
Changes in v3: - rewrite the commit message and and the comments for more clarity - fix the GPIO numbers that where not correct
Changes in v2: None
board/keymile/kmp204x/kmp204x.c | 53 ++++++++++++++++++++++++++++++++++--- include/configs/km/kmp204x-common.h | 10 +++++++ 2 files changed, 60 insertions(+), 3 deletions(-)
diff --git a/board/keymile/kmp204x/kmp204x.c b/board/keymile/kmp204x/kmp204x.c index bbb2453..726d26e 100644 --- a/board/keymile/kmp204x/kmp204x.c +++ b/board/keymile/kmp204x/kmp204x.c @@ -33,12 +33,51 @@ int checkboard(void) return 0; }
-/* TODO: implement the I2C deblocking function */ -int i2c_make_abort(void) +/* I2C deblocking uses the algorithm defined in board/keymile/common/common.c + * 2 dedicated QRIO GPIOs externally pull the SCL and SDA lines + * For I2C only the low state is activly driven and high state is pulled-up + * by a resistor. Therefore the deblock GPIOs are used + * -> as an active output to drive a low state + * -> as an open-drain input to have a pulled-up high state + */ + +/* QRIO GPIOs used for deblocking */ +#define DEBLOCK_PORT1 GPIO_A +#define DEBLOCK_SCL1 20 +#define DEBLOCK_SDA1 21 + +/* By default deblock GPIOs are floating */ +static void i2c_deblock_gpio_cfg(void) +{ + /* set I2C bus 1 deblocking GPIOs input, but 0 value for open drain */ + qrio_gpio_direction_input(DBLK_PORT1, DBLK_SCL1); + qrio_gpio_direction_input(DBLK_PORT1, DBLK_SDA1); + + qrio_set_gpio(DBLK_PORT1, DBLK_SCL1, 0); + qrio_set_gpio(DBLK_PORT1, DBLK_SDA1, 0); +} + +void set_sda(int state) +{ + qrio_set_opendrain_gpio(DBLK_PORT1, DBLK_SDA1, state); +} + +void set_scl(int state) +{ + qrio_set_opendrain_gpio(DBLK_PORT1, DBLK_SCL1, state); +} + +int get_sda(void) +{ + return qrio_get_gpio(DBLK_PORT1, DBLK_SDA1); +} + +int get_scl(void) { - return 1; + return qrio_get_gpio(DBLK_PORT1, DBLK_SCL1); }
+ #define ZL30158_RST 8 #define ZL30343_RST 9
@@ -77,6 +116,14 @@ unsigned long get_board_sys_clk(unsigned long dummy) return 66666666; }
+int misc_init_f(void) +{ + /* configure QRIO pis for i2c deblocking */ + i2c_deblock_gpio_cfg(); + + return 0; +} + #define NUM_SRDS_BANKS 2 #define PHY_RST 15
diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index e33ac90..626879a 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -211,6 +211,7 @@ unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */ +#define CONFIG_MISC_INIT_F #define CONFIG_MISC_INIT_R #define CONFIG_LAST_STAGE_INIT
@@ -266,7 +267,10 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
/* I2C */ + #define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_INIT_BOARD +#define CONFIG_SYS_I2C_SPEED 100000 /* deblocking */ #define CONFIG_SYS_NUM_I2C_BUSES 3 #define CONFIG_SYS_I2C_MAX_HOPS 1 #define CONFIG_SYS_I2C_FSL /* Use FSL I2C driver */ @@ -279,6 +283,12 @@ unsigned long get_board_sys_clk(unsigned long dummy); {0, {{I2C_MUX_PCA9547, 0x70, 1 } } }, \ {0, {{I2C_MUX_PCA9547, 0x70, 2 } } }, \ } +#ifndef __ASSEMBLY__ +void set_sda(int state); +void set_scl(int state); +int get_sda(void); +int get_scl(void); +#endif
#define CONFIG_KM_IVM_BUS 1 /* I2C1 (Mux-Port 1)*/
On 01/31/2014 04:46 AM, Valentin Longchamp wrote:
From: Rainer Boschung rainer.boschung@keymile.com
This patch adds support for using some GPIOs that are connected to the I2C bus to force the bus lines state and perform some bus deblocking sequences.
The KM common deblocking algorithm from board/keymile/common/common.c is used. The GPIO lines used for deblocking the I2C bus are some external GPIOs provided by the QRIO CPLD:
- SCL = GPIOA_20
- SDA = GPIOA_21
The QRIO GPIOs act in an open-drain-like manner, for 0 the line is driven low and for 1 the GPIO is set as input and the line gets pulled-up.
Signed-off-by: Rainer Boschung rainer.boschung@keymile.com Signed-off-by: Valentin Longchamp valentin.longchamp@keymile.com
Changes in v3:
- rewrite the commit message and and the comments for more clarity
- fix the GPIO numbers that where not correct
Changes in v2: None
board/keymile/kmp204x/kmp204x.c | 53 ++++++++++++++++++++++++++++++++++--- include/configs/km/kmp204x-common.h | 10 +++++++ 2 files changed, 60 insertions(+), 3 deletions(-)
diff --git a/board/keymile/kmp204x/kmp204x.c b/board/keymile/kmp204x/kmp204x.c index bbb2453..726d26e 100644 --- a/board/keymile/kmp204x/kmp204x.c +++ b/board/keymile/kmp204x/kmp204x.c @@ -33,12 +33,51 @@ int checkboard(void) return 0; }
-/* TODO: implement the I2C deblocking function */ -int i2c_make_abort(void) +/* I2C deblocking uses the algorithm defined in board/keymile/common/common.c
- 2 dedicated QRIO GPIOs externally pull the SCL and SDA lines
- For I2C only the low state is activly driven and high state is pulled-up
- by a resistor. Therefore the deblock GPIOs are used
- -> as an active output to drive a low state
- -> as an open-drain input to have a pulled-up high state
- */
+/* QRIO GPIOs used for deblocking */ +#define DEBLOCK_PORT1 GPIO_A +#define DEBLOCK_SCL1 20 +#define DEBLOCK_SDA1 21
You changed these macros but didn't change those below. This causes compiling errors. Please fix it and compile before sending v4.
+/* By default deblock GPIOs are floating */ +static void i2c_deblock_gpio_cfg(void) +{
- /* set I2C bus 1 deblocking GPIOs input, but 0 value for open drain */
- qrio_gpio_direction_input(DBLK_PORT1, DBLK_SCL1);
- qrio_gpio_direction_input(DBLK_PORT1, DBLK_SDA1);
- qrio_set_gpio(DBLK_PORT1, DBLK_SCL1, 0);
- qrio_set_gpio(DBLK_PORT1, DBLK_SDA1, 0);
+}
York
From: Rainer Boschung rainer.boschung@keymile.com
This patch adds support for using some GPIOs that are connected to the I2C bus to force the bus lines state and perform some bus deblocking sequences.
The KM common deblocking algorithm from board/keymile/common/common.c is used. The GPIO lines used for deblocking the I2C bus are some external GPIOs provided by the QRIO CPLD: - SCL = GPIOA_20 - SDA = GPIOA_21
The QRIO GPIOs act in an open-drain-like manner, for 0 the line is driven low and for 1 the GPIO is set as input and the line gets pulled-up.
Signed-off-by: Rainer Boschung rainer.boschung@keymile.com Signed-off-by: Valentin Longchamp valentin.longchamp@keymile.com
---
Changes in v4: - fix usage of the #define names that got wrong in the merge process
Changes in v3: - rewrite the commit message and and the comments for more clarity - fix the GPIO numbers that where not correct
Changes in v2: None
board/keymile/kmp204x/kmp204x.c | 53 ++++++++++++++++++++++++++++++++++--- include/configs/km/kmp204x-common.h | 10 +++++++ 2 files changed, 60 insertions(+), 3 deletions(-)
diff --git a/board/keymile/kmp204x/kmp204x.c b/board/keymile/kmp204x/kmp204x.c index bbb2453..a6c23a2 100644 --- a/board/keymile/kmp204x/kmp204x.c +++ b/board/keymile/kmp204x/kmp204x.c @@ -33,12 +33,51 @@ int checkboard(void) return 0; }
-/* TODO: implement the I2C deblocking function */ -int i2c_make_abort(void) +/* I2C deblocking uses the algorithm defined in board/keymile/common/common.c + * 2 dedicated QRIO GPIOs externally pull the SCL and SDA lines + * For I2C only the low state is activly driven and high state is pulled-up + * by a resistor. Therefore the deblock GPIOs are used + * -> as an active output to drive a low state + * -> as an open-drain input to have a pulled-up high state + */ + +/* QRIO GPIOs used for deblocking */ +#define DEBLOCK_PORT1 GPIO_A +#define DEBLOCK_SCL1 20 +#define DEBLOCK_SDA1 21 + +/* By default deblock GPIOs are floating */ +static void i2c_deblock_gpio_cfg(void) +{ + /* set I2C bus 1 deblocking GPIOs input, but 0 value for open drain */ + qrio_gpio_direction_input(DEBLOCK_PORT1, DEBLOCK_SCL1); + qrio_gpio_direction_input(DEBLOCK_PORT1, DEBLOCK_SDA1); + + qrio_set_gpio(DEBLOCK_PORT1, DEBLOCK_SCL1, 0); + qrio_set_gpio(DEBLOCK_PORT1, DEBLOCK_SDA1, 0); +} + +void set_sda(int state) +{ + qrio_set_opendrain_gpio(DEBLOCK_PORT1, DEBLOCK_SDA1, state); +} + +void set_scl(int state) +{ + qrio_set_opendrain_gpio(DEBLOCK_PORT1, DEBLOCK_SCL1, state); +} + +int get_sda(void) +{ + return qrio_get_gpio(DEBLOCK_PORT1, DEBLOCK_SDA1); +} + +int get_scl(void) { - return 1; + return qrio_get_gpio(DEBLOCK_PORT1, DEBLOCK_SCL1); }
+ #define ZL30158_RST 8 #define ZL30343_RST 9
@@ -77,6 +116,14 @@ unsigned long get_board_sys_clk(unsigned long dummy) return 66666666; }
+int misc_init_f(void) +{ + /* configure QRIO pis for i2c deblocking */ + i2c_deblock_gpio_cfg(); + + return 0; +} + #define NUM_SRDS_BANKS 2 #define PHY_RST 15
diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index e33ac90..626879a 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -211,6 +211,7 @@ unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */ +#define CONFIG_MISC_INIT_F #define CONFIG_MISC_INIT_R #define CONFIG_LAST_STAGE_INIT
@@ -266,7 +267,10 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
/* I2C */ + #define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_INIT_BOARD +#define CONFIG_SYS_I2C_SPEED 100000 /* deblocking */ #define CONFIG_SYS_NUM_I2C_BUSES 3 #define CONFIG_SYS_I2C_MAX_HOPS 1 #define CONFIG_SYS_I2C_FSL /* Use FSL I2C driver */ @@ -279,6 +283,12 @@ unsigned long get_board_sys_clk(unsigned long dummy); {0, {{I2C_MUX_PCA9547, 0x70, 1 } } }, \ {0, {{I2C_MUX_PCA9547, 0x70, 2 } } }, \ } +#ifndef __ASSEMBLY__ +void set_sda(int state); +void set_scl(int state); +int get_sda(void); +int get_scl(void); +#endif
#define CONFIG_KM_IVM_BUS 1 /* I2C1 (Mux-Port 1)*/
On 02/02/2014 11:45 PM, Valentin Longchamp wrote:
From: Rainer Boschung rainer.boschung@keymile.com
This patch adds support for using some GPIOs that are connected to the I2C bus to force the bus lines state and perform some bus deblocking sequences.
The KM common deblocking algorithm from board/keymile/common/common.c is used. The GPIO lines used for deblocking the I2C bus are some external GPIOs provided by the QRIO CPLD:
- SCL = GPIOA_20
- SDA = GPIOA_21
The QRIO GPIOs act in an open-drain-like manner, for 0 the line is driven low and for 1 the GPIO is set as input and the line gets pulled-up.
Signed-off-by: Rainer Boschung rainer.boschung@keymile.com Signed-off-by: Valentin Longchamp valentin.longchamp@keymile.com
Changes in v4:
- fix usage of the #define names that got wrong in the merge process
Changes in v3:
- rewrite the commit message and and the comments for more clarity
- fix the GPIO numbers that where not correct
Changes in v2: None
Applied to u-boot-mpc85xx master branch.
York
According to the errata, some bits of an undocumented register in the DCSR must be set for every core in order to avoid a possible data or instruction corruption.
This is required for the 2.0 revision of the P2041 that should be used as soon as available in our design.
Signed-off-by: Valentin Longchamp valentin.longchamp@keymile.com ---
Changes in v2: None
board/keymile/kmp204x/pbi.cfg | 10 ++++++++++ 1 file changed, 10 insertions(+)
diff --git a/board/keymile/kmp204x/pbi.cfg b/board/keymile/kmp204x/pbi.cfg index f38dcf9..9af8bd5 100644 --- a/board/keymile/kmp204x/pbi.cfg +++ b/board/keymile/kmp204x/pbi.cfg @@ -8,6 +8,16 @@ #
#PBI commands +#Workaround for A-006559 needed for rev 2.0 of P2041 silicon +#Freescale's errarta sheet suggests it may be done with PBI +09000010 00000000 +09000014 00000000 +09000018 81d00000 +09021008 0000f000 +09021028 0000f000 +09021048 0000f000 +09021068 0000f000 +09000018 00000000 #Initialize CPC1 as 1MB SRAM 09010000 00200400 09138000 00000000
On 01/27/2014 02:49 AM, Valentin Longchamp wrote:
According to the errata, some bits of an undocumented register in the DCSR must be set for every core in order to avoid a possible data or instruction corruption.
This is required for the 2.0 revision of the P2041 that should be used as soon as available in our design.
Signed-off-by: Valentin Longchamp valentin.longchamp@keymile.com
Changes in v2: None
Applied to u-boot-mpc85xx master branch.
York
The kmcoge4 board is the product board derived from the kmlion1 prototype. The main difference between the 2 boards is that the kmcoge4 does not configure the Local Bus controller for LCS2.
Signed-off-by: Valentin Longchamp valentin.longchamp@keymile.com ---
Changes in v2: None
boards.cfg | 1 + include/configs/kmp204x.h | 7 ++++++- 2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/boards.cfg b/boards.cfg index d177f82..4198ccf 100644 --- a/boards.cfg +++ b/boards.cfg @@ -991,6 +991,7 @@ Active powerpc mpc85xx - gdsys p1022 Active powerpc mpc85xx - gdsys p1022 controlcenterd_TRAILBLAZER controlcenterd:TRAILBLAZER,SPIFLASH Dirk Eibach eibach@gdsys.de Active powerpc mpc85xx - gdsys p1022 controlcenterd_TRAILBLAZER_DEVELOP controlcenterd:TRAILBLAZER,SPIFLASH,DEVELOP Dirk Eibach eibach@gdsys.de Active powerpc mpc85xx - keymile kmp204x kmlion1 kmp204x:KMLION1 Valentin Longchamp valentin.longchamp@keymile.com +Active powerpc mpc85xx - keymile kmp204x kmcoge4 kmp204x:KMCOGE4 Valentin Longchamp valentin.longchamp@keymile.com Active powerpc mpc85xx - stx stxgp3 stxgp3 - Dan Malek dan@embeddedalley.com Active powerpc mpc85xx - stx stxssa stxssa stxssa Dan Malek dan@embeddedalley.com Active powerpc mpc85xx - stx stxssa stxssa_4M stxssa:STXSSA_4M Dan Malek dan@embeddedalley.com diff --git a/include/configs/kmp204x.h b/include/configs/kmp204x.h index 4158c8d..8bb3571 100644 --- a/include/configs/kmp204x.h +++ b/include/configs/kmp204x.h @@ -13,6 +13,11 @@ #define CONFIG_HOSTNAME kmlion1 #define CONFIG_KM_BOARD_NAME "kmlion1"
+/* KMCOGE4 */ +#elif defined(CONFIG_KMCOGE4) +#define CONFIG_HOSTNAME kmcoge4 +#define CONFIG_KM_BOARD_NAME "kmcoge4" + #else #error ("Board not supported") #endif @@ -42,6 +47,7 @@ #define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_LBAPP1_BR_PRELIM /* Local bus app1 Options */ #define CONFIG_SYS_OR2_PRELIM CONFIG_SYS_LBAPP1_OR_PRELIM +#endif
/* App2 Local bus */ #define CONFIG_SYS_LBAPP2_BASE 0xE0000000 @@ -63,6 +69,5 @@ #define CONFIG_SYS_BR3_PRELIM CONFIG_SYS_LBAPP2_BR_PRELIM /* Local bus app2 Options */ #define CONFIG_SYS_OR3_PRELIM CONFIG_SYS_LBAPP2_OR_PRELIM -#endif
#endif /* __CONFIG_H */
On 01/27/2014 02:49 AM, Valentin Longchamp wrote:
The kmcoge4 board is the product board derived from the kmlion1 prototype. The main difference between the 2 boards is that the kmcoge4 does not configure the Local Bus controller for LCS2.
Signed-off-by: Valentin Longchamp valentin.longchamp@keymile.com
Changes in v2: None
Applied to u-boot-mpc85xx master branch.
York
On the previous HW revision (now unsupported), there was a need for external DMA signals and thus the I2C3/4 signals were used DMA1_DONE/ACK/REQ.
These signals now are configured as GPIO[16:19].
Signed-off-by: Valentin Longchamp valentin.longchamp@keymile.com ---
Changes in v2: None
board/keymile/kmp204x/rcw_kmp204x.cfg | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/keymile/kmp204x/rcw_kmp204x.cfg b/board/keymile/kmp204x/rcw_kmp204x.cfg index f2b7fe3..2d4c48c 100644 --- a/board/keymile/kmp204x/rcw_kmp204x.cfg +++ b/board/keymile/kmp204x/rcw_kmp204x.cfg @@ -7,5 +7,5 @@ aa55aa55 010e0100 #64 bytes RCW data 14600000 00000000 28200000 00000000 148E70CF CFC02000 58000000 41000000 -00000000 00000000 00000000 F4428002 +00000000 00000000 00000000 F0428002 00000000 00000000 00000000 00000000
On 01/27/2014 02:49 AM, Valentin Longchamp wrote:
On the previous HW revision (now unsupported), there was a need for external DMA signals and thus the I2C3/4 signals were used DMA1_DONE/ACK/REQ.
These signals now are configured as GPIO[16:19].
Signed-off-by: Valentin Longchamp valentin.longchamp@keymile.com
Changes in v2: None
Applied to u-boot-mpc85xx master branch.
York
This define can be used if the ubi boot partition (defined for all Keymile boards with KM_UBI_PARTITION_NAME_BOOT #define to ubi0) needs some additionnal boot options.
This is the case for the kmp204x boards since u-boot does not support NAND Flash subpage accesses on this platform, an additionnal argument that defines the VID offstet must be given to the kernel.
The UBI cmd line option now looks like this "ubi.mtd=ubi0,2048" on this platform.
Signed-off-by: Valentin Longchamp valentin.longchamp@keymile.com ---
Changes in v2: None
include/configs/km/keymile-common.h | 10 ++++++++-- include/configs/km/kmp204x-common.h | 4 ++++ 2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h index 2a15ad4..a4e0f7c 100644 --- a/include/configs/km/keymile-common.h +++ b/include/configs/km/keymile-common.h @@ -99,11 +99,16 @@ #define CONFIG_KM_UBI_PARTITION_NAME_BOOT "ubi0" #endif /* CONFIG_KM_UBI_PARTITION_NAME_BOOT */
+#ifndef CONFIG_KM_UBI_PART_BOOT_OPTS +#define CONFIG_KM_UBI_PART_BOOT_OPTS "" +#endif /* CONFIG_KM_UBI_PART_BOOT_OPTS */ + #ifndef CONFIG_KM_UBI_PARTITION_NAME_APP /* one flash chip only called boot */ /* boot: CONFIG_KM_UBI_PARTITION_NAME_BOOT */ # define CONFIG_KM_UBI_LINUX_MTD \ - "ubi.mtd=" CONFIG_KM_UBI_PARTITION_NAME_BOOT + "ubi.mtd=" CONFIG_KM_UBI_PARTITION_NAME_BOOT \ + CONFIG_KM_UBI_PART_BOOT_OPTS # define CONFIG_KM_DEV_ENV_FLASH_BOOT_UBI \ "ubiattach=ubi part " CONFIG_KM_UBI_PARTITION_NAME_BOOT "\0" #else /* CONFIG_KM_UBI_PARTITION_NAME_APP */ @@ -111,7 +116,8 @@ /* boot: CONFIG_KM_UBI_PARTITION_NAME_BOOT */ /* app: CONFIG_KM_UBI_PARTITION_NAME_APP */ # define CONFIG_KM_UBI_LINUX_MTD \ - "ubi.mtd=" CONFIG_KM_UBI_PARTITION_NAME_BOOT " " \ + "ubi.mtd=" CONFIG_KM_UBI_PARTITION_NAME_BOOT \ + CONFIG_KM_UBI_PART_BOOT_OPTS " " \ "ubi.mtd=" CONFIG_KM_UBI_PARTITION_NAME_APP # define CONFIG_KM_DEV_ENV_FLASH_BOOT_UBI \ "ubiattach=if test ${boot_bank} -eq 0; then; " \ diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index 626879a..ac7c2e3 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -15,6 +15,10 @@
#define CONFIG_KM_DEF_NETDEV "netdev=eth0\0"
+/* an additionnal option is required for UBI as subpage access is + * supported in u-boot */ +#define CONFIG_KM_UBI_PART_BOOT_OPTS ",2048" + #define CONFIG_NAND_ECC_BCH
/* common KM defines */
On 01/27/2014 02:49 AM, Valentin Longchamp wrote:
This define can be used if the ubi boot partition (defined for all Keymile boards with KM_UBI_PARTITION_NAME_BOOT #define to ubi0) needs some additionnal boot options.
This is the case for the kmp204x boards since u-boot does not support NAND Flash subpage accesses on this platform, an additionnal argument that defines the VID offstet must be given to the kernel.
The UBI cmd line option now looks like this "ubi.mtd=ubi0,2048" on this platform.
Signed-off-by: Valentin Longchamp valentin.longchamp@keymile.com
Changes in v2: None
Applied to u-boot-mpc85xx master branch.
York
The new prototype and the final series was moved from Micron to Spansion to have a better reset sequence that is easier to support.
Signed-off-by: Valentin Longchamp valentin.longchamp@keymile.com ---
Changes in v2: None
include/configs/km/kmp204x-common.h | 1 + 1 file changed, 1 insertion(+)
diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index ac7c2e3..c856338 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -303,6 +303,7 @@ int get_scl(void); #define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_BAR /* 4 byte-addressing */ #define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SPI_FLASH_SPANSION #define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_SPEED 20000000 #define CONFIG_SF_DEFAULT_MODE 0
On 01/27/2014 02:49 AM, Valentin Longchamp wrote:
The new prototype and the final series was moved from Micron to Spansion to have a better reset sequence that is easier to support.
Signed-off-by: Valentin Longchamp valentin.longchamp@keymile.com
Changes in v2: None
Applied to u-boot-mpc85xx master branch.
York
The PEXHC PCIe configuration mechanism ensures that the FPGA get configured at power-up. Since all the PCIe devices should be configured when the kernel start, u-boot has to take care that the FPGA gets configured also in other reset scenarios, mostly because of possible configuration change.
The used mechanism is taken from the km_kirkwood design and adapted to the kmp204x case (slightly different HW and PCIe configuration).
Signed-off-by: Valentin Longchamp valentin.longchamp@keymile.com ---
Changes in v2: None
board/keymile/kmp204x/kmp204x.c | 7 +++- board/keymile/kmp204x/pci.c | 85 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 91 insertions(+), 1 deletion(-)
diff --git a/board/keymile/kmp204x/kmp204x.c b/board/keymile/kmp204x/kmp204x.c index 8d6eecb..17d35a4 100644 --- a/board/keymile/kmp204x/kmp204x.c +++ b/board/keymile/kmp204x/kmp204x.c @@ -101,6 +101,7 @@ int board_early_init_f(void)
int board_early_init_r(void) { + int ret = 0; /* Flush d-cache and invalidate i-cache of any FLASH data */ flush_dcache(); invalidate_icache(); @@ -108,7 +109,11 @@ int board_early_init_r(void) set_liodns(); setup_portals();
- return 0; + ret = trigger_fpga_config(); + if (ret) + printf("error triggering PCIe FPGA config\n"); + + return ret; }
unsigned long get_board_sys_clk(unsigned long dummy) diff --git a/board/keymile/kmp204x/pci.c b/board/keymile/kmp204x/pci.c index ec20c8a..a484eb5 100644 --- a/board/keymile/kmp204x/pci.c +++ b/board/keymile/kmp204x/pci.c @@ -14,18 +14,103 @@ #include <libfdt.h> #include <fdt_support.h> #include <asm/fsl_serdes.h> +#include <asm/errno.h>
#include "kmp204x.h"
+#define PROM_SEL_L 11 +/* control the PROM_SEL_L signal*/ +static void toggle_fpga_eeprom_bus(bool cpu_own) +{ + qrio_gpio_direction_output(GPIO_A, PROM_SEL_L, !cpu_own); +} + +#define CONF_SEL_L 10 +#define FPGA_PROG_L 19 +#define FPGA_DONE 18 +#define FPGA_INIT_L 17 + +int trigger_fpga_config(void) +{ + int ret = 0, init_l; + /* approx 10ms */ + u32 timeout = 10000; + + /* make sure the FPGA_can access the EEPROM */ + toggle_fpga_eeprom_bus(false); + + /* assert CONF_SEL_L to be able to drive FPGA_PROG_L */ + qrio_gpio_direction_output(GPIO_A, CONF_SEL_L, 0); + + /* trigger the config start */ + qrio_gpio_direction_output(GPIO_A, FPGA_PROG_L, 0); + + /* small delay for INIT_L line */ + udelay(10); + + /* wait for FPGA_INIT to be asserted */ + do { + init_l = qrio_get_gpio(GPIO_A, FPGA_INIT_L); + if (timeout-- == 0) { + printf("FPGA_INIT timeout\n"); + ret = -EFAULT; + break; + } + udelay(10); + } while (init_l); + + /* deassert FPGA_PROG, config should start */ + qrio_set_gpio(GPIO_A, FPGA_PROG_L, 1); + + return ret; +} + +/* poll the FPGA_DONE signal and give the EEPROM back to the QorIQ */ +static int wait_for_fpga_config(void) +{ + int ret = 0, done; + /* approx 5 s */ + u32 timeout = 500000; + + printf("PCIe FPGA config:"); + do { + done = qrio_get_gpio(GPIO_A, FPGA_DONE); + if (timeout-- == 0) { + printf(" FPGA_DONE timeout\n"); + ret = -EFAULT; + goto err_out; + } + udelay(10); + } while (!done); + + printf(" done\n"); + +err_out: + /* deactive CONF_SEL and give the CPU conf EEPROM access */ + qrio_set_gpio(GPIO_A, CONF_SEL_L, 1); + toggle_fpga_eeprom_bus(true); + + return ret; +} + #define PCIE_SW_RST 14 +#define PEXHC_SW_RST 13 #define HOOPER_SW_RST 12
void pci_init_board(void) { + /* first wait for the PCIe FPGA to be configured + * it has been triggered earlier in board_early_init_r */ + int ret = wait_for_fpga_config(); + if (ret) + printf("error finishing PCIe FPGA config\n"); + qrio_prst(PCIE_SW_RST, false, false); + qrio_prst(PEXHC_SW_RST, false, false); qrio_prst(HOOPER_SW_RST, false, false); /* Hooper is not direcly PCIe capable */ mdelay(50); + fsl_pcie_init_board(0); }
On 01/27/2014 02:49 AM, Valentin Longchamp wrote:
The PEXHC PCIe configuration mechanism ensures that the FPGA get configured at power-up. Since all the PCIe devices should be configured when the kernel start, u-boot has to take care that the FPGA gets configured also in other reset scenarios, mostly because of possible configuration change.
The used mechanism is taken from the km_kirkwood design and adapted to the kmp204x case (slightly different HW and PCIe configuration).
Signed-off-by: Valentin Longchamp valentin.longchamp@keymile.com
Changes in v2: None
Applied to u-boot-mpc85xx master branch.
York
participants (3)
-
Boschung, Rainer -
Valentin Longchamp -
York Sun