From: Jagan Teki jagan@amarulasolutions.com

Fix to give space on of and bs on dd command, on mx6sabresd README.

Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Cc: Stefano Babic sbabic@denx.de Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/freescale/mx6sabresd/README | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/freescale/mx6sabresd/README b/board/freescale/mx6sabresd/README index 5814b9d..43070e1 100644 --- a/board/freescale/mx6sabresd/README +++ b/board/freescale/mx6sabresd/README @@ -45,7 +45,7 @@ $ sudo dd if=SPL of=/dev/sdb bs=1K seek=1 && sync

- Flash the u-boot.img image into the SD card:

-$ sudo dd if=u-boot.img of=/dev/sdbbs=1K seek=69 && sync +$ sudo dd if=u-boot.img of=/dev/sdb bs=1K seek=69 && sync

3. Booting via Falcon mode @@ -62,7 +62,7 @@ $ sudo dd if=SPL of=/dev/sdb bs=1K seek=1 oflag=sync status=none && sync

- Flash the u-boot.img image into the SD card:

-$ sudo dd if=u-boot.img of=/dev/sdbbs=1K seek=69 oflag=sync status=none && sync +$ sudo dd if=u-boot.img of=/dev/sdb bs=1K seek=69 oflag=sync status=none && sync

Create a partition for root file system and extract it there:

From: Jagan Teki jagan@amarulasolutions.com

Add initial dts support for i.MX6 Quad Sabresd board.

Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam fabio.estevam@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/dts/Makefile | 1 + arch/arm/dts/imx6q-sabresd.dts | 21 +++++++++++++++++++++ 2 files changed, 22 insertions(+) create mode 100644 arch/arm/dts/imx6q-sabresd.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index aa0bd12..18b1ee6 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -317,6 +317,7 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \ imx6dl-icore-rqs.dtb \ imx6q-icore.dtb \ imx6q-icore-rqs.dtb \ + imx6q-sabresd.dtb \ imx6sx-sabreauto.dtb \ imx6ul-geam-kit.dtb \ imx6ul-isiot-emmc.dtb \ diff --git a/arch/arm/dts/imx6q-sabresd.dts b/arch/arm/dts/imx6q-sabresd.dts new file mode 100644 index 0000000..5e62c24 --- /dev/null +++ b/arch/arm/dts/imx6q-sabresd.dts @@ -0,0 +1,21 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * Copyright 2011 Linaro Ltd. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; + +#include "imx6q.dtsi" +#include "imx6qdl-sabresd.dtsi" + +/ { + model = "Freescale i.MX6 Quad SABRE Smart Device Board"; + compatible = "fsl,imx6q-sabresd", "fsl,imx6q"; +};

From: Jagan Teki jagan@amarulasolutions.com

Add initial devicetree support for i.MX6 Quad Sabresd board.

The configs item are copied from configs/mx6sabresd_spl_defconfig and added - CONFIG_OF_CONTROL=y - CONFIG_DM_GPIO=y - CONFIG_DM_MMC=y - CONFIG_BLK is not set - CONFIG_DM_MMC_OPS is not set - CONFIG_PINCTRL=y - CONFIG_PINCTRL_IMX6=y

Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam fabio.estevam@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/freescale/mx6sabresd/MAINTAINERS | 1 + board/freescale/mx6sabresd/mx6sabresd.c | 122 +++++++++++++++++++++----------- configs/imx6q_sabresd_defconfig | 58 +++++++++++++++ include/configs/mx6sabresd.h | 4 ++ 4 files changed, 145 insertions(+), 40 deletions(-) create mode 100644 configs/imx6q_sabresd_defconfig

diff --git a/board/freescale/mx6sabresd/MAINTAINERS b/board/freescale/mx6sabresd/MAINTAINERS index add2314..434548a 100644 --- a/board/freescale/mx6sabresd/MAINTAINERS +++ b/board/freescale/mx6sabresd/MAINTAINERS @@ -6,3 +6,4 @@ F: include/configs/mx6sabresd.h F: configs/mx6dlsabresd_defconfig F: configs/mx6qsabresd_defconfig F: configs/mx6sabresd_spl_defconfig +F: configs/imx6q_sabresd_defconfig diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index 80a7789..db25dad 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -241,7 +241,7 @@ static void setup_iomux_uart(void) imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); }

-#ifdef CONFIG_FSL_ESDHC +#if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_OF_CONTROL) struct fsl_esdhc_cfg usdhc_cfg[3] = { {USDHC2_BASE_ADDR}, {USDHC3_BASE_ADDR}, @@ -276,9 +276,9 @@ int board_mmc_getcd(struct mmc *mmc) return ret; }

+#ifndef CONFIG_FSL_ESDHC int board_mmc_init(bd_t *bis) { -#ifndef CONFIG_SPL_BUILD int ret; int i;

@@ -321,46 +321,9 @@ int board_mmc_init(bd_t *bis) }

return 0; -#else - struct src *psrc = (struct src *)SRC_BASE_ADDR; - unsigned reg = readl(&psrc->sbmr1) >> 11; - /* - * Upon reading BOOT_CFG register the following map is done: - * Bit 11 and 12 of BOOT_CFG register can determine the current - * mmc port - * 0x1 SD1 - * 0x2 SD2 - * 0x3 SD4 - */ - - switch (reg & 0x3) { - case 0x1: - imx_iomux_v3_setup_multiple_pads( - usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); - usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR; - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); - gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk; - break; - case 0x2: - imx_iomux_v3_setup_multiple_pads( - usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); - usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR; - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); - gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk; - break; - case 0x3: - imx_iomux_v3_setup_multiple_pads( - usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); - usdhc_cfg[0].esdhc_base = USDHC4_BASE_ADDR; - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); - gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk; - break; - } - - return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); -#endif } #endif +#endif

static int ar8031_phy_fixup(struct phy_device *phydev) { @@ -717,6 +680,85 @@ int checkboard(void) #include <spl.h> #include <libfdt.h>

+#ifdef CONFIG_FSL_ESDHC + +#if defined(CONFIG_OF_CONTROL) && !defined(CONFIG_DM_MMC) +struct fsl_esdhc_cfg usdhc_cfg[3] = { + {USDHC2_BASE_ADDR}, + {USDHC3_BASE_ADDR}, + {USDHC4_BASE_ADDR}, +}; + +#define USDHC2_CD_GPIO IMX_GPIO_NR(2, 2) +#define USDHC3_CD_GPIO IMX_GPIO_NR(2, 0) + +int board_mmc_get_env_dev(int devno) +{ + return devno - 1; +} + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int ret = 0; + + switch (cfg->esdhc_base) { + case USDHC2_BASE_ADDR: + ret = !gpio_get_value(USDHC2_CD_GPIO); + break; + case USDHC3_BASE_ADDR: + ret = !gpio_get_value(USDHC3_CD_GPIO); + break; + case USDHC4_BASE_ADDR: + ret = 1; /* eMMC/uSDHC4 is always present */ + break; + } + + return ret; +} +#endif + +int board_mmc_init(bd_t *bis) +{ + struct src *psrc = (struct src *)SRC_BASE_ADDR; + unsigned reg = readl(&psrc->sbmr1) >> 11; + /* + * Upon reading BOOT_CFG register the following map is done: + * Bit 11 and 12 of BOOT_CFG register can determine the current + * mmc port + * 0x1 SD1 + * 0x2 SD2 + * 0x3 SD4 + */ + + switch (reg & 0x3) { + case 0x1: + imx_iomux_v3_setup_multiple_pads( + usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); + usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR; + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); + gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk; + break; + case 0x2: + imx_iomux_v3_setup_multiple_pads( + usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); + usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR; + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk; + break; + case 0x3: + imx_iomux_v3_setup_multiple_pads( + usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); + usdhc_cfg[0].esdhc_base = USDHC4_BASE_ADDR; + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk; + break; + } + + return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); +} +#endif + #ifdef CONFIG_SPL_OS_BOOT int spl_start_uboot(void) { diff --git a/configs/imx6q_sabresd_defconfig b/configs/imx6q_sabresd_defconfig new file mode 100644 index 0000000..c6d4462 --- /dev/null +++ b/configs/imx6q_sabresd_defconfig @@ -0,0 +1,58 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_TARGET_MX6SABRESD=y +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_VIDEO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabresd" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6Q" +CONFIG_BOOTDELAY=3 +# CONFIG_CONSOLE_MUX is not set +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y +CONFIG_SPL=y +CONFIG_SPL_EXT_SUPPORT=y +CONFIG_SPL_OS_BOOT=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_I2C=y +CONFIG_CMD_USB=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PCI=y +CONFIG_USB=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_CI_UDC=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_G_DNL_MANUFACTURER="FSL" +CONFIG_G_DNL_VENDOR_NUM=0x0525 +CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 +# CONFIG_VIDEO_SW_CURSOR is not set +CONFIG_OF_LIBFDT=y +CONFIG_OF_CONTROL=y +CONFIG_DM_GPIO=y +CONFIG_DM_MMC=y +# CONFIG_BLK is not set +# CONFIG_DM_MMC_OPS is not set +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 598ab9a..9885a5c 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -11,6 +11,10 @@

#ifdef CONFIG_SPL #include "imx6_spl.h" +# ifdef CONFIG_SPL_BUILD +# undef CONFIG_DM_GPIO +# undef CONFIG_DM_MMC +# endif #endif

#define CONFIG_MACH_TYPE 3980

From: Jagan Teki jagan@amarulasolutions.com

Add initial dts support for i.MX6 Quad Plus Sabresd board.

Boot from MMC: ------------- U-Boot SPL 2017.03-33690-ga80e4f6-dirty (Mar 30 2017 - 00:40:29) Trying to boot from MMC1

U-Boot 2017.03-33690-ga80e4f6-dirty (Mar 30 2017 - 00:40:29 +0530)

CPU: Freescale i.MX6QP rev1.0 996 MHz (running at 792 MHz) CPU: Automotive temperature grade (-40C to 125C) at 29C Reset cause: POR Model: Freescale i.MX6 Quad Plus SABRE Smart Device Board Board: MX6-SabreSD I2C: ready DRAM: 1 GiB PMIC: PFUZE100 ID=0x10 MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 *** Warning - bad CRC, using default environment

gpio@020a4000: dir_output: error: gpio GPIO3_19 not reserved gpio@020a4000: set_value: error: gpio GPIO3_19 not reserved gpio@020b4000: dir_output: error: gpio GPIO7_12 not reserved gpio@020b4000: set_value: error: gpio GPIO7_12 not reserved PCI: pcie phy link never came up No panel detected: default to Hannstar-XGA gpio@0209c000: dir_output: error: gpio GPIO1_21 not reserved Display: Hannstar-XGA (1024x768) In: serial Out: serial Err: serial Net: gpio@0209c000: dir_output: error: gpio GPIO1_25 not reserved gpio@0209c000: set_value: error: gpio GPIO1_25 not reserved FEC [PRIME] Hit any key to stop autoboot: 0 =>

Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam fabio.estevam@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/freescale/mx6sabresd/MAINTAINERS | 1 + configs/imx6qp_sabresd_defconfig | 60 ++++++++++++++++++++++++++++++++++ 2 files changed, 61 insertions(+) create mode 100644 configs/imx6qp_sabresd_defconfig

diff --git a/board/freescale/mx6sabresd/MAINTAINERS b/board/freescale/mx6sabresd/MAINTAINERS index 434548a..40507f8 100644 --- a/board/freescale/mx6sabresd/MAINTAINERS +++ b/board/freescale/mx6sabresd/MAINTAINERS @@ -7,3 +7,4 @@ F: configs/mx6dlsabresd_defconfig F: configs/mx6qsabresd_defconfig F: configs/mx6sabresd_spl_defconfig F: configs/imx6q_sabresd_defconfig +F: configs/imx6qp_sabresd_defconfig diff --git a/configs/imx6qp_sabresd_defconfig b/configs/imx6qp_sabresd_defconfig new file mode 100644 index 0000000..73fbdb2 --- /dev/null +++ b/configs/imx6qp_sabresd_defconfig @@ -0,0 +1,60 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_TARGET_MX6SABRESD=y +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_VIDEO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6qp-sabresd" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6Q" +CONFIG_BOOTDELAY=3 +CONFIG_DEFAULT_FDT_FILE="imx6qp-sabresd.dtb" +# CONFIG_CONSOLE_MUX is not set +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y +CONFIG_SPL=y +CONFIG_SPL_EXT_SUPPORT=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_OS_BOOT=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_I2C=y +CONFIG_CMD_USB=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PCI=y +CONFIG_USB=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_CI_UDC=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_G_DNL_MANUFACTURER="FSL" +CONFIG_G_DNL_VENDOR_NUM=0x0525 +CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 +# CONFIG_VIDEO_SW_CURSOR is not set +CONFIG_OF_LIBFDT=y +CONFIG_OF_CONTROL=y +CONFIG_DM_GPIO=y +CONFIG_DM_MMC=y +# CONFIG_BLK is not set +# CONFIG_DM_MMC_OPS is not set +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y

From: Jagan Teki jagan@amarulasolutions.com

Add I2C nodes for i.MX6QDL sabresd boards.

Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam fabio.estevam@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/dts/imx6qdl-sabresd.dtsi | 42 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+)

diff --git a/arch/arm/dts/imx6qdl-sabresd.dtsi b/arch/arm/dts/imx6qdl-sabresd.dtsi index 2986cb4..491fdbf 100644 --- a/arch/arm/dts/imx6qdl-sabresd.dtsi +++ b/arch/arm/dts/imx6qdl-sabresd.dtsi @@ -22,6 +22,27 @@ }; };

+&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; +}; + +&i2c3 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; +}; + &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; @@ -57,6 +78,27 @@

&iomuxc { imx6qdl-sabresd { + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 + MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 + >; + }; + pinctrl_uart1: uart1grp { fsl,pins = < MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1

From: Jagan Teki jagan@amarulasolutions.com

Enable DM_I2C, DM_PMIC and DM_PMIC_PFUZE100 for dt supported sabresd config boards: - imx6q_sabresd_defconfig - imx6qp_sabresd_defconfig

I2C Log: -------- => i2c bus Bus 0: i2c@021a0000 Bus 1: i2c@021a4000 08: pfuze100@08, offset len 1, flags 0 Bus 2: i2c@021a8000 => i2c dev 1 Setting bus to 1 => i2c speed 100000 Setting bus speed to 100000 Hz => i2c probe Valid chip addresses: 08 48 => i2c md 08 0x0 0x20 0000: 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 ................ 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ => i2c md 48 0x0 0x20 0000: 00 f0 00 00 00 00 00 00 00 00 00 80 70 41 41 41 ............pAAA 0010: 00 00 00 80 70 41 41 41 41 41 41 41 41 41 41 41 ....pAAAAAAAAAAA

Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam fabio.estevam@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/freescale/mx6sabresd/mx6sabresd.c | 7 ++++++- configs/imx6q_sabresd_defconfig | 3 +++ configs/imx6qp_sabresd_defconfig | 3 +++ include/configs/mx6sabresd.h | 4 +++- 4 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index db25dad..5776b39 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -202,6 +202,7 @@ static void enable_lvds(struct display_info_t const *dev) enable_backlight(); }

+#ifndef CONFIG_DM_I2C static struct i2c_pads_info i2c_pad_info1 = { .scl = { .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | I2C_PAD, @@ -214,6 +215,7 @@ static struct i2c_pads_info i2c_pad_info1 = { .gp = IMX_GPIO_NR(4, 13) } }; +#endif

static void setup_spi(void) { @@ -594,8 +596,9 @@ int board_init(void) #ifdef CONFIG_MXC_SPI setup_spi(); #endif +#ifndef CONFIG_DM_I2C setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); - +#endif #ifdef CONFIG_USB_EHCI_MX6 setup_usb(); #endif @@ -603,6 +606,7 @@ int board_init(void) return 0; }

+#ifndef CONFIG_DM_PMIC int power_init_board(void) { struct pmic *p; @@ -631,6 +635,7 @@ int power_init_board(void)

return 0; } +#endif

#ifdef CONFIG_MXC_SPI int board_spi_cs_gpio(unsigned bus, unsigned cs) diff --git a/configs/imx6q_sabresd_defconfig b/configs/imx6q_sabresd_defconfig index e1bea93..2076418 100644 --- a/configs/imx6q_sabresd_defconfig +++ b/configs/imx6q_sabresd_defconfig @@ -50,10 +50,13 @@ CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y CONFIG_OF_CONTROL=y +CONFIG_DM_I2C=y CONFIG_DM_GPIO=y CONFIG_DM_MMC=y +CONFIG_DM_PMIC=y # CONFIG_BLK is not set # CONFIG_DM_MMC_OPS is not set +CONFIG_DM_PMIC_PFUZE100=y CONFIG_SYS_I2C_MXC=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y diff --git a/configs/imx6qp_sabresd_defconfig b/configs/imx6qp_sabresd_defconfig index 1037d0c..68b9086 100644 --- a/configs/imx6qp_sabresd_defconfig +++ b/configs/imx6qp_sabresd_defconfig @@ -52,10 +52,13 @@ CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y CONFIG_OF_CONTROL=y +CONFIG_DM_I2C=y CONFIG_DM_GPIO=y CONFIG_DM_MMC=y +CONFIG_DM_PMIC=y # CONFIG_BLK is not set # CONFIG_DM_MMC_OPS is not set +CONFIG_DM_PMIC_PFUZE100=y CONFIG_SYS_I2C_MXC=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 7c0e7a5..6ece575 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -52,7 +52,7 @@ #endif

/* I2C Configs */ -#ifdef CONFIG_SYS_I2C_MXC +#if defined(CONFIG_SYS_I2C_MXC) && !defined(CONFIG_DM_I2C) #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ @@ -61,10 +61,12 @@ #endif

/* PMIC */ +#ifndef CONFIG_DM_PMIC_PFUZE100 #define CONFIG_POWER #define CONFIG_POWER_I2C #define CONFIG_POWER_PFUZE100 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 +#endif

/* USB Configs */ #ifdef CONFIG_CMD_USB

From: Jagan Teki jagan@amarulasolutions.com

Add usb host node for i.MX6QDL sabresd boards.

Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam fabio.estevam@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/dts/imx6qdl-sabresd.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)

diff --git a/arch/arm/dts/imx6qdl-sabresd.dtsi b/arch/arm/dts/imx6qdl-sabresd.dtsi index 4afa108..e38e370 100644 --- a/arch/arm/dts/imx6qdl-sabresd.dtsi +++ b/arch/arm/dts/imx6qdl-sabresd.dtsi @@ -20,6 +20,17 @@ memory { reg = <0x10000000 0x40000000>; }; + + reg_usb_h1_vbus: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "usb_h1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 29 0>; + enable-active-high; + vin-supply = <&swbst_reg>; + }; };

&i2c1 { @@ -38,6 +49,13 @@ pmic: pfuze100@08 { compatible = "fsl,pfuze100"; reg = <0x08>; + + regulators { + swbst_reg: swbst { + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5150000>; + }; + }; }; };

@@ -54,6 +72,11 @@ status = "okay"; };

+&usbh1 { + vbus-supply = <&reg_usb_h1_vbus>; + status = "okay"; +}; + &usdhc2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc2>;

From: Jagan Teki jagan@amarulasolutions.com

Enable CONFIG_DM_REGULATOR for i.MX6QDL sabresd boards.

Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam fabio.estevam@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- configs/imx6q_sabresd_defconfig | 1 + configs/imx6qp_sabresd_defconfig | 1 + 2 files changed, 2 insertions(+)

diff --git a/configs/imx6q_sabresd_defconfig b/configs/imx6q_sabresd_defconfig index 5e26409..84e34f1 100644 --- a/configs/imx6q_sabresd_defconfig +++ b/configs/imx6q_sabresd_defconfig @@ -56,6 +56,7 @@ CONFIG_DM_I2C=y CONFIG_DM_GPIO=y CONFIG_DM_MMC=y CONFIG_DM_PMIC=y +CONFIG_DM_REGULATOR=y # CONFIG_BLK is not set # CONFIG_DM_MMC_OPS is not set CONFIG_DM_PMIC_PFUZE100=y diff --git a/configs/imx6qp_sabresd_defconfig b/configs/imx6qp_sabresd_defconfig index 4ca80c2..a346d07 100644 --- a/configs/imx6qp_sabresd_defconfig +++ b/configs/imx6qp_sabresd_defconfig @@ -58,6 +58,7 @@ CONFIG_DM_I2C=y CONFIG_DM_GPIO=y CONFIG_DM_MMC=y CONFIG_DM_PMIC=y +CONFIG_DM_REGULATOR=y # CONFIG_BLK is not set # CONFIG_DM_MMC_OPS is not set CONFIG_DM_PMIC_PFUZE100=y

From: Jagan Teki jagan@amarulasolutions.com

Add FEC node for i.MX6QDL Sabresd boards.

Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam fabio.estevam@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/dts/imx6qdl-sabresd.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+)

diff --git a/arch/arm/dts/imx6qdl-sabresd.dtsi b/arch/arm/dts/imx6qdl-sabresd.dtsi index 0e104c1..ca1aa58 100644 --- a/arch/arm/dts/imx6qdl-sabresd.dtsi +++ b/arch/arm/dts/imx6qdl-sabresd.dtsi @@ -44,6 +44,14 @@ }; };

+&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "rgmii"; + phy-reset-gpios = <&gpio1 25 0>; + status = "okay"; +}; + &i2c1 { clock-frequency = <100000>; pinctrl-names = "default"; @@ -124,6 +132,27 @@

&iomuxc { imx6qdl-sabresd { + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 + >; + }; + pinctrl_i2c1: i2c1grp { fsl,pins = < MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1

From: Jagan Teki jagan@amarulasolutions.com

Enable DM_ETH for dt supported sabresd config boards: - imx6q_sabresd_defconfig - imx6qp_sabresd_defconfig

Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam fabio.estevam@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/freescale/mx6sabresd/mx6sabresd.c | 6 ++++++ configs/imx6q_sabresd_defconfig | 1 + configs/imx6qp_sabresd_defconfig | 1 + 3 files changed, 8 insertions(+)

diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index a143dbb..10bc7c6 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -70,6 +70,7 @@ static iomux_v3_cfg_t const uart1_pads[] = { MX6_PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), };

+#ifndef CONFIG_OF_CONTROL static iomux_v3_cfg_t const enet_pads[] = { MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), @@ -100,6 +101,7 @@ static void setup_iomux_enet(void) gpio_set_value(IMX_GPIO_NR(1, 25), 1); udelay(100); } +#endif

static iomux_v3_cfg_t const usdhc2_pads[] = { MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), @@ -222,6 +224,7 @@ static void setup_spi(void) imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads)); }

+#ifndef CONFIG_OF_CONTROL iomux_v3_cfg_t const pcie_pads[] = { MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL), /* POWER */ MX6_PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL), /* RESET */ @@ -231,6 +234,7 @@ static void setup_pcie(void) { imx_iomux_v3_setup_multiple_pads(pcie_pads, ARRAY_SIZE(pcie_pads)); } +#endif

iomux_v3_cfg_t const di0_pads[] = { MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK, /* DISP0_CLK */ @@ -507,6 +511,7 @@ int overwrite_console(void) return 1; }

+#ifndef CONFIG_OF_CONTROL int board_eth_init(bd_t *bis) { setup_iomux_enet(); @@ -514,6 +519,7 @@ int board_eth_init(bd_t *bis)

return cpu_eth_init(bis); } +#endif

#if defined(CONFIG_USB_EHCI_MX6) && !defined(CONFIG_DM_USB) #define USB_OTHERREGS_OFFSET 0x800 diff --git a/configs/imx6q_sabresd_defconfig b/configs/imx6q_sabresd_defconfig index 377a489..8c7baee 100644 --- a/configs/imx6q_sabresd_defconfig +++ b/configs/imx6q_sabresd_defconfig @@ -52,6 +52,7 @@ CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y CONFIG_OF_CONTROL=y +CONFIG_DM_ETH=y CONFIG_DM_I2C=y CONFIG_DM_GPIO=y CONFIG_DM_MMC=y diff --git a/configs/imx6qp_sabresd_defconfig b/configs/imx6qp_sabresd_defconfig index 84d9cd6..30d9280 100644 --- a/configs/imx6qp_sabresd_defconfig +++ b/configs/imx6qp_sabresd_defconfig @@ -54,6 +54,7 @@ CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y CONFIG_OF_CONTROL=y +CONFIG_DM_ETH=y CONFIG_DM_I2C=y CONFIG_DM_GPIO=y CONFIG_DM_MMC=y

From: Jagan Teki jagan@amarulasolutions.com

Add imx6_pcie_toggle_power on board file using dm_gpio_* calls for OF_CONTROL configs.

Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam fabio.estevam@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/freescale/mx6sabresd/mx6sabresd.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+)

diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index 1631dbc..f4e14be 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -533,6 +533,36 @@ int overwrite_console(void) return 1; }

+#ifdef CONFIG_OF_CONTROL +int imx6_pcie_toggle_power(void) +{ +#ifdef CONFIG_PCIE_IMX_POWER_GPIO + struct gpio_desc toggle; + int ret; + + ret = dm_gpio_lookup_name("GPIO3_19", &toggle); + if (ret) { + printf("Cannot get GPIO3_19\n"); + return ret; + } + + ret = dm_gpio_request(&toggle, "toggle"); + if (ret) { + printf("Cannot request GPIO3_19\n"); + return ret; + } + + dm_gpio_set_dir_flags(&toggle, GPIOD_IS_OUT); + + dm_gpio_set_value(&toggle, 0); + mdelay(20); + dm_gpio_set_value(&toggle, 1); + mdelay(20); +#endif + return 0; +} +#endif + #ifndef CONFIG_OF_CONTROL int board_eth_init(bd_t *bis) {

From: Jagan Teki jagan@amarulasolutions.com

Add initial dts support for i.MX6 DualLite Sabresd board.

Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam fabio.estevam@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/dts/Makefile | 1 + arch/arm/dts/imx6dl-sabresd.dts | 17 +++++++++++++++++ 2 files changed, 18 insertions(+) create mode 100644 arch/arm/dts/imx6dl-sabresd.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index b6042f3..4ce0722 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -315,6 +315,7 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \ imx6sll-evk.dtb \ imx6dl-icore.dtb \ imx6dl-icore-rqs.dtb \ + imx6dl-sabresd.dtb \ imx6q-icore.dtb \ imx6q-icore-rqs.dtb \ imx6q-sabresd.dtb \ diff --git a/arch/arm/dts/imx6dl-sabresd.dts b/arch/arm/dts/imx6dl-sabresd.dts new file mode 100644 index 0000000..1e45f2f --- /dev/null +++ b/arch/arm/dts/imx6dl-sabresd.dts @@ -0,0 +1,17 @@ +/* + * Copyright (C) 2013 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/dts-v1/; + +#include "imx6dl.dtsi" +#include "imx6qdl-sabresd.dtsi" + +/ { + model = "Freescale i.MX6 DualLite SABRE Smart Device Board"; + compatible = "fsl,imx6dl-sabresd", "fsl,imx6dl"; +};

From: Jagan Teki jagan@amarulasolutions.com

- Removed non-fdt code (becuase which has dt support) - Remove legacy defconfigs mx6dlsabresd_defconfig mx6qsabresd_defconfig mx6sabresd_spl_defconfig - Re-arrange the header includes and removed unneeded includes. - Move the SPL code in #ifdef CONFIG_SPL_BUILD area. - Drop mx6dlsabresd.cfg - Drop mx6q_4x_mt41j128.cfg

Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam fabio.estevam@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/freescale/mx6sabresd/MAINTAINERS | 3 - board/freescale/mx6sabresd/mx6dlsabresd.cfg | 131 -------- board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg | 169 ---------- board/freescale/mx6sabresd/mx6sabresd.c | 394 ++++-------------------- configs/mx6dlsabresd_defconfig | 48 --- configs/mx6qsabresd_defconfig | 48 --- configs/mx6sabresd_spl_defconfig | 54 ---- include/configs/mx6sabresd.h | 23 -- 8 files changed, 63 insertions(+), 807 deletions(-) delete mode 100644 board/freescale/mx6sabresd/mx6dlsabresd.cfg delete mode 100644 board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg delete mode 100644 configs/mx6dlsabresd_defconfig delete mode 100644 configs/mx6qsabresd_defconfig delete mode 100644 configs/mx6sabresd_spl_defconfig

diff --git a/board/freescale/mx6sabresd/MAINTAINERS b/board/freescale/mx6sabresd/MAINTAINERS index 5efc795..6b3fee9 100644 --- a/board/freescale/mx6sabresd/MAINTAINERS +++ b/board/freescale/mx6sabresd/MAINTAINERS @@ -3,9 +3,6 @@ M: Fabio Estevam fabio.estevam@nxp.com S: Maintained F: board/freescale/mx6sabresd/ F: include/configs/mx6sabresd.h -F: configs/mx6dlsabresd_defconfig -F: configs/mx6qsabresd_defconfig -F: configs/mx6sabresd_spl_defconfig F: configs/imx6dl_sabresd_defconfig F: configs/imx6q_sabresd_defconfig F: configs/imx6qp_sabresd_defconfig diff --git a/board/freescale/mx6sabresd/mx6dlsabresd.cfg b/board/freescale/mx6sabresd/mx6dlsabresd.cfg deleted file mode 100644 index be9f87f..0000000 --- a/board/freescale/mx6sabresd/mx6dlsabresd.cfg +++ /dev/null @@ -1,131 +0,0 @@ -/* - * Copyright (C) 2014 Freescale Semiconductor, Inc. - * - * SPDX-License-Identifier: GPL-2.0+ - * - * Refer doc/README.imximage for more details about how-to configure - * and create imximage boot image - * - * The syntax is taken as close as possible with the kwbimage - */ - -/* image version */ - -IMAGE_VERSION 2 - -/* - * Boot Device : one of - * spi, sd (the board has no nand neither onenand) - */ - -BOOT_FROM sd - -/* - * Device Configuration Data (DCD) - * - * Each entry must have the format: - * Addr-type Address Value - * - * where: - * Addr-type register length (1,2 or 4 bytes) - * Address absolute address of the register - * value value to be stored in the register - */ -DATA 4 0x020e0774 0x000C0000 -DATA 4 0x020e0754 0x00000000 -DATA 4 0x020e04ac 0x00000030 -DATA 4 0x020e04b0 0x00000030 -DATA 4 0x020e0464 0x00000030 -DATA 4 0x020e0490 0x00000030 -DATA 4 0x020e074c 0x00000030 -DATA 4 0x020e0494 0x00000030 -DATA 4 0x020e04a0 0x00000000 -DATA 4 0x020e04b4 0x00000030 -DATA 4 0x020e04b8 0x00000030 -DATA 4 0x020e076c 0x00000030 -DATA 4 0x020e0750 0x00020000 -DATA 4 0x020e04bc 0x00000030 -DATA 4 0x020e04c0 0x00000030 -DATA 4 0x020e04c4 0x00000030 -DATA 4 0x020e04c8 0x00000030 -DATA 4 0x020e04cc 0x00000030 -DATA 4 0x020e04d0 0x00000030 -DATA 4 0x020e04d4 0x00000030 -DATA 4 0x020e04d8 0x00000030 -DATA 4 0x020e0760 0x00020000 -DATA 4 0x020e0764 0x00000030 -DATA 4 0x020e0770 0x00000030 -DATA 4 0x020e0778 0x00000030 -DATA 4 0x020e077c 0x00000030 -DATA 4 0x020e0780 0x00000030 -DATA 4 0x020e0784 0x00000030 -DATA 4 0x020e078c 0x00000030 -DATA 4 0x020e0748 0x00000030 -DATA 4 0x020e0470 0x00000030 -DATA 4 0x020e0474 0x00000030 -DATA 4 0x020e0478 0x00000030 -DATA 4 0x020e047c 0x00000030 -DATA 4 0x020e0480 0x00000030 -DATA 4 0x020e0484 0x00000030 -DATA 4 0x020e0488 0x00000030 -DATA 4 0x020e048c 0x00000030 -DATA 4 0x021b0800 0xa1390003 -DATA 4 0x021b080c 0x001F001F -DATA 4 0x021b0810 0x001F001F -DATA 4 0x021b480c 0x001F001F -DATA 4 0x021b4810 0x001F001F -DATA 4 0x021b083c 0x4220021F -DATA 4 0x021b0840 0x0207017E -DATA 4 0x021b483c 0x4201020C -DATA 4 0x021b4840 0x01660172 -DATA 4 0x021b0848 0x4A4D4E4D -DATA 4 0x021b4848 0x4A4F5049 -DATA 4 0x021b0850 0x3F3C3D31 -DATA 4 0x021b4850 0x3238372B -DATA 4 0x021b081c 0x33333333 -DATA 4 0x021b0820 0x33333333 -DATA 4 0x021b0824 0x33333333 -DATA 4 0x021b0828 0x33333333 -DATA 4 0x021b481c 0x33333333 -DATA 4 0x021b4820 0x33333333 -DATA 4 0x021b4824 0x33333333 -DATA 4 0x021b4828 0x33333333 -DATA 4 0x021b08b8 0x00000800 -DATA 4 0x021b48b8 0x00000800 -DATA 4 0x021b0004 0x0002002D -DATA 4 0x021b0008 0x00333030 -DATA 4 0x021b000c 0x3F435313 -DATA 4 0x021b0010 0xB66E8B63 -DATA 4 0x021b0014 0x01FF00DB -DATA 4 0x021b0018 0x00001740 -DATA 4 0x021b001c 0x00008000 -DATA 4 0x021b002c 0x000026d2 -DATA 4 0x021b0030 0x00431023 -DATA 4 0x021b0040 0x00000027 -DATA 4 0x021b0000 0x831A0000 -DATA 4 0x021b001c 0x04008032 -DATA 4 0x021b001c 0x00008033 -DATA 4 0x021b001c 0x00048031 -DATA 4 0x021b001c 0x05208030 -DATA 4 0x021b001c 0x04008040 -DATA 4 0x021b0020 0x00005800 -DATA 4 0x021b0818 0x00011117 -DATA 4 0x021b4818 0x00011117 -DATA 4 0x021b0004 0x0002556D -DATA 4 0x021b0404 0x00011006 -DATA 4 0x021b001c 0x00000000 - -/* set the default clock gate to save power */ -DATA 4 0x020c4068 0x00C03F3F -DATA 4 0x020c406c 0x0030FC03 -DATA 4 0x020c4070 0x0FFFC000 -DATA 4 0x020c4074 0x3FF00000 -DATA 4 0x020c4078 0x00FFF300 -DATA 4 0x020c407c 0x0F0000C3 -DATA 4 0x020c4080 0x000003FF - -/* enable AXI cache for VDOA/VPU/IPU */ -DATA 4 0x020e0010 0xF00000CF -/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ -DATA 4 0x020e0018 0x007F007F -DATA 4 0x020e001c 0x007F007F diff --git a/board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg b/board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg deleted file mode 100644 index bb6c60b..0000000 --- a/board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg +++ /dev/null @@ -1,169 +0,0 @@ -/* - * Copyright (C) 2011 Freescale Semiconductor, Inc. - * Jason Liu r64343@freescale.com - * - * SPDX-License-Identifier: GPL-2.0+ - * - * Refer doc/README.imximage for more details about how-to configure - * and create imximage boot image - * - * The syntax is taken as close as possible with the kwbimage - */ - -/* image version */ -IMAGE_VERSION 2 - -/* - * Boot Device : one of - * spi, sd (the board has no nand neither onenand) - */ -BOOT_FROM sd - -/* - * Device Configuration Data (DCD) - * - * Each entry must have the format: - * Addr-type Address Value - * - * where: - * Addr-type register length (1,2 or 4 bytes) - * Address absolute address of the register - * value value to be stored in the register - */ -DATA 4 0x020e05a8 0x00000030 -DATA 4 0x020e05b0 0x00000030 -DATA 4 0x020e0524 0x00000030 -DATA 4 0x020e051c 0x00000030 - -DATA 4 0x020e0518 0x00000030 -DATA 4 0x020e050c 0x00000030 -DATA 4 0x020e05b8 0x00000030 -DATA 4 0x020e05c0 0x00000030 - -DATA 4 0x020e05ac 0x00020030 -DATA 4 0x020e05b4 0x00020030 -DATA 4 0x020e0528 0x00020030 -DATA 4 0x020e0520 0x00020030 - -DATA 4 0x020e0514 0x00020030 -DATA 4 0x020e0510 0x00020030 -DATA 4 0x020e05bc 0x00020030 -DATA 4 0x020e05c4 0x00020030 - -DATA 4 0x020e056c 0x00020030 -DATA 4 0x020e0578 0x00020030 -DATA 4 0x020e0588 0x00020030 -DATA 4 0x020e0594 0x00020030 - -DATA 4 0x020e057c 0x00020030 -DATA 4 0x020e0590 0x00003000 -DATA 4 0x020e0598 0x00003000 -DATA 4 0x020e058c 0x00000000 - -DATA 4 0x020e059c 0x00003030 -DATA 4 0x020e05a0 0x00003030 -DATA 4 0x020e0784 0x00000030 -DATA 4 0x020e0788 0x00000030 - -DATA 4 0x020e0794 0x00000030 -DATA 4 0x020e079c 0x00000030 -DATA 4 0x020e07a0 0x00000030 -DATA 4 0x020e07a4 0x00000030 - -DATA 4 0x020e07a8 0x00000030 -DATA 4 0x020e0748 0x00000030 -DATA 4 0x020e074c 0x00000030 -DATA 4 0x020e0750 0x00020000 - -DATA 4 0x020e0758 0x00000000 -DATA 4 0x020e0774 0x00020000 -DATA 4 0x020e078c 0x00000030 -DATA 4 0x020e0798 0x000C0000 - -DATA 4 0x021b081c 0x33333333 -DATA 4 0x021b0820 0x33333333 -DATA 4 0x021b0824 0x33333333 -DATA 4 0x021b0828 0x33333333 - -DATA 4 0x021b481c 0x33333333 -DATA 4 0x021b4820 0x33333333 -DATA 4 0x021b4824 0x33333333 -DATA 4 0x021b4828 0x33333333 - -DATA 4 0x021b0018 0x00081740 - -DATA 4 0x021b001c 0x00008000 -DATA 4 0x021b000c 0x555A7974 -DATA 4 0x021b0010 0xDB538F64 -DATA 4 0x021b0014 0x01FF00DB -DATA 4 0x021b002c 0x000026D2 - -DATA 4 0x021b0030 0x005A1023 -DATA 4 0x021b0008 0x09444040 -DATA 4 0x021b0004 0x00025576 -DATA 4 0x021b0040 0x00000027 -DATA 4 0x021b0000 0x831A0000 - -DATA 4 0x021b001c 0x04088032 -DATA 4 0x021b001c 0x0408803A -DATA 4 0x021b001c 0x00008033 -DATA 4 0x021b001c 0x0000803B -DATA 4 0x021b001c 0x00428031 -DATA 4 0x021b001c 0x00428039 -DATA 4 0x021b001c 0x19308030 -DATA 4 0x021b001c 0x19308038 - -DATA 4 0x021b001c 0x04008040 -DATA 4 0x021b001c 0x04008048 -DATA 4 0x021b0800 0xA1380003 -DATA 4 0x021b4800 0xA1380003 -DATA 4 0x021b0020 0x00005800 -DATA 4 0x021b0818 0x00022227 -DATA 4 0x021b4818 0x00022227 - -DATA 4 0x021b083c 0x434B0350 -DATA 4 0x021b0840 0x034C0359 -DATA 4 0x021b483c 0x434B0350 -DATA 4 0x021b4840 0x03650348 -DATA 4 0x021b0848 0x4436383B -DATA 4 0x021b4848 0x39393341 -DATA 4 0x021b0850 0x35373933 -DATA 4 0x021b4850 0x48254A36 - -DATA 4 0x021b080c 0x001F001F -DATA 4 0x021b0810 0x001F001F - -DATA 4 0x021b480c 0x00440044 -DATA 4 0x021b4810 0x00440044 - -DATA 4 0x021b08b8 0x00000800 -DATA 4 0x021b48b8 0x00000800 - -DATA 4 0x021b001c 0x00000000 -DATA 4 0x021b0404 0x00011006 - -/* set the default clock gate to save power */ -DATA 4 0x020c4068 0x00C03F3F -DATA 4 0x020c406c 0x0030FC03 -DATA 4 0x020c4070 0x0FFFC000 -DATA 4 0x020c4074 0x3FF00000 -DATA 4 0x020c4078 0x00FFF300 -DATA 4 0x020c407c 0x0F0000C3 -DATA 4 0x020c4080 0x000003FF - -/* enable AXI cache for VDOA/VPU/IPU */ -DATA 4 0x020e0010 0xF00000CF -/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ -DATA 4 0x020e0018 0x007F007F -DATA 4 0x020e001c 0x007F007F - -/* - * Setup CCM_CCOSR register as follows: - * - * cko1_en = 1 --> CKO1 enabled - * cko1_div = 111 --> divide by 8 - * cko1_sel = 1011 --> ahb_clk_root - * - * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz - */ -DATA 4 0x020c4060 0x000000fb diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index 67fc192..cbe8d5c 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -6,30 +6,24 @@ * SPDX-License-Identifier: GPL-2.0+ */

+#include <common.h> +#include <miiphy.h> +#include <mmc.h> +#include <fsl_esdhc.h> + +#include <asm/io.h> +#include <asm/gpio.h> +#include <linux/sizes.h> + #include <asm/arch/clock.h> -#include <asm/arch/imx-regs.h> +#include <asm/arch/crm_regs.h> #include <asm/arch/iomux.h> +#include <asm/arch/mxc_hdmi.h> #include <asm/arch/mx6-pins.h> -#include <linux/errno.h> -#include <asm/gpio.h> -#include <asm/imx-common/mxc_i2c.h> -#include <asm/imx-common/iomux-v3.h> +#include <asm/arch/sys_proto.h> #include <asm/imx-common/boot_mode.h> +#include <asm/imx-common/iomux-v3.h> #include <asm/imx-common/video.h> -#include <mmc.h> -#include <fsl_esdhc.h> -#include <miiphy.h> -#include <netdev.h> -#include <asm/arch/mxc_hdmi.h> -#include <asm/arch/crm_regs.h> -#include <asm/io.h> -#include <asm/arch/sys_proto.h> -#include <i2c.h> -#include <power/pmic.h> -#include <power/pfuze100_pmic.h> -#include "../common/pfuze.h" -#include <asm/arch/mx6-ddr.h> -#include <usb.h>

DECLARE_GLOBAL_DATA_PTR;

@@ -37,28 +31,11 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ PAD_CTL_SRE_FAST | PAD_CTL_HYS)

-#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ - PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ - PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ - PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) - #define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)

-#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ - PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ - PAD_CTL_ODE | PAD_CTL_SRE_FAST) - -#define I2C_PMIC 1 - -#define I2C_PAD MUX_PAD_CTRL(I2C_PAD_CTRL) - #define DISP0_PWR_EN IMX_GPIO_NR(1, 21)

-#define KEY_VOL_UP IMX_GPIO_NR(1, 4) - int dram_init(void) { gd->ram_size = imx_ddr_size(); @@ -70,80 +47,6 @@ static iomux_v3_cfg_t const uart1_pads[] = { MX6_PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), };

-#ifndef CONFIG_OF_CONTROL -static iomux_v3_cfg_t const enet_pads[] = { - MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), - /* AR8031 PHY Reset */ - MX6_PAD_ENET_CRS_DV__GPIO1_IO25 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - -static void setup_iomux_enet(void) -{ - imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); - - /* Reset AR8031 PHY */ - gpio_direction_output(IMX_GPIO_NR(1, 25) , 0); - mdelay(10); - gpio_set_value(IMX_GPIO_NR(1, 25), 1); - udelay(100); -} -#endif - -static iomux_v3_cfg_t const usdhc2_pads[] = { - MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NANDF_D4__SD2_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NANDF_D5__SD2_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NANDF_D6__SD2_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NANDF_D7__SD2_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NANDF_D2__GPIO2_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ -}; - -static iomux_v3_cfg_t const usdhc3_pads[] = { - MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NANDF_D0__GPIO2_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ -}; - -static iomux_v3_cfg_t const usdhc4_pads[] = { - MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -}; - static iomux_v3_cfg_t const ecspi1_pads[] = { MX6_PAD_KEY_COL0__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), MX6_PAD_KEY_COL1__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), @@ -189,12 +92,11 @@ static iomux_v3_cfg_t const bl_pads[] = {

static void enable_backlight(void) { - imx_iomux_v3_setup_multiple_pads(bl_pads, ARRAY_SIZE(bl_pads)); - -#ifdef CONFIG_OF_CONTROL struct gpio_desc backlight; int ret;

+ imx_iomux_v3_setup_multiple_pads(bl_pads, ARRAY_SIZE(bl_pads)); + /* Set Brightness to high */ ret = dm_gpio_lookup_name("GPIO1_21", &backlight); if (ret) { @@ -210,9 +112,6 @@ static void enable_backlight(void)

dm_gpio_set_dir_flags(&backlight, GPIOD_IS_OUT); dm_gpio_set_value(&backlight, 1); -#else - gpio_direction_output(DISP0_PWR_EN, 1); -#endif }

static void enable_rgb(struct display_info_t const *dev) @@ -226,27 +125,11 @@ static void enable_lvds(struct display_info_t const *dev) enable_backlight(); }

-#ifndef CONFIG_DM_I2C -static struct i2c_pads_info i2c_pad_info1 = { - .scl = { - .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | I2C_PAD, - .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | I2C_PAD, - .gp = IMX_GPIO_NR(4, 12) - }, - .sda = { - .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | I2C_PAD, - .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | I2C_PAD, - .gp = IMX_GPIO_NR(4, 13) - } -}; -#endif - static void setup_spi(void) { imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads)); }

-#ifndef CONFIG_OF_CONTROL iomux_v3_cfg_t const pcie_pads[] = { MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL), /* POWER */ MX6_PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL), /* RESET */ @@ -256,7 +139,6 @@ static void setup_pcie(void) { imx_iomux_v3_setup_multiple_pads(pcie_pads, ARRAY_SIZE(pcie_pads)); } -#endif

iomux_v3_cfg_t const di0_pads[] = { MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK, /* DISP0_CLK */ @@ -269,90 +151,6 @@ static void setup_iomux_uart(void) imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); }

-#if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_OF_CONTROL) -struct fsl_esdhc_cfg usdhc_cfg[3] = { - {USDHC2_BASE_ADDR}, - {USDHC3_BASE_ADDR}, - {USDHC4_BASE_ADDR}, -}; - -#define USDHC2_CD_GPIO IMX_GPIO_NR(2, 2) -#define USDHC3_CD_GPIO IMX_GPIO_NR(2, 0) - -int board_mmc_get_env_dev(int devno) -{ - return devno - 1; -} - -int board_mmc_getcd(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int ret = 0; - - switch (cfg->esdhc_base) { - case USDHC2_BASE_ADDR: - ret = !gpio_get_value(USDHC2_CD_GPIO); - break; - case USDHC3_BASE_ADDR: - ret = !gpio_get_value(USDHC3_CD_GPIO); - break; - case USDHC4_BASE_ADDR: - ret = 1; /* eMMC/uSDHC4 is always present */ - break; - } - - return ret; -} - -#ifndef CONFIG_FSL_ESDHC -int board_mmc_init(bd_t *bis) -{ - int ret; - int i; - - /* - * According to the board_mmc_init() the following map is done: - * (U-Boot device node) (Physical Port) - * mmc0 SD2 - * mmc1 SD3 - * mmc2 eMMC - */ - for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { - switch (i) { - case 0: - imx_iomux_v3_setup_multiple_pads( - usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); - gpio_direction_input(USDHC2_CD_GPIO); - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); - break; - case 1: - imx_iomux_v3_setup_multiple_pads( - usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); - gpio_direction_input(USDHC3_CD_GPIO); - usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); - break; - case 2: - imx_iomux_v3_setup_multiple_pads( - usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); - usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); - break; - default: - printf("Warning: you configured more USDHC controllers" - "(%d) then supported by the board (%d)\n", - i + 1, CONFIG_SYS_FSL_USDHC_NUM); - return -EINVAL; - } - - ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); - if (ret) - return ret; - } - - return 0; -} -#endif -#endif - static int ar8031_phy_fixup(struct phy_device *phydev) { unsigned short val; @@ -533,7 +331,6 @@ int overwrite_console(void) return 1; }

-#ifdef CONFIG_OF_CONTROL int imx6_pcie_toggle_power(void) { #ifdef CONFIG_PCIE_IMX_POWER_GPIO @@ -592,80 +389,6 @@ int imx6_pcie_toggle_reset(void) #endif return 0; } -#endif - -#ifndef CONFIG_OF_CONTROL -int board_eth_init(bd_t *bis) -{ - setup_iomux_enet(); - setup_pcie(); - - return cpu_eth_init(bis); -} -#endif - -#if defined(CONFIG_USB_EHCI_MX6) && !defined(CONFIG_DM_USB) -#define USB_OTHERREGS_OFFSET 0x800 -#define UCTRL_PWR_POL (1 << 9) - -static iomux_v3_cfg_t const usb_otg_pads[] = { - MX6_PAD_EIM_D22__USB_OTG_PWR | MUX_PAD_CTRL(NO_PAD_CTRL), - MX6_PAD_ENET_RX_ER__USB_OTG_ID | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - -static iomux_v3_cfg_t const usb_hc1_pads[] = { - MX6_PAD_ENET_TXD1__GPIO1_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - -static void setup_usb(void) -{ - imx_iomux_v3_setup_multiple_pads(usb_otg_pads, - ARRAY_SIZE(usb_otg_pads)); - - /* - * set daisy chain for otg_pin_id on 6q. - * for 6dl, this bit is reserved - */ - imx_iomux_set_gpr_register(1, 13, 1, 0); - - imx_iomux_v3_setup_multiple_pads(usb_hc1_pads, - ARRAY_SIZE(usb_hc1_pads)); -} - -int board_ehci_hcd_init(int port) -{ - u32 *usbnc_usb_ctrl; - - if (port > 1) - return -EINVAL; - - usbnc_usb_ctrl = (u32 *)(USB_BASE_ADDR + USB_OTHERREGS_OFFSET + - port * 4); - - setbits_le32(usbnc_usb_ctrl, UCTRL_PWR_POL); - - return 0; -} - -int board_ehci_power(int port, int on) -{ - switch (port) { - case 0: - break; - case 1: - if (on) - gpio_direction_output(IMX_GPIO_NR(1, 29), 1); - else - gpio_direction_output(IMX_GPIO_NR(1, 29), 0); - break; - default: - printf("MXC USB port %d not yet supported\n", port); - return -EINVAL; - } - - return 0; -} -#endif

int board_early_init_f(void) { @@ -685,46 +408,10 @@ int board_init(void) #ifdef CONFIG_MXC_SPI setup_spi(); #endif -#ifndef CONFIG_DM_I2C - setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); -#endif -#if defined(CONFIG_USB_EHCI_MX6) && !defined(CONFIG_DM_USB) - setup_usb(); -#endif - - return 0; -} - -#ifndef CONFIG_DM_PMIC -int power_init_board(void) -{ - struct pmic *p; - unsigned int reg; - int ret; - - p = pfuze_common_init(I2C_PMIC); - if (!p) - return -ENODEV; - - ret = pfuze_mode_init(p, APS_PFM); - if (ret < 0) - return ret; - - /* Increase VGEN3 from 2.5 to 2.8V */ - pmic_reg_read(p, PFUZE100_VGEN3VOL, &reg); - reg &= ~LDO_VOL_MASK; - reg |= LDOB_2_80V; - pmic_reg_write(p, PFUZE100_VGEN3VOL, reg); - - /* Increase VGEN5 from 2.8 to 3V */ - pmic_reg_read(p, PFUZE100_VGEN5VOL, &reg); - reg &= ~LDO_VOL_MASK; - reg |= LDOB_3_00V; - pmic_reg_write(p, PFUZE100_VGEN5VOL, reg); + setup_pcie();

return 0; } -#endif

#ifdef CONFIG_MXC_SPI int board_spi_cs_gpio(unsigned bus, unsigned cs) @@ -776,7 +463,51 @@ int checkboard(void)

#ifdef CONFIG_FSL_ESDHC

-#if defined(CONFIG_OF_CONTROL) && !defined(CONFIG_DM_MMC) +#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +static iomux_v3_cfg_t const usdhc2_pads[] = { + MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NANDF_D4__SD2_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NANDF_D5__SD2_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NANDF_D6__SD2_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NANDF_D7__SD2_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NANDF_D2__GPIO2_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ +}; + +static iomux_v3_cfg_t const usdhc3_pads[] = { + MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NANDF_D0__GPIO2_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ +}; + +static iomux_v3_cfg_t const usdhc4_pads[] = { + MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + struct fsl_esdhc_cfg usdhc_cfg[3] = { {USDHC2_BASE_ADDR}, {USDHC3_BASE_ADDR}, @@ -810,7 +541,6 @@ int board_mmc_getcd(struct mmc *mmc)

return ret; } -#endif

int board_mmc_init(bd_t *bis) { @@ -854,6 +584,8 @@ int board_mmc_init(bd_t *bis) #endif

#ifdef CONFIG_SPL_OS_BOOT +#define KEY_VOL_UP IMX_GPIO_NR(1, 4) + int spl_start_uboot(void) { gpio_direction_input(KEY_VOL_UP); diff --git a/configs/mx6dlsabresd_defconfig b/configs/mx6dlsabresd_defconfig deleted file mode 100644 index c61fcd2..0000000 --- a/configs/mx6dlsabresd_defconfig +++ /dev/null @@ -1,48 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_MX6=y -CONFIG_TARGET_MX6SABRESD=y -CONFIG_VIDEO=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sabresd/mx6dlsabresd.cfg,MX6DL" -CONFIG_BOOTDELAY=3 -# CONFIG_CONSOLE_MUX is not set -CONFIG_SYS_CONSOLE_IS_IN_ENV=y -CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y -CONFIG_HUSH_PARSER=y -CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_MMC=y -CONFIG_CMD_SF=y -CONFIG_CMD_I2C=y -CONFIG_CMD_USB=y -CONFIG_CMD_DFU=y -CONFIG_CMD_USB_MASS_STORAGE=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_CACHE=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y -CONFIG_DFU_MMC=y -CONFIG_DFU_SF=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_PCI=y -CONFIG_USB=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_MX6=y -CONFIG_USB_STORAGE=y -CONFIG_USB_GADGET=y -CONFIG_CI_UDC=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="FSL" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 -# CONFIG_VIDEO_SW_CURSOR is not set -CONFIG_OF_LIBFDT=y -CONFIG_SYS_I2C_MXC=y -CONFIG_FEC_MXC=y diff --git a/configs/mx6qsabresd_defconfig b/configs/mx6qsabresd_defconfig deleted file mode 100644 index e9758e3..0000000 --- a/configs/mx6qsabresd_defconfig +++ /dev/null @@ -1,48 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_MX6=y -CONFIG_TARGET_MX6SABRESD=y -CONFIG_VIDEO=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg,MX6Q" -CONFIG_BOOTDELAY=3 -# CONFIG_CONSOLE_MUX is not set -CONFIG_SYS_CONSOLE_IS_IN_ENV=y -CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y -CONFIG_HUSH_PARSER=y -CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_MMC=y -CONFIG_CMD_SF=y -CONFIG_CMD_I2C=y -CONFIG_CMD_USB=y -CONFIG_CMD_DFU=y -CONFIG_CMD_USB_MASS_STORAGE=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_CACHE=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y -CONFIG_DFU_MMC=y -CONFIG_DFU_SF=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_PCI=y -CONFIG_USB=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_MX6=y -CONFIG_USB_STORAGE=y -CONFIG_USB_GADGET=y -CONFIG_CI_UDC=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="FSL" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 -# CONFIG_VIDEO_SW_CURSOR is not set -CONFIG_OF_LIBFDT=y -CONFIG_SYS_I2C_MXC=y -CONFIG_FEC_MXC=y diff --git a/configs/mx6sabresd_spl_defconfig b/configs/mx6sabresd_spl_defconfig deleted file mode 100644 index bba77b6..0000000 --- a/configs/mx6sabresd_spl_defconfig +++ /dev/null @@ -1,54 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_MX6=y -CONFIG_SPL_GPIO_SUPPORT=y -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6SABRESD=y -CONFIG_SPL_MMC_SUPPORT=y -CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_VIDEO=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,SPL,MX6Q" -CONFIG_BOOTDELAY=3 -# CONFIG_CONSOLE_MUX is not set -CONFIG_SYS_CONSOLE_IS_IN_ENV=y -CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y -CONFIG_SPL=y -CONFIG_SPL_EXT_SUPPORT=y -CONFIG_SPL_OS_BOOT=y -CONFIG_HUSH_PARSER=y -CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_MMC=y -CONFIG_CMD_SF=y -CONFIG_CMD_I2C=y -CONFIG_CMD_USB=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_CACHE=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_PCI=y -CONFIG_USB=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_MX6=y -CONFIG_USB_STORAGE=y -CONFIG_USB_GADGET=y -CONFIG_CI_UDC=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="FSL" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 -# CONFIG_VIDEO_SW_CURSOR is not set -CONFIG_OF_LIBFDT=y -CONFIG_SYS_I2C_MXC=y -CONFIG_FEC_MXC=y diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 4f6bb1b..df3ab6e 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -51,34 +51,11 @@ #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19) #endif

-/* I2C Configs */ -#if defined(CONFIG_SYS_I2C_MXC) && !defined(CONFIG_DM_I2C) -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ -#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ -#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ -#define CONFIG_SYS_I2C_SPEED 100000 -#endif - -/* PMIC */ -#ifndef CONFIG_DM_PMIC_PFUZE100 -#define CONFIG_POWER -#define CONFIG_POWER_I2C -#define CONFIG_POWER_PFUZE100 -#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 -#endif - /* USB Configs */ #ifdef CONFIG_USB_EHCI_MX6 #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_ASIX #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) - -# ifndef CONFIG_DM_USB -# define CONFIG_MXC_USB_FLAGS 0 -# define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */ -# define CONFIG_EHCI_HCD_INIT_AFTER_RESET -# endif #endif

#endif /* __MX6QSABRESD_CONFIG_H */

From: Jagan Teki jagan@amarulasolutions.com

Since all defconfig have common CONFIG_DM_* for respective dm uclass configs move them on arch Kconfig and also move CONFIG_OF_CONTROL

Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam fabio.estevam@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/cpu/armv7/mx6/Kconfig | 8 ++++++++ configs/imx6dl_sabresd_defconfig | 8 -------- configs/imx6q_sabresd_defconfig | 8 -------- configs/imx6qp_sabresd_defconfig | 8 -------- 4 files changed, 8 insertions(+), 24 deletions(-)

diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig index 69bf645..f2474d5 100644 --- a/arch/arm/cpu/armv7/mx6/Kconfig +++ b/arch/arm/cpu/armv7/mx6/Kconfig @@ -195,8 +195,16 @@ config TARGET_MX6SABRESD bool "mx6sabresd" select BOARD_LATE_INIT select SUPPORT_SPL + select OF_CONTROL select DM + select DM_ETH + select DM_GPIO + select DM_I2C + select DM_MMC + select DM_PMIC + select DM_REGULATOR select DM_THERMAL + select DM_USB select BOARD_EARLY_INIT_F

config TARGET_MX6SLEVK diff --git a/configs/imx6dl_sabresd_defconfig b/configs/imx6dl_sabresd_defconfig index 20dc1e0..fe2c981 100644 --- a/configs/imx6dl_sabresd_defconfig +++ b/configs/imx6dl_sabresd_defconfig @@ -51,14 +51,6 @@ CONFIG_G_DNL_VENDOR_NUM=0x0525 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y -CONFIG_OF_CONTROL=y -CONFIG_DM_ETH=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y -CONFIG_DM_MMC=y -CONFIG_DM_PMIC=y -CONFIG_DM_REGULATOR=y -CONFIG_DM_USB=y # CONFIG_BLK is not set # CONFIG_DM_MMC_OPS is not set CONFIG_DM_PMIC_PFUZE100=y diff --git a/configs/imx6q_sabresd_defconfig b/configs/imx6q_sabresd_defconfig index 8c7baee..57c95c2 100644 --- a/configs/imx6q_sabresd_defconfig +++ b/configs/imx6q_sabresd_defconfig @@ -51,14 +51,6 @@ CONFIG_G_DNL_VENDOR_NUM=0x0525 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y -CONFIG_OF_CONTROL=y -CONFIG_DM_ETH=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y -CONFIG_DM_MMC=y -CONFIG_DM_PMIC=y -CONFIG_DM_REGULATOR=y -CONFIG_DM_USB=y # CONFIG_BLK is not set # CONFIG_DM_MMC_OPS is not set CONFIG_DM_PMIC_PFUZE100=y diff --git a/configs/imx6qp_sabresd_defconfig b/configs/imx6qp_sabresd_defconfig index 30d9280..ca94151 100644 --- a/configs/imx6qp_sabresd_defconfig +++ b/configs/imx6qp_sabresd_defconfig @@ -53,14 +53,6 @@ CONFIG_G_DNL_VENDOR_NUM=0x0525 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y -CONFIG_OF_CONTROL=y -CONFIG_DM_ETH=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y -CONFIG_DM_MMC=y -CONFIG_DM_PMIC=y -CONFIG_DM_REGULATOR=y -CONFIG_DM_USB=y # CONFIG_BLK is not set # CONFIG_DM_MMC_OPS is not set CONFIG_DM_PMIC_PFUZE100=y