Set all switches APS mode in normal and PFM mode in standby. So when mx6 entering DSM mode, the power number can be decreased. There is no impact for mx6 in run mode.

Signed-off-by: Ye.Li B37916@freescale.com --- Changes since v1: - Try to correct the return code per Fabio's comments, but send out a false patch

Changes since v2: - Correct the return code

Changes since v3: - Separate this patch from patch set. - Add the pfuze mode function to factorized pfuze codes and common file.

board/freescale/common/pfuze.c | 39 +++++++++++++++++++++++++++++++++++++++ 1 files changed, 39 insertions(+), 0 deletions(-)

diff --git a/board/freescale/common/pfuze.c b/board/freescale/common/pfuze.c index cf92c38..6004c61 100644 --- a/board/freescale/common/pfuze.c +++ b/board/freescale/common/pfuze.c @@ -8,6 +8,39 @@ #include <power/pmic.h> #include <power/pfuze100_pmic.h>

+static int pfuze_setup_mode(struct pmic *p, int chip) +{ + unsigned char offset, i, switch_num, value; + int ret; + + if (!chip) { + /* pfuze100 */ + switch_num = 6; + offset = 0x31; + } else { + /* pfuze200 */ + switch_num = 4; + offset = 0x38; + } + + value = 0xc; + ret = pmic_reg_write(p, 0x23, value); + if (ret) { + printf("Set SW1AB mode error: %d!\n", ret); + return ret; + } + + for (i = 0; i < switch_num - 1; i++) { + ret = pmic_reg_write(p, offset + i * 7, value); + if (ret) { + printf("Set switch%x mode error: %d!\n", offset, ret); + return ret; + } + } + + return 0; +} + struct pmic * pfuze_common_init(unsigned char i2cbus) { struct pmic *p; @@ -27,6 +60,12 @@ struct pmic * pfuze_common_init(unsigned char i2cbus) printf("PMIC: PFUZE%s ID=0x%02x\n", ((reg & 0xf) == 0) ? "100" : "200", reg);

+ ret = pfuze_setup_mode(p, (reg & 0xf)); + if (ret) { + printf("setup pfuze mode error: %d!\n", ret); + return NULL; + } + /* Set SW1AB stanby volage to 0.975V */ pmic_reg_read(p, PFUZE100_SW1ABSTBY, &reg); reg &= ~0x3f;