Fastest read command code look for fastest read command taking inputs from spi->mode_rx and flags from param table and controller mode_rx is always been a priority.

Since mode_rx is always set from controller side this optimized code doesn't require much and this code required exctra overhead like 1) Maintain e_rx_cmd in param table 2) Maintain mode_rx in spi_slave {}

Hence removed this code, and look for read command from normal spi->mode from spi_slave{} and params->flags

Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi/sf_internal.h | 4 ++++ drivers/mtd/spi/spi_flash.c | 28 ++++++++++------------------ 2 files changed, 14 insertions(+), 18 deletions(-)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index da2bb7b..c5cb791 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -46,6 +46,10 @@ enum { E_FSR = BIT(2), SST_WR = BIT(3), WR_QPP = BIT(4), + RD_QUAD = BIT(5), + RD_DUAL = BIT(6), + RD_QUADIO = BIT(7), + RD_DUALIO = BIT(8), };

enum spi_nor_option_flags { diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 64d4e0f..5fd408c 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -1013,15 +1013,8 @@ int spi_flash_scan(struct spi_flash *flash) struct spi_slave *spi = flash->spi; const struct spi_flash_params *params; u16 jedec, ext_jedec; - u8 cmd, idcode[5]; + u8 idcode[5]; int ret; - static u8 spi_read_cmds_array[] = { - CMD_READ_ARRAY_SLOW, - CMD_READ_ARRAY_FAST, - CMD_READ_DUAL_OUTPUT_FAST, - CMD_READ_QUAD_OUTPUT_FAST, - CMD_READ_DUAL_IO_FAST, - CMD_READ_QUAD_IO_FAST };

/* Read the ID codes */ ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode)); @@ -1177,17 +1170,16 @@ int spi_flash_scan(struct spi_flash *flash) /* Now erase size becomes valid sector size */ flash->sector_size = flash->erase_size;

- /* Look for the fastest read cmd */ - cmd = fls(params->e_rd_cmd & spi->mode_rx); - if (cmd) { - cmd = spi_read_cmds_array[cmd - 1]; - flash->read_cmd = cmd; - } else { - /* Go for default supported read cmd */ - flash->read_cmd = CMD_READ_ARRAY_FAST; - } + /* Look for read commands */ + flash->read_cmd = CMD_READ_ARRAY_FAST; + if (spi->mode_rx & SPI_RX_SLOW) + flash->read_cmd = CMD_READ_ARRAY_SLOW; + else if (spi->mode_rx & SPI_RX_QUAD && params->flags & RD_QUAD) + flash->read_cmd = CMD_READ_QUAD_OUTPUT_FAST; + else if (spi->mode_rx & SPI_RX_DUAL && params->flags & RD_DUAL) + flash->read_cmd = CMD_READ_DUAL_OUTPUT_FAST;

- /* Not require to look for fastest only two write cmds yet */ + /* Look for write commands */ if (params->flags & WR_QPP && spi->mode & SPI_TX_QUAD) flash->write_cmd = CMD_QUAD_PAGE_PROGRAM; else

Make rx mode flags as generic to spi, earlier mode_rx is maintained separately becuase of some flash specific code.

Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi/spi_flash.c | 6 +++--- drivers/spi/cadence_qspi.c | 2 +- drivers/spi/ich.c | 6 ++---- drivers/spi/spi-uclass.c | 11 ++++------- drivers/spi/ti_qspi.c | 6 +++--- include/spi.h | 14 ++++---------- 6 files changed, 17 insertions(+), 28 deletions(-)

diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 5fd408c..041b64f 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -1172,11 +1172,11 @@ int spi_flash_scan(struct spi_flash *flash)

/* Look for read commands */ flash->read_cmd = CMD_READ_ARRAY_FAST; - if (spi->mode_rx & SPI_RX_SLOW) + if (spi->mode & SPI_RX_SLOW) flash->read_cmd = CMD_READ_ARRAY_SLOW; - else if (spi->mode_rx & SPI_RX_QUAD && params->flags & RD_QUAD) + else if (spi->mode & SPI_RX_QUAD && params->flags & RD_QUAD) flash->read_cmd = CMD_READ_QUAD_OUTPUT_FAST; - else if (spi->mode_rx & SPI_RX_DUAL && params->flags & RD_DUAL) + else if (spi->mode & SPI_RX_DUAL && params->flags & RD_DUAL) flash->read_cmd = CMD_READ_DUAL_OUTPUT_FAST;

/* Look for write commands */ diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index a5244ff..1d50f13 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -251,7 +251,7 @@ static int cadence_spi_xfer(struct udevice *dev, unsigned int bitlen, break; case CQSPI_INDIRECT_READ: err = cadence_qspi_apb_indirect_read_setup(plat, - priv->cmd_len, dm_plat->mode_rx, cmd_buf); + priv->cmd_len, dm_plat->mode, cmd_buf); if (!err) { err = cadence_qspi_apb_indirect_read_execute (plat, data_bytes, din); diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c index 00b2fed..caf0103 100644 --- a/drivers/spi/ich.c +++ b/drivers/spi/ich.c @@ -649,10 +649,8 @@ static int ich_spi_child_pre_probe(struct udevice *dev) * ICH 7 SPI controller only supports array read command * and byte program command for SST flash */ - if (plat->ich_version == ICHV_7) { - slave->mode_rx = SPI_RX_SLOW; - slave->mode = SPI_TX_BYTE; - } + if (plat->ich_version == ICHV_7) + slave->mode = SPI_RX_SLOW | SPI_TX_BYTE;

return 0; } diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c index 247abfa..d9c49e4 100644 --- a/drivers/spi/spi-uclass.c +++ b/drivers/spi/spi-uclass.c @@ -164,7 +164,6 @@ static int spi_child_pre_probe(struct udevice *dev)

slave->max_hz = plat->max_hz; slave->mode = plat->mode; - slave->mode_rx = plat->mode_rx; slave->wordlen = SPI_DEFAULT_WORDLEN;

return 0; @@ -381,7 +380,7 @@ void spi_free_slave(struct spi_slave *slave) int spi_slave_ofdata_to_platdata(const void *blob, int node, struct dm_spi_slave_platdata *plat) { - int mode = 0, mode_rx = 0; + int mode = 0; int value;

plat->cs = fdtdec_get_int(blob, node, "reg", -1); @@ -413,24 +412,22 @@ int spi_slave_ofdata_to_platdata(const void *blob, int node, break; }

- plat->mode = mode; - value = fdtdec_get_uint(blob, node, "spi-rx-bus-width", 1); switch (value) { case 1: break; case 2: - mode_rx |= SPI_RX_DUAL; + mode |= SPI_RX_DUAL; break; case 4: - mode_rx |= SPI_RX_QUAD; + mode |= SPI_RX_QUAD; break; default: error("spi-rx-bus-width %d not supported\n", value); break; }

- plat->mode_rx = mode_rx; + plat->mode = mode;

return 0; } diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index bb72cb0..37dc64f 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -336,7 +336,7 @@ static void ti_spi_setup_spi_register(struct ti_qspi_priv *priv) QSPI_SETUP0_NUM_D_BYTES_8_BITS | QSPI_SETUP0_READ_QUAD | QSPI_CMD_WRITE | QSPI_NUM_DUMMY_BITS); - slave->mode_rx = SPI_RX_QUAD; + slave->mode |= SPI_RX_QUAD; #else memval |= QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES | QSPI_SETUP0_NUM_D_BYTES_NO_BITS | @@ -422,7 +422,7 @@ static void __ti_qspi_setup_memorymap(struct ti_qspi_priv *priv, bool enable) { u32 memval; - u32 mode = slave->mode_rx & (SPI_RX_QUAD | SPI_RX_DUAL); + u32 mode = slave->mode | SPI_RX_QUAD | SPI_RX_DUAL;

if (!enable) { writel(0, &priv->base->setup0); @@ -436,7 +436,7 @@ static void __ti_qspi_setup_memorymap(struct ti_qspi_priv *priv, memval |= QSPI_CMD_READ_QUAD; memval |= QSPI_SETUP0_NUM_D_BYTES_8_BITS; memval |= QSPI_SETUP0_READ_QUAD; - slave->mode_rx = SPI_RX_QUAD; + slave->mode |= SPI_RX_QUAD; break; case SPI_RX_DUAL: memval |= QSPI_CMD_READ_DUAL; diff --git a/include/spi.h b/include/spi.h index ca96fa4..7d92ddc 100644 --- a/include/spi.h +++ b/include/spi.h @@ -26,12 +26,10 @@ #define SPI_TX_BYTE BIT(8) /* transmit with 1 wire byte */ #define SPI_TX_DUAL BIT(9) /* transmit with 2 wires */ #define SPI_TX_QUAD BIT(10) /* transmit with 4 wires */ - -/* SPI mode_rx flags */ -#define SPI_RX_SLOW BIT(0) /* receive with 1 wire slow */ -#define SPI_RX_FAST BIT(1) /* receive with 1 wire fast */ -#define SPI_RX_DUAL BIT(2) /* receive with 2 wires */ -#define SPI_RX_QUAD BIT(3) /* receive with 4 wires */ +#define SPI_RX_SLOW BIT(11) /* receive with 1 wire slow */ +#define SPI_RX_FAST BIT(12) /* receive with 1 wire fast */ +#define SPI_RX_DUAL BIT(12) /* receive with 2 wires */ +#define SPI_RX_QUAD BIT(13) /* receive with 4 wires */

/* SPI bus connection options - see enum spi_dual_flash */ #define SPI_CONN_DUAL_SHARED (1 << 0) @@ -61,13 +59,11 @@ struct dm_spi_bus { * @cs: Chip select number (0..n-1) * @max_hz: Maximum bus speed that this slave can tolerate * @mode: SPI mode to use for this device (see SPI mode flags) - * @mode_rx: SPI RX mode to use for this slave (see SPI mode_rx flags) */ struct dm_spi_slave_platdata { unsigned int cs; uint max_hz; uint mode; - u8 mode_rx; };

#endif /* CONFIG_DM_SPI */ @@ -94,7 +90,6 @@ struct dm_spi_slave_platdata { * bus (bus->seq) so does not need to be stored * @cs: ID of the chip select connected to the slave. * @mode: SPI mode to use for this slave (see SPI mode flags) - * @mode_rx: SPI RX mode to use for this slave (see SPI mode_rx flags) * @wordlen: Size of SPI word in number of bits * @max_write_size: If non-zero, the maximum number of bytes which can * be written at once, excluding command bytes. @@ -112,7 +107,6 @@ struct spi_slave { unsigned int cs; #endif uint mode; - u8 mode_rx; unsigned int wordlen; unsigned int max_write_size; void *memory_map;

Add CONFIG_SPI_FLASH_USE_4K_SECTORS in spi_flash code from header file.

Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi/sf_internal.h | 4 ---- drivers/mtd/spi/spi_flash.c | 5 ++++- 2 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index 9eb0b84..1301e48 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -22,11 +22,7 @@ enum spi_dual_flash {

/* sf param flags */ enum { -#ifndef CONFIG_SPI_FLASH_USE_4K_SECTORS - SECT_4K = 0, -#else SECT_4K = BIT(0), -#endif E_FSR = BIT(1), SST_WR = BIT(2), WR_QPP = BIT(3), diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 2b2a409..7f6e9ae 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -1155,11 +1155,14 @@ int spi_flash_scan(struct spi_flash *flash) flash->size <<= 1; #endif

+#ifdef CONFIG_SPI_FLASH_USE_4K_SECTORS /* Compute erase sector and command */ if (params->flags & SECT_4K) { flash->erase_cmd = CMD_ERASE_4K; flash->erase_size = 4096 << flash->shift; - } else { + } else +#endif + { flash->erase_cmd = CMD_ERASE_64K; flash->erase_size = flash->sector_size; }

INFO macro make flash table entries more adjustable like adding new flash_info attributes, update ID length bytes and so on and more over it will sync to Linux way of defining flash_info attributes.

Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi/sf_internal.h | 15 ++- drivers/mtd/spi/sf_params.c | 215 ++++++++++++++++++++++-------------------- drivers/mtd/spi/spi_flash.c | 61 ++++++------ include/linux/err.h | 5 + 4 files changed, 160 insertions(+), 136 deletions(-)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index e5c38bf..3f20b67 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -107,8 +107,6 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, * struct spi_flash_params - SPI/QSPI flash device params structure * * @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) - * @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id]) - * @ext_jedec: Device ext_jedec ID * @sector_size: Isn't necessarily a sector size from vendor, * the size listed here is what works with CMD_ERASE_64K * @nr_sectors: No.of sectors on this device @@ -116,11 +114,20 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, */ struct spi_flash_params { const char *name; - u32 jedec; - u16 ext_jedec; + + /* + * This array stores the ID bytes. + * The first three bytes are the JEDIC ID. + * JEDEC ID zero means "no ID" (mostly older chips). + */ + u8 id[5]; + u8 id_len; + u32 sector_size; u32 nr_sectors;

+ u16 page_size; + u16 flags; #define SECT_4K BIT(0) #define E_FSR BIT(1) diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c index 5b50114..70d9e18 100644 --- a/drivers/mtd/spi/sf_params.c +++ b/drivers/mtd/spi/sf_params.c @@ -12,125 +12,140 @@

#include "sf_internal.h"

+/* Used when the "_ext_id" is two bytes at most */ +#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \ + .id = { \ + ((_jedec_id) >> 16) & 0xff, \ + ((_jedec_id) >> 8) & 0xff, \ + (_jedec_id) & 0xff, \ + ((_ext_id) >> 8) & 0xff, \ + (_ext_id) & 0xff, \ + }, \ + .id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))), \ + .sector_size = (_sector_size), \ + .nr_sectors = (_n_sectors), \ + .page_size = 256, \ + .flags = (_flags), + /* SPI/QSPI flash device params structure */ const struct spi_flash_params spi_flash_params_table[] = { #ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */ - {"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4, SECT_4K}, - {"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8, SECT_4K}, - {"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8, SECT_4K}, - {"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16, SECT_4K}, - {"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32, SECT_4K}, - {"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64, SECT_4K}, - {"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128, SECT_4K}, - {"AT25DF321A", 0x1f4701, 0x0, 64 * 1024, 64, SECT_4K}, - {"AT25DF321", 0x1f4700, 0x0, 64 * 1024, 64, SECT_4K}, - {"AT26DF081A", 0x1f4501, 0x0, 64 * 1024, 16, SECT_4K}, + {"AT45DB011D", INFO(0x1f2200, 0x0, 64 * 1024, 4, SECT_4K) }, + {"AT45DB021D", INFO(0x1f2300, 0x0, 64 * 1024, 8, SECT_4K) }, + {"AT45DB041D", INFO(0x1f2400, 0x0, 64 * 1024, 8, SECT_4K) }, + {"AT45DB081D", INFO(0x1f2500, 0x0, 64 * 1024, 16, SECT_4K) }, + {"AT45DB161D", INFO(0x1f2600, 0x0, 64 * 1024, 32, SECT_4K) }, + {"AT45DB321D", INFO(0x1f2700, 0x0, 64 * 1024, 64, SECT_4K) }, + {"AT45DB641D", INFO(0x1f2800, 0x0, 64 * 1024, 128, SECT_4K) }, + {"AT25DF321A", INFO(0x1f4701, 0x0, 64 * 1024, 64, SECT_4K) }, + {"AT25DF321", INFO(0x1f4700, 0x0, 64 * 1024, 64, SECT_4K) }, + {"AT26DF081A", INFO(0x1f4501, 0x0, 64 * 1024, 16, SECT_4K) }, #endif #ifdef CONFIG_SPI_FLASH_EON /* EON */ - {"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, 0}, - {"EN25Q64", 0x1c3017, 0x0, 64 * 1024, 128, SECT_4K}, - {"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, 0}, - {"EN25S64", 0x1c3817, 0x0, 64 * 1024, 128, 0}, + {"EN25Q32B", INFO(0x1c3016, 0x0, 64 * 1024, 64, 0) }, + {"EN25Q64", INFO(0x1c3017, 0x0, 64 * 1024, 128, SECT_4K) }, + {"EN25Q128B", INFO(0x1c3018, 0x0, 64 * 1024, 256, 0) }, + {"EN25S64", INFO(0x1c3817, 0x0, 64 * 1024, 128, 0) }, #endif #ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */ - {"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, SECT_4K}, - {"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, SECT_4K}, + {"GD25Q64B", INFO(0xc84017, 0x0, 64 * 1024, 128, SECT_4K) }, + {"GD25LQ32", INFO(0xc86016, 0x0, 64 * 1024, 64, SECT_4K) }, #endif #ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */ - {"IS25LP032", 0x9d6016, 0x0, 64 * 1024, 64, 0}, - {"IS25LP064", 0x9d6017, 0x0, 64 * 1024, 128, 0}, - {"IS25LP128", 0x9d6018, 0x0, 64 * 1024, 256, 0}, + {"IS25LP032", INFO(0x9d6016, 0x0, 64 * 1024, 64, 0) }, + {"IS25LP064", INFO(0x9d6017, 0x0, 64 * 1024, 128, 0) }, + {"IS25LP128", INFO(0x9d6018, 0x0, 64 * 1024, 256, 0) }, #endif #ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */ - {"MX25L2006E", 0xc22012, 0x0, 64 * 1024, 4, 0}, - {"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, 0}, - {"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, 0}, - {"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, 0}, - {"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64, 0}, - {"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, 0}, - {"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP}, - {"MX25L25635F", 0xc22019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP}, - {"MX25L51235F", 0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP}, - {"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP}, + {"MX25L2006E", INFO(0xc22012, 0x0, 64 * 1024, 4, 0) }, + {"MX25L4005", INFO(0xc22013, 0x0, 64 * 1024, 8, 0) }, + {"MX25L8005", INFO(0xc22014, 0x0, 64 * 1024, 16, 0) }, + {"MX25L1605D", INFO(0xc22015, 0x0, 64 * 1024, 32, 0) }, + {"MX25L3205D", INFO(0xc22016, 0x0, 64 * 1024, 64, 0) }, + {"MX25L6405D", INFO(0xc22017, 0x0, 64 * 1024, 128, 0) }, + {"MX25L12805", INFO(0xc22018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) }, + {"MX25L25635F", INFO(0xc22019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP) }, + {"MX25L51235F", INFO(0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP) }, + {"MX25L12855E", INFO(0xc22618, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) }, #endif #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */ - {"S25FL008A", 0x010213, 0x0, 64 * 1024, 16, 0}, - {"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, 0}, - {"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, 0}, - {"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, 0}, - {"S25FL116K", 0x014015, 0x0, 64 * 1024, 128, 0}, - {"S25FL164K", 0x014017, 0x0140, 64 * 1024, 128, 0}, - {"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, RD_FULL | WR_QPP}, - {"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, RD_FULL | WR_QPP}, - {"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, RD_FULL | WR_QPP}, - {"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, RD_FULL | WR_QPP}, - {"S25FL128S_256K", 0x012018, 0x4d00, 256 * 1024, 64, RD_FULL | WR_QPP}, - {"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, RD_FULL | WR_QPP}, - {"S25FL256S_256K", 0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP}, - {"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP}, - {"S25FS512S", 0x010220, 0x4D00, 128 * 1024, 512, RD_FULL | WR_QPP}, - {"S25FL512S_256K", 0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP}, - {"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP}, - {"S25FL512S_512K", 0x010220, 0x4f00, 256 * 1024, 256, RD_FULL | WR_QPP}, + {"S25FL008A", INFO(0x010213, 0x0, 64 * 1024, 16, 0) }, + {"S25FL016A", INFO(0x010214, 0x0, 64 * 1024, 32, 0) }, + {"S25FL032A", INFO(0x010215, 0x0, 64 * 1024, 64, 0) }, + {"S25FL064A", INFO(0x010216, 0x0, 64 * 1024, 128, 0) }, + {"S25FL116K", INFO(0x014015, 0x0, 64 * 1024, 128, 0) }, + {"S25FL164K", INFO(0x014017, 0x0140, 64 * 1024, 128, 0) }, + {"S25FL128P_256K", INFO(0x012018, 0x0300, 256 * 1024, 64, RD_FULL | WR_QPP) }, + {"S25FL128P_64K", INFO(0x012018, 0x0301, 64 * 1024, 256, RD_FULL | WR_QPP) }, + {"S25FL032P", INFO(0x010215, 0x4d00, 64 * 1024, 64, RD_FULL | WR_QPP) }, + {"S25FL064P", INFO(0x010216, 0x4d00, 64 * 1024, 128, RD_FULL | WR_QPP) }, + {"S25FL128S_256K", INFO(0x012018, 0x4d00, 256 * 1024, 64, RD_FULL | WR_QPP) }, + {"S25FL128S_64K", INFO(0x012018, 0x4d01, 64 * 1024, 256, RD_FULL | WR_QPP) }, + {"S25FL256S_256K", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) }, + {"S25FL256S_64K", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) }, + {"S25FS512S", INFO(0x010220, 0x4D00, 128 * 1024, 512, RD_FULL | WR_QPP) }, + {"S25FL512S_256K", INFO(0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP) }, + {"S25FL512S_64K", INFO(0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP) }, + {"S25FL512S_512K", INFO(0x010220, 0x4f00, 256 * 1024, 256, RD_FULL | WR_QPP) }, #endif #ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */ - {"M25P10", 0x202011, 0x0, 32 * 1024, 4, 0}, - {"M25P20", 0x202012, 0x0, 64 * 1024, 4, 0}, - {"M25P40", 0x202013, 0x0, 64 * 1024, 8, 0}, - {"M25P80", 0x202014, 0x0, 64 * 1024, 16, 0}, - {"M25P16", 0x202015, 0x0, 64 * 1024, 32, 0}, - {"M25PE16", 0x208015, 0x1000, 64 * 1024, 32, 0}, - {"M25PX16", 0x207115, 0x1000, 64 * 1024, 32, RD_QUAD | RD_DUAL}, - {"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0}, - {"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0}, - {"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0}, - {"M25PX64", 0x207117, 0x0, 64 * 1024, 128, SECT_4K}, - {"N25Q016A", 0x20bb15, 0x0, 64 * 1024, 32, SECT_4K}, - {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K}, - {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K}, - {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K}, - {"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K}, - {"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP}, - {"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP}, - {"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K}, - {"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K}, - {"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K}, - {"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K}, - {"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K}, - {"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K}, + {"M25P10", INFO(0x202011, 0x0, 32 * 1024, 4, 0) }, + {"M25P20", INFO(0x202012, 0x0, 64 * 1024, 4, 0) }, + {"M25P40", INFO(0x202013, 0x0, 64 * 1024, 8, 0) }, + {"M25P80", INFO(0x202014, 0x0, 64 * 1024, 16, 0) }, + {"M25P16", INFO(0x202015, 0x0, 64 * 1024, 32, 0) }, + {"M25PE16", INFO(0x208015, 0x1000, 64 * 1024, 32, 0) }, + {"M25PX16", INFO(0x207115, 0x1000, 64 * 1024, 32, RD_QUAD | RD_DUAL) }, + {"M25P32", INFO(0x202016, 0x0, 64 * 1024, 64, 0) }, + {"M25P64", INFO(0x202017, 0x0, 64 * 1024, 128, 0) }, + {"M25P128", INFO(0x202018, 0x0, 256 * 1024, 64, 0) }, + {"M25PX64", INFO(0x207117, 0x0, 64 * 1024, 128, SECT_4K) }, + {"N25Q016A", INFO(0x20bb15, 0x0, 64 * 1024, 32, SECT_4K) }, + {"N25Q32", INFO(0x20ba16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) }, + {"N25Q32A", INFO(0x20bb16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) }, + {"N25Q64", INFO(0x20ba17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) }, + {"N25Q64A", INFO(0x20bb17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) }, + {"N25Q128", INFO(0x20ba18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) }, + {"N25Q128A", INFO(0x20bb18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) }, + {"N25Q256", INFO(0x20ba19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, + {"N25Q256A", INFO(0x20bb19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, + {"N25Q512", INFO(0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, + {"N25Q512A", INFO(0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, + {"N25Q1024", INFO(0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, + {"N25Q1024A", INFO(0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, #endif #ifdef CONFIG_SPI_FLASH_SST /* SST */ - {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WR}, - {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, SECT_4K | SST_WR}, - {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, SECT_4K | SST_WR}, - {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, SECT_4K | SST_WR}, - {"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, SECT_4K}, - {"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, SECT_4K | SST_WR}, - {"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, SECT_4K | SST_WR}, - {"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, SECT_4K | SST_WR}, - {"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, SECT_4K | SST_WR}, - {"SST25WF040B", 0x621613, 0x0, 64 * 1024, 8, SECT_4K}, - {"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, SECT_4K | SST_WR}, + {"SST25VF040B", INFO(0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) }, + {"SST25VF080B", INFO(0xbf258e, 0x0, 64 * 1024, 16, SECT_4K | SST_WR) }, + {"SST25VF016B", INFO(0xbf2541, 0x0, 64 * 1024, 32, SECT_4K | SST_WR) }, + {"SST25VF032B", INFO(0xbf254a, 0x0, 64 * 1024, 64, SECT_4K | SST_WR) }, + {"SST25VF064C", INFO(0xbf254b, 0x0, 64 * 1024, 128, SECT_4K) }, + {"SST25WF512", INFO(0xbf2501, 0x0, 64 * 1024, 1, SECT_4K | SST_WR) }, + {"SST25WF010", INFO(0xbf2502, 0x0, 64 * 1024, 2, SECT_4K | SST_WR) }, + {"SST25WF020", INFO(0xbf2503, 0x0, 64 * 1024, 4, SECT_4K | SST_WR) }, + {"SST25WF040", INFO(0xbf2504, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) }, + {"SST25WF040B", INFO(0x621613, 0x0, 64 * 1024, 8, SECT_4K) }, + {"SST25WF080", INFO(0xbf2505, 0x0, 64 * 1024, 16, SECT_4K | SST_WR) }, #endif #ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */ - {"W25P80", 0xef2014, 0x0, 64 * 1024, 16, 0}, - {"W25P16", 0xef2015, 0x0, 64 * 1024, 32, 0}, - {"W25P32", 0xef2016, 0x0, 64 * 1024, 64, 0}, - {"W25X40", 0xef3013, 0x0, 64 * 1024, 8, SECT_4K}, - {"W25X16", 0xef3015, 0x0, 64 * 1024, 32, SECT_4K}, - {"W25X32", 0xef3016, 0x0, 64 * 1024, 64, SECT_4K}, - {"W25X64", 0xef3017, 0x0, 64 * 1024, 128, SECT_4K}, - {"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K}, - {"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K}, - {"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K}, - {"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K}, - {"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K}, - {"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K}, - {"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K}, - {"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K}, - {"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K}, - {"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K}, - {"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K}, + {"W25P80", INFO(0xef2014, 0x0, 64 * 1024, 16, 0) }, + {"W25P16", INFO(0xef2015, 0x0, 64 * 1024, 32, 0) }, + {"W25P32", INFO(0xef2016, 0x0, 64 * 1024, 64, 0) }, + {"W25X40", INFO(0xef3013, 0x0, 64 * 1024, 8, SECT_4K) }, + {"W25X16", INFO(0xef3015, 0x0, 64 * 1024, 32, SECT_4K) }, + {"W25X32", INFO(0xef3016, 0x0, 64 * 1024, 64, SECT_4K) }, + {"W25X64", INFO(0xef3017, 0x0, 64 * 1024, 128, SECT_4K) }, + {"W25Q80BL", INFO(0xef4014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K) }, + {"W25Q16CL", INFO(0xef4015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K) }, + {"W25Q32BV", INFO(0xef4016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) }, + {"W25Q64CV", INFO(0xef4017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) }, + {"W25Q128BV", INFO(0xef4018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K) }, + {"W25Q256", INFO(0xef4019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, + {"W25Q80BW", INFO(0xef5014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K) }, + {"W25Q16DW", INFO(0xef6015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K) }, + {"W25Q32DW", INFO(0xef6016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) }, + {"W25Q64DW", INFO(0xef6017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) }, + {"W25Q128FW", INFO(0xef6018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K) }, #endif {}, /* Empty entry to terminate the list */ /* diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 7f6e9ae..58d5a6a 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -924,6 +924,31 @@ static int micron_quad_enable(struct spi_flash *flash) } #endif

+static const struct spi_flash_params *spi_flash_read_id(struct spi_flash *flash) +{ + int tmp; + u8 id[5]; + const struct spi_flash_params *params; + + tmp = spi_flash_cmd(flash->spi, CMD_READ_ID, id, 5); + if (tmp < 0) { + printf("SF: error %d reading JEDEC ID\n", tmp); + return ERR_PTR(tmp); + } + + params = spi_flash_params_table; + for (; params->name != NULL; params++) { + if (params->id_len) { + if (!memcmp(params->id, id, params->id_len)) + return params; + } + } + + printf("SF: unrecognized JEDEC id bytes: %02x, %02x, %02x\n", + id[0], id[1], id[2]); + return ERR_PTR(-ENODEV); +} + static int set_quad_mode(struct spi_flash *flash, u8 idcode0) { switch (idcode0) { @@ -1011,46 +1036,18 @@ static int spansion_s25fss_disable_4KB_erase(struct spi_slave *spi) int spi_flash_scan(struct spi_flash *flash) { struct spi_slave *spi = flash->spi; - const struct spi_flash_params *params; + const struct spi_flash_params *params = NULL; u16 jedec, ext_jedec; u8 idcode[5]; int ret;

- /* Read the ID codes */ - ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode)); - if (ret) { - printf("SF: Failed to get idcodes\n"); - return ret; - } - -#ifdef DEBUG - printf("SF: Got idcodes\n"); - print_buffer(0, idcode, 1, sizeof(idcode), 0); -#endif + params = spi_flash_read_id(flash); + if (IS_ERR_OR_NULL(params)) + return -ENOENT;

jedec = idcode[1] << 8 | idcode[2]; ext_jedec = idcode[3] << 8 | idcode[4];

- /* Validate params from spi_flash_params table */ - params = spi_flash_params_table; - for (; params->name != NULL; params++) { - if ((params->jedec >> 16) == idcode[0]) { - if ((params->jedec & 0xFFFF) == jedec) { - if (params->ext_jedec == 0) - break; - else if (params->ext_jedec == ext_jedec) - break; - } - } - } - - if (!params->name) { - printf("SF: Unsupported flash IDs: "); - printf("manuf %02x, jedec %04x, ext_jedec %04x\n", - idcode[0], jedec, ext_jedec); - return -EPROTONOSUPPORT; - } - #ifdef CONFIG_SPI_FLASH_SPANSION /* * The S25FS-S family physical sectors may be configured as a diff --git a/include/linux/err.h b/include/linux/err.h index 5b3c8bc..1bba498 100644 --- a/include/linux/err.h +++ b/include/linux/err.h @@ -36,6 +36,11 @@ static inline long IS_ERR(const void *ptr) return IS_ERR_VALUE((unsigned long)ptr); }

+static inline bool IS_ERR_OR_NULL(const void *ptr) +{ + return !ptr || IS_ERR_VALUE((unsigned long)ptr); +} + /** * ERR_CAST - Explicitly cast an error-valued pointer to another pointer type * @ptr: The pointer to cast.

Renamed for more readability - spi_flash_params => spi_flash_info - params => info

Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi/sandbox.c | 6 +++--- drivers/mtd/spi/sf_internal.h | 10 +++++----- drivers/mtd/spi/sf_params.c | 2 +- drivers/mtd/spi/spi_flash.c | 46 +++++++++++++++++++++---------------------- 4 files changed, 32 insertions(+), 32 deletions(-)

diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c index 53470b9..0ac7fb7 100644 --- a/drivers/mtd/spi/sandbox.c +++ b/drivers/mtd/spi/sandbox.c @@ -88,7 +88,7 @@ struct sandbox_spi_flash { /* The current flash status (see STAT_XXX defines above) */ u16 status; /* Data describing the flash we're emulating */ - const struct spi_flash_params *data; + const struct spi_flash_info *data; /* The file on disk to serv up data from */ int fd; }; @@ -112,7 +112,7 @@ static int sandbox_sf_probe(struct udevice *dev) struct sandbox_spi_flash *sbsf = dev_get_priv(dev); const char *file; size_t len, idname_len; - const struct spi_flash_params *data; + const struct spi_flash_info *data; struct sandbox_spi_flash_plat_data *pdata = dev_get_platdata(dev); struct sandbox_state *state = state_get_current(); struct udevice *bus = dev->parent; @@ -168,7 +168,7 @@ static int sandbox_sf_probe(struct udevice *dev) } debug("%s: device='%s'\n", __func__, spec);

- for (data = spi_flash_params_table; data->name; data++) { + for (data = spi_flash_ids; data->name; data++) { len = strlen(data->name); if (idname_len != len) continue; diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index a57c330..4e9ae34 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -104,11 +104,11 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, #define CMD_SPANSION_WRAR 0x71 /* Write any device register */ #endif

-#define JEDEC_ID(params) (((params)->id[1]) << 8 | ((params)->id[2])) -#define JEDEC_EXT(params) (((params)->id[3]) << 8 | ((params)->id[4])) +#define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2])) +#define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4]))

/** - * struct spi_flash_params - SPI/QSPI flash device params structure + * struct spi_flash_info - SPI/QSPI flash device params structure * * @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) * @sector_size: Isn't necessarily a sector size from vendor, @@ -116,7 +116,7 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, * @nr_sectors: No.of sectors on this device * @flags: Important param, for flash specific behaviour */ -struct spi_flash_params { +struct spi_flash_info { const char *name;

/* @@ -144,7 +144,7 @@ struct spi_flash_params { #define RD_FULL (RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO) };

-extern const struct spi_flash_params spi_flash_params_table[]; +extern const struct spi_flash_info spi_flash_ids[];

/* Send a single-byte command to the device and read the response */ int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len); diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c index 70d9e18..7fcc3bc 100644 --- a/drivers/mtd/spi/sf_params.c +++ b/drivers/mtd/spi/sf_params.c @@ -28,7 +28,7 @@ .flags = (_flags),

/* SPI/QSPI flash device params structure */ -const struct spi_flash_params spi_flash_params_table[] = { +const struct spi_flash_info spi_flash_ids[] = { #ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */ {"AT45DB011D", INFO(0x1f2200, 0x0, 64 * 1024, 4, SECT_4K) }, {"AT45DB021D", INFO(0x1f2300, 0x0, 64 * 1024, 8, SECT_4K) }, diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index c84c6b7..80c96f9 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -924,11 +924,11 @@ static int micron_quad_enable(struct spi_flash *flash) } #endif

-static const struct spi_flash_params *spi_flash_read_id(struct spi_flash *flash) +static const struct spi_flash_info *spi_flash_read_id(struct spi_flash *flash) { int tmp; u8 id[5]; - const struct spi_flash_params *params; + const struct spi_flash_info *info;

tmp = spi_flash_cmd(flash->spi, CMD_READ_ID, id, 5); if (tmp < 0) { @@ -936,11 +936,11 @@ static const struct spi_flash_params *spi_flash_read_id(struct spi_flash *flash) return ERR_PTR(tmp); }

- params = spi_flash_params_table; - for (; params->name != NULL; params++) { - if (params->id_len) { - if (!memcmp(params->id, id, params->id_len)) - return params; + info = spi_flash_ids; + for (; info->name != NULL; info++) { + if (info->id_len) { + if (!memcmp(info->id, id, info->id_len)) + return info; } }

@@ -1036,13 +1036,13 @@ static int spansion_s25fss_disable_4KB_erase(struct spi_slave *spi) int spi_flash_scan(struct spi_flash *flash) { struct spi_slave *spi = flash->spi; - const struct spi_flash_params *params = NULL; + const struct spi_flash_info *info = NULL; u16 jedec, ext_jedec; u8 idcode[5]; int ret;

- params = spi_flash_read_id(flash); - if (IS_ERR_OR_NULL(params)) + info = spi_flash_read_id(flash); + if (IS_ERR_OR_NULL(info)) return -ENOENT;

jedec = idcode[1] << 8 | idcode[2]; @@ -1091,12 +1091,12 @@ int spi_flash_scan(struct spi_flash *flash) write_sr(flash, 0);

/* Assign spi data */ - flash->name = params->name; + flash->name = info->name; flash->memory_map = spi->memory_map; flash->dual_flash = spi->option;

/* Assign spi flash flags */ - if (params->flags & SST_WR) + if (info->flags & SST_WR) flash->flags |= SNOR_F_SST_WR;

/* Assign spi_flash ops */ @@ -1130,21 +1130,21 @@ int spi_flash_scan(struct spi_flash *flash)

/* Compute the flash size */ flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0; - flash->page_size = params->page_size; + flash->page_size = info->page_size; /* * The Spansion S25FL032P and S25FL064P have 256b pages, yet use the * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with * the 0x4d00 Extended JEDEC code have 512b pages. All of the others * have 256b pages. */ - if (JEDEC_EXT(params) == 0x4d00) { - if ((JEDEC_ID(params) != 0x0215) && - (JEDEC_ID(params) != 0x0216)) + if (JEDEC_EXT(info) == 0x4d00) { + if ((JEDEC_ID(info) != 0x0215) && + (JEDEC_ID(info) != 0x0216)) flash->page_size = 512; } flash->page_size <<= flash->shift; - flash->sector_size = params->sector_size << flash->shift; - flash->size = flash->sector_size * params->nr_sectors << flash->shift; + flash->sector_size = info->sector_size << flash->shift; + flash->size = flash->sector_size * info->nr_sectors << flash->shift; #ifdef CONFIG_SF_DUAL_FLASH if (flash->dual_flash & SF_DUAL_STACKED_FLASH) flash->size <<= 1; @@ -1152,7 +1152,7 @@ int spi_flash_scan(struct spi_flash *flash)

#ifdef CONFIG_SPI_FLASH_USE_4K_SECTORS /* Compute erase sector and command */ - if (params->flags & SECT_4K) { + if (info->flags & SECT_4K) { flash->erase_cmd = CMD_ERASE_4K; flash->erase_size = 4096 << flash->shift; } else @@ -1169,13 +1169,13 @@ int spi_flash_scan(struct spi_flash *flash) flash->read_cmd = CMD_READ_ARRAY_FAST; if (spi->mode & SPI_RX_SLOW) flash->read_cmd = CMD_READ_ARRAY_SLOW; - else if (spi->mode & SPI_RX_QUAD && params->flags & RD_QUAD) + else if (spi->mode & SPI_RX_QUAD && info->flags & RD_QUAD) flash->read_cmd = CMD_READ_QUAD_OUTPUT_FAST; - else if (spi->mode & SPI_RX_DUAL && params->flags & RD_DUAL) + else if (spi->mode & SPI_RX_DUAL && info->flags & RD_DUAL) flash->read_cmd = CMD_READ_DUAL_OUTPUT_FAST;

/* Look for write commands */ - if (params->flags & WR_QPP && spi->mode & SPI_TX_QUAD) + if (info->flags & WR_QPP && spi->mode & SPI_TX_QUAD) flash->write_cmd = CMD_QUAD_PAGE_PROGRAM; else /* Go for default supported write cmd */ @@ -1212,7 +1212,7 @@ int spi_flash_scan(struct spi_flash *flash) }

#ifdef CONFIG_SPI_FLASH_STMICRO - if (params->flags & E_FSR) + if (info->flags & E_FSR) flash->flags |= SNOR_F_USE_FSR; #endif