On Tue, Sep 22, 2009 at 09:41:42PM +0200, Wolfgang Denk wrote:

Please use "git format-patch" / "git send-email" to create and submit patches. For example, it is always nice to see a file statistics in the patch.

k.

...

• MUX_VAL(CP(GPMC_CLK), (IDIS | PTU | EN | M0)) /*GPMC_CLK*/\
• MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)) /*GPIO_64*/\

• 					 /* - SMSC911X_NRES*/\
  

• MUX_VAL(CP(MCSPI1_CS2), (IEN | PTU | DIS | M4)) /*GPIO_176 */\

• 					 /* - LAN_INTR */\
  

Please use either no indentatioin at all, or indent by a multiple of TAB characters.

So no aligning with spaces at the end of a run of tabs to make them line up? Ok, if you prefer so.

...

diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index 07a031b..6616b55 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -28,7 +28,8 @@ #define CONFIG_OMAP 1 /* in a TI OMAP core */ #define CONFIG_OMAP34XX 1 /* which is a 34XX */ #define CONFIG_OMAP3430 1 /* which is in a 3430 */ -#define CONFIG_OMAP3_OVERO 1 /* working with overo */ +#define CONFIG_OMAP3_OVERO 1 /* working with overo */ +//#define CONFIG_OMAP3_OVERO_TOBI 1 /* overo mounted on tobi */

Please do not use an C++ comments, and do not add dead code.

What is the preferred way to show that the option is available but not enabled by default?

...

+#if !defined(CONFIG_OMAP3_OVERO_TOBI) +#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ +#endif

Only one blank line, please.

...

+#endif /* (CONFIG_CMD_NET) */

Ditto.

Sure (on both).

This patch has been applied and pulled though. I'll submit an incremental patch to address the above.

-Olof

Olof Johansson wrote:

Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded over tftp.

Based on the omap3 evm code. I added a new highlevel define for Tobi to avoid having it dependent on CMD_NET (which would seem backward in this case).

Signed-off-by: Olof Johansson olof@lixom.net

This version of the patch fixes whitespace comments from WD, and includes fixes for the build warnings that Dirk's patch also silenced.

board/overo/overo.c | 62 +++++++++++++++++++++++++++++++++++++++++ board/overo/overo.h | 37 ++++++++++++++++++++++++ include/configs/omap3_overo.h | 23 ++++++++++++++- 3 files changed, 120 insertions(+), 2 deletions(-)

diff --git a/board/overo/overo.c b/board/overo/overo.c index dd6d286..7d87e52 100644 --- a/board/overo/overo.c +++ b/board/overo/overo.c @@ -29,13 +29,19 @@

• MA 02111-1307 USA

*/ #include <common.h> +#include <netdev.h> #include <twl4030.h> #include <asm/io.h> #include <asm/arch/mux.h> +#include <asm/arch/mem.h> #include <asm/arch/sys_proto.h> #include <asm/mach-types.h> #include "overo.h"

+#if defined(CONFIG_OMAP3_OVERO_TOBI) +static void setup_net_chip(void); +#endif

/*

• Routine: board_init
• Description: Early hardware init.

@@ -62,6 +68,10 @@ int misc_init_r(void) twl4030_power_init(); twl4030_led_init();

+#if defined(CONFIG_OMAP3_OVERO_TOBI)

• setup_net_chip();

+#endif

• dieid_num_r();

  return 0;

@@ -76,4 +86,56 @@ int misc_init_r(void) void set_muxconf_regs(void) { MUX_OVERO(); +#if defined(CONFIG_OMAP3_OVERO_TOBI)

• MUX_OVERO_TOBI();

+#endif +}

+#if defined(CONFIG_OMAP3_OVERO_TOBI) +/*

• • Routine: setup_net_chip
• • Description: Setting up the configuration GPMC registers specific to the

• •      Ethernet hardware.
    

• */

+static void setup_net_chip(void) +{

• struct gpio *gpio3_base = (struct gpio *)OMAP34XX_GPIO3_BASE;
• struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
• /* Configure GPMC registers */
• writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[5].config1);
• writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[5].config2);
• writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[5].config3);
• writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[5].config4);
• writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[5].config5);
• writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[5].config6);
• writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[5].config7);
• /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
• writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
• /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
• writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
• /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
• writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,

• &ctrl_base->gpmc_nadv_ale);
  

• /* Make GPIO 64 as output pin */
• writel(readl(&gpio3_base->oe) & ~(GPIO0), &gpio3_base->oe);
• /* Now send a pulse on the GPIO pin */
• writel(GPIO0, &gpio3_base->setdataout);
• udelay(1);
• writel(GPIO0, &gpio3_base->cleardataout);
• udelay(1);
• writel(GPIO0, &gpio3_base->setdataout);

Use the omap gpio interface described in README.omap3

Tom

Olof Johansson wrote:

Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded over tftp.

Based on the omap3 evm code. I added a new highlevel define for Tobi to avoid having it dependent on CMD_NET (which would seem backward in this case).

Signed-off-by: Olof Johansson olof@lixom.net

Ack-ed

Sandeep, Can you push this to the ti branch?

Tom

---

This version of the patch fixes whitespace comments from WD, and includes fixes for the build warnings that Dirk's patch also silenced.

board/overo/overo.c | 62 +++++++++++++++++++++++++++++++++++++++++ board/overo/overo.h | 37 ++++++++++++++++++++++++ include/configs/omap3_overo.h | 23 ++++++++++++++- 3 files changed, 120 insertions(+), 2 deletions(-)

diff --git a/board/overo/overo.c b/board/overo/overo.c index dd6d286..7d87e52 100644 --- a/board/overo/overo.c +++ b/board/overo/overo.c @@ -29,13 +29,19 @@

• MA 02111-1307 USA

*/ #include <common.h> +#include <netdev.h> #include <twl4030.h> #include <asm/io.h> #include <asm/arch/mux.h> +#include <asm/arch/mem.h> #include <asm/arch/sys_proto.h> #include <asm/mach-types.h> #include "overo.h"

+#if defined(CONFIG_OMAP3_OVERO_TOBI) +static void setup_net_chip(void); +#endif

/*

• Routine: board_init
• Description: Early hardware init.

@@ -62,6 +68,10 @@ int misc_init_r(void) twl4030_power_init(); twl4030_led_init();

+#if defined(CONFIG_OMAP3_OVERO_TOBI)

• setup_net_chip();

+#endif

• dieid_num_r();

  return 0;

@@ -76,4 +86,56 @@ int misc_init_r(void) void set_muxconf_regs(void) { MUX_OVERO(); +#if defined(CONFIG_OMAP3_OVERO_TOBI)

• MUX_OVERO_TOBI();

+#endif +}

+#if defined(CONFIG_OMAP3_OVERO_TOBI) +/*

• • Routine: setup_net_chip
• • Description: Setting up the configuration GPMC registers specific to the

• •      Ethernet hardware.
    

• */

+static void setup_net_chip(void) +{

• struct gpio *gpio3_base = (struct gpio *)OMAP34XX_GPIO3_BASE;
• struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
• /* Configure GPMC registers */
• writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[5].config1);
• writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[5].config2);
• writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[5].config3);
• writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[5].config4);
• writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[5].config5);
• writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[5].config6);
• writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[5].config7);
• /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
• writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
• /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
• writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
• /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
• writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,

• &ctrl_base->gpmc_nadv_ale);
  

• /* Make GPIO 64 as output pin */
• writel(readl(&gpio3_base->oe) & ~(GPIO0), &gpio3_base->oe);
• /* Now send a pulse on the GPIO pin */
• writel(GPIO0, &gpio3_base->setdataout);
• udelay(1);
• writel(GPIO0, &gpio3_base->cleardataout);
• udelay(1);
• writel(GPIO0, &gpio3_base->setdataout);

+} +#endif

+int board_eth_init(bd_t *bis) +{

• int rc = 0;

+#ifdef CONFIG_SMC911X

• rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);

+#endif

• return rc;

} diff --git a/board/overo/overo.h b/board/overo/overo.h index d9fe74e..48d58f2 100644 --- a/board/overo/overo.h +++ b/board/overo/overo.h @@ -378,4 +378,41 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /*sdrc_cke0*/\ MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /*sdrc_cke1*/

+#if defined(CONFIG_OMAP3_OVERO_TOBI) +#define MUX_OVERO_TOBI() \

• MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)) /*GPMC_A1*/\
• MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0)) /*GPMC_A2*/\
• MUX_VAL(CP(GPMC_A3), (IDIS | PTU | EN | M0)) /*GPMC_A3*/\
• MUX_VAL(CP(GPMC_A4), (IDIS | PTU | EN | M0)) /*GPMC_A4*/\
• MUX_VAL(CP(GPMC_A5), (IDIS | PTU | EN | M0)) /*GPMC_A5*/\
• MUX_VAL(CP(GPMC_A6), (IDIS | PTU | EN | M0)) /*GPMC_A6*/\
• MUX_VAL(CP(GPMC_A7), (IDIS | PTU | EN | M0)) /*GPMC_A7*/\
• MUX_VAL(CP(GPMC_A8), (IDIS | PTU | EN | M0)) /*GPMC_A8*/\
• MUX_VAL(CP(GPMC_A9), (IDIS | PTU | EN | M0)) /*GPMC_A9*/\
• MUX_VAL(CP(GPMC_A10), (IDIS | PTU | EN | M0)) /*GPMC_A10*/\
• MUX_VAL(CP(GPMC_D0), (IEN | PTU | EN | M0)) /*GPMC_D0*/\
• MUX_VAL(CP(GPMC_D1), (IEN | PTU | EN | M0)) /*GPMC_D1*/\
• MUX_VAL(CP(GPMC_D2), (IEN | PTU | EN | M0)) /*GPMC_D2*/\
• MUX_VAL(CP(GPMC_D3), (IEN | PTU | EN | M0)) /*GPMC_D3*/\
• MUX_VAL(CP(GPMC_D4), (IEN | PTU | EN | M0)) /*GPMC_D4*/\
• MUX_VAL(CP(GPMC_D5), (IEN | PTU | EN | M0)) /*GPMC_D5*/\
• MUX_VAL(CP(GPMC_D6), (IEN | PTU | EN | M0)) /*GPMC_D6*/\
• MUX_VAL(CP(GPMC_D7), (IEN | PTU | EN | M0)) /*GPMC_D7*/\
• MUX_VAL(CP(GPMC_D8), (IEN | PTU | EN | M0)) /*GPMC_D8*/\
• MUX_VAL(CP(GPMC_D9), (IEN | PTU | EN | M0)) /*GPMC_D9*/\
• MUX_VAL(CP(GPMC_D10), (IEN | PTU | EN | M0)) /*GPMC_D10*/\
• MUX_VAL(CP(GPMC_D11), (IEN | PTU | EN | M0)) /*GPMC_D11*/\
• MUX_VAL(CP(GPMC_D12), (IEN | PTU | EN | M0)) /*GPMC_D12*/\
• MUX_VAL(CP(GPMC_D13), (IEN | PTU | EN | M0)) /*GPMC_D13*/\
• MUX_VAL(CP(GPMC_D14), (IEN | PTU | EN | M0)) /*GPMC_D14*/\
• MUX_VAL(CP(GPMC_D15), (IEN | PTU | EN | M0)) /*GPMC_D15*/\
• MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | EN | M0)) /*GPMC_nCS5*/\
• MUX_VAL(CP(GPMC_CLK), (IDIS | PTU | EN | M0)) /*GPMC_CLK*/\
• MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)) /*GPIO_64*/\

• 						 /* - SMSC911X_NRES*/\
  

• MUX_VAL(CP(MCSPI1_CS2), (IEN | PTU | DIS | M4)) /*GPIO_176 */\

• 						 /* - LAN_INTR */
  

+#endif

#endif diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index 07a031b..3faf756 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -28,7 +28,10 @@ #define CONFIG_OMAP 1 /* in a TI OMAP core */ #define CONFIG_OMAP34XX 1 /* which is a 34XX */ #define CONFIG_OMAP3430 1 /* which is in a 3430 */ -#define CONFIG_OMAP3_OVERO 1 /* working with overo */ +#define CONFIG_OMAP3_OVERO 1 /* working with overo */

+/* Change the below line to define 1 if you want ethernet on Tobi */ +#undef CONFIG_OMAP3_OVERO_TOBI /* overo mounted on tobi */

#include <asm/arch/cpu.h> /* get chip and board defs */ #include <asm/arch/omap3.h> @@ -105,9 +108,12 @@ #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ #undef CONFIG_CMD_IMI /* iminfo */ #undef CONFIG_CMD_IMLS /* List all found images */ -#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ #undef CONFIG_CMD_NFS /* NFS support */

+#if !defined(CONFIG_OMAP3_OVERO_TOBI) +#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ +#endif

#define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_I2C_SLAVE 1 @@ -293,4 +299,17 @@ extern unsigned int boot_flash_sec; extern unsigned int boot_flash_type; #endif

+#if defined(CONFIG_OMAP3_OVERO_TOBI) +/*----------------------------------------------------------------------------

• • SMSC9115 Ethernet from SMSC9118 family
• *----------------------------------------------------------------------------
• */

+#define CONFIG_NET_MULTI +#define CONFIG_SMC911X 1 +#define CONFIG_SMC911X_32_BIT +#define CONFIG_SMC911X_BASE 0x2C000000

+#endif /* (CONFIG_CMD_NET) */

#endif /* __CONFIG_H */

On Saturday 26 September 2009 02:13:52 Dirk Behme wrote:

Olof Johansson wrote:

...

Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded over tftp.

Based on the omap3 evm code. I added a new highlevel define for Tobi to avoid having it dependent on CMD_NET (which would seem backward in this case).

First: This is only a request for comment for possible future improvement. It doesn't ask for any changes in this patch or is any nack. Now to the content ;)

It seems that Steve found a way for runtime detection of smc911x making CONFIG_OMAP3_OVERO_TOBI more or less obsolete (from [1]) :

-- cut -- --- git/include/configs/omap3_overo.h-orig 2009-09-17 13:06:08.000000000 -0700 +++ git/include/configs/omap3_overo.h 2009-09-17 13:06:49.000000000 -0700 @@ -29,7 +29,7 @@ #define CONFIG_OMAP34XX 1 /* which is a 34XX */ #define CONFIG_OMAP3430 1 /* which is in a 3430 */ #define CONFIG_OMAP3_OVERO 1 /* working with overo */ -//#define CONFIG_OMAP3_OVERO_TOBI 1 /* overo mounted on tobi */ +#define CONFIG_OMAP3_OVERO_TOBI 1 /* overo mounted on tobi */

#include <asm/arch/cpu.h> /* get chip and board defs */ #include <asm/arch/omap3.h> --- git/drivers/net/smc911x.c-orig 2009-09-21 13:28:25.000000000 -0700 +++ git/drivers/net/smc911x.c 2009-09-21 13:29:53.000000000 -0700 @@ -253,6 +253,12 @@ int smc911x_initialize(u8 dev_num, int b

dev->iobase = base_addr;

• /* test to see if chip is present (-1 if not) */
• if (smc911x_reg_read(dev, MAC_CSR_CMD) == -1) {

• free(dev);
  

• return 0;
  

• }

i dont think returning 0 is correct. let the higher layers (i.e. your board) handle the error dynamically. -mike

Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded over tftp.

This also refactors the smc911x driver to allow for detecting when the chip is missing. I.e. the detect_chip() function is called earlier and will abort gracefully when the Chip ID read returns all 1's.

Signed-off-by: Olof Johansson olof@lixom.net

---

Changes since last version: * Incorporated auto-detect based on email discussion * Refactored some smc911x probe to deal with the above * Incorporated the GPIO library changes * Removed the TOBI-specific config option due to the new auto-probe

Testing on non-Tobi carrier boards would be appreciated, since I don't have any.

board/overo/overo.c | 59 ++++++++++++++++++++++++++++++++++++++ board/overo/overo.h | 63 +++++++++++++++++++++-------------------- drivers/net/smc911x.c | 14 +++++---- drivers/net/smc911x.h | 7 +++- include/configs/omap3_overo.h | 17 ++++++++++- 5 files changed, 119 insertions(+), 41 deletions(-)

diff --git a/board/overo/overo.c b/board/overo/overo.c index dd6d286..d42dc13 100644 --- a/board/overo/overo.c +++ b/board/overo/overo.c @@ -29,13 +29,20 @@ * MA 02111-1307 USA */ #include <common.h> +#include <netdev.h> #include <twl4030.h> #include <asm/io.h> #include <asm/arch/mux.h> +#include <asm/arch/mem.h> #include <asm/arch/sys_proto.h> +#include <asm/arch/gpio.h> #include <asm/mach-types.h> #include "overo.h"

+#if defined(CONFIG_CMD_NET) +static void setup_net_chip(void); +#endif + /* * Routine: board_init * Description: Early hardware init. @@ -62,6 +69,10 @@ int misc_init_r(void) twl4030_power_init(); twl4030_led_init();

+#if defined(CONFIG_CMD_NET) + setup_net_chip(); +#endif + dieid_num_r();

return 0; @@ -77,3 +88,51 @@ void set_muxconf_regs(void) { MUX_OVERO(); } + +#if defined(CONFIG_CMD_NET) +/* + * Routine: setup_net_chip + * Description: Setting up the configuration GPMC registers specific to the + * Ethernet hardware. + */ +static void setup_net_chip(void) +{ + struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; + + /* Configure GPMC registers */ + writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[5].config1); + writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[5].config2); + writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[5].config3); + writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[5].config4); + writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[5].config5); + writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[5].config6); + writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[5].config7); + + /* Enable off mode for NWE in PADCONF_GPMC_NWE register */ + writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); + /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */ + writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); + /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */ + writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, + &ctrl_base->gpmc_nadv_ale); + + /* Make GPIO 64 as output pin and send a magic pulse through it */ + if (!omap_request_gpio(64)) { + omap_set_gpio_direction(64, 0); + omap_set_gpio_dataout(64, 1); + udelay(1); + omap_set_gpio_dataout(64, 0); + udelay(1); + omap_set_gpio_dataout(64, 1); + } +} +#endif + +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC911X + rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); +#endif + return rc; +} diff --git a/board/overo/overo.h b/board/overo/overo.h index d9fe74e..4c7ac27 100644 --- a/board/overo/overo.h +++ b/board/overo/overo.h @@ -83,43 +83,43 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) /*SDRC_DQS2*/\ MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) /*SDRC_DQS3*/\ /*GPMC*/\ - MUX_VAL(CP(GPMC_A1), (IDIS | PTD | DIS | M0)) /*GPMC_A1*/\ - MUX_VAL(CP(GPMC_A2), (IDIS | PTD | DIS | M0)) /*GPMC_A2*/\ - MUX_VAL(CP(GPMC_A3), (IDIS | PTD | DIS | M0)) /*GPMC_A3*/\ - MUX_VAL(CP(GPMC_A4), (IDIS | PTD | DIS | M0)) /*GPMC_A4*/\ - MUX_VAL(CP(GPMC_A5), (IDIS | PTD | DIS | M0)) /*GPMC_A5*/\ - MUX_VAL(CP(GPMC_A6), (IDIS | PTD | DIS | M0)) /*GPMC_A6*/\ - MUX_VAL(CP(GPMC_A7), (IDIS | PTD | DIS | M0)) /*GPMC_A7*/\ - MUX_VAL(CP(GPMC_A8), (IDIS | PTD | DIS | M0)) /*GPMC_A8*/\ - MUX_VAL(CP(GPMC_A9), (IDIS | PTD | DIS | M0)) /*GPMC_A9*/\ - MUX_VAL(CP(GPMC_A10), (IDIS | PTD | DIS | M0)) /*GPMC_A10*/\ - MUX_VAL(CP(GPMC_D0), (IEN | PTD | DIS | M0)) /*GPMC_D0*/\ - MUX_VAL(CP(GPMC_D1), (IEN | PTD | DIS | M0)) /*GPMC_D1*/\ - MUX_VAL(CP(GPMC_D2), (IEN | PTD | DIS | M0)) /*GPMC_D2*/\ - MUX_VAL(CP(GPMC_D3), (IEN | PTD | DIS | M0)) /*GPMC_D3*/\ - MUX_VAL(CP(GPMC_D4), (IEN | PTD | DIS | M0)) /*GPMC_D4*/\ - MUX_VAL(CP(GPMC_D5), (IEN | PTD | DIS | M0)) /*GPMC_D5*/\ - MUX_VAL(CP(GPMC_D6), (IEN | PTD | DIS | M0)) /*GPMC_D6*/\ - MUX_VAL(CP(GPMC_D7), (IEN | PTD | DIS | M0)) /*GPMC_D7*/\ - MUX_VAL(CP(GPMC_D8), (IEN | PTD | DIS | M0)) /*GPMC_D8*/\ - MUX_VAL(CP(GPMC_D9), (IEN | PTD | DIS | M0)) /*GPMC_D9*/\ - MUX_VAL(CP(GPMC_D10), (IEN | PTD | DIS | M0)) /*GPMC_D10*/\ - MUX_VAL(CP(GPMC_D11), (IEN | PTD | DIS | M0)) /*GPMC_D11*/\ - MUX_VAL(CP(GPMC_D12), (IEN | PTD | DIS | M0)) /*GPMC_D12*/\ - MUX_VAL(CP(GPMC_D13), (IEN | PTD | DIS | M0)) /*GPMC_D13*/\ - MUX_VAL(CP(GPMC_D14), (IEN | PTD | DIS | M0)) /*GPMC_D14*/\ - MUX_VAL(CP(GPMC_D15), (IEN | PTD | DIS | M0)) /*GPMC_D15*/\ + MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)) /*GPMC_A1*/\ + MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0)) /*GPMC_A2*/\ + MUX_VAL(CP(GPMC_A3), (IDIS | PTU | EN | M0)) /*GPMC_A3*/\ + MUX_VAL(CP(GPMC_A4), (IDIS | PTU | EN | M0)) /*GPMC_A4*/\ + MUX_VAL(CP(GPMC_A5), (IDIS | PTU | EN | M0)) /*GPMC_A5*/\ + MUX_VAL(CP(GPMC_A6), (IDIS | PTU | EN | M0)) /*GPMC_A6*/\ + MUX_VAL(CP(GPMC_A7), (IDIS | PTU | EN | M0)) /*GPMC_A7*/\ + MUX_VAL(CP(GPMC_A8), (IDIS | PTU | EN | M0)) /*GPMC_A8*/\ + MUX_VAL(CP(GPMC_A9), (IDIS | PTU | EN | M0)) /*GPMC_A9*/\ + MUX_VAL(CP(GPMC_A10), (IDIS | PTU | EN | M0)) /*GPMC_A10*/\ + MUX_VAL(CP(GPMC_D0), (IEN | PTU | EN | M0)) /*GPMC_D0*/\ + MUX_VAL(CP(GPMC_D1), (IEN | PTU | EN | M0)) /*GPMC_D1*/\ + MUX_VAL(CP(GPMC_D2), (IEN | PTU | EN | M0)) /*GPMC_D2*/\ + MUX_VAL(CP(GPMC_D3), (IEN | PTU | EN | M0)) /*GPMC_D3*/\ + MUX_VAL(CP(GPMC_D4), (IEN | PTU | EN | M0)) /*GPMC_D4*/\ + MUX_VAL(CP(GPMC_D5), (IEN | PTU | EN | M0)) /*GPMC_D5*/\ + MUX_VAL(CP(GPMC_D6), (IEN | PTU | EN | M0)) /*GPMC_D6*/\ + MUX_VAL(CP(GPMC_D7), (IEN | PTU | EN | M0)) /*GPMC_D7*/\ + MUX_VAL(CP(GPMC_D8), (IEN | PTU | EN | M0)) /*GPMC_D8*/\ + MUX_VAL(CP(GPMC_D9), (IEN | PTU | EN | M0)) /*GPMC_D9*/\ + MUX_VAL(CP(GPMC_D10), (IEN | PTU | EN | M0)) /*GPMC_D10*/\ + MUX_VAL(CP(GPMC_D11), (IEN | PTU | EN | M0)) /*GPMC_D11*/\ + MUX_VAL(CP(GPMC_D12), (IEN | PTU | EN | M0)) /*GPMC_D12*/\ + MUX_VAL(CP(GPMC_D13), (IEN | PTU | EN | M0)) /*GPMC_D13*/\ + MUX_VAL(CP(GPMC_D14), (IEN | PTU | EN | M0)) /*GPMC_D14*/\ + MUX_VAL(CP(GPMC_D15), (IEN | PTU | EN | M0)) /*GPMC_D15*/\ MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) /*GPMC_nCS0*/\ MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M0)) /*GPMC_nCS1*/\ MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | EN | M0)) /*GPMC_nCS2*/\ MUX_VAL(CP(GPMC_NCS3), (IEN | PTU | EN | M4)) /*GPIO_54*/\ /* - MMC1_WP*/\ MUX_VAL(CP(GPMC_NCS4), (IDIS | PTU | EN | M0)) /*GPMC_nCS4*/\ - MUX_VAL(CP(GPMC_NCS5), (IDIS | PTD | DIS | M0)) /*GPMC_nCS5*/\ + MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | EN | M0)) /*GPMC_nCS5*/\ MUX_VAL(CP(GPMC_NCS6), (IEN | PTD | DIS | M0)) /*GPMC_nCS6*/\ MUX_VAL(CP(GPMC_NCS7), (IEN | PTU | EN | M0)) /*GPMC_nCS7*/\ MUX_VAL(CP(GPMC_NBE1), (IEN | PTD | DIS | M0)) /*GPMC_nCS3*/\ - MUX_VAL(CP(GPMC_CLK), (IDIS | PTD | DIS | M0)) /*GPMC_CLK*/\ + MUX_VAL(CP(GPMC_CLK), (IDIS | PTU | EN | M0)) /*GPMC_CLK*/\ MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) /*GPMC_nADV_ALE*/\ MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) /*GPMC_nOE*/\ MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)) /*GPMC_nWE*/\ @@ -127,7 +127,7 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)) /*GPMC_nWP*/\ MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) /*GPMC_WAIT0*/\ MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)) /*GPMC_WAIT1*/\ - MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | DIS | M4)) /*GPIO_64*/\ + MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)) /*GPIO_64*/\ /* - SMSC911X_NRES*/\ MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0)) /*GPMC_nCS3*/\ /*DSS*/\ @@ -270,8 +270,8 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | DIS | M0)) /*McSPI1_SOMI */\ MUX_VAL(CP(MCSPI1_CS0), (IEN | PTD | EN | M0)) /*McSPI1_CS0*/\ MUX_VAL(CP(MCSPI1_CS1), (IDIS | PTD | EN | M0)) /*McSPI1_CS1*/\ - MUX_VAL(CP(MCSPI1_CS2), (IEN | PTD | DIS | M4)) /*GPIO_176*/\ - /* - SMSC911X_IRQ*/\ + MUX_VAL(CP(MCSPI1_CS2), (IEN | PTU | DIS | M4)) /*GPIO_176 */\ + /* - LAN_INTR */\ MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA2*/\ MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA7*/\ MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA4*/\ @@ -378,4 +378,5 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /*sdrc_cke0*/\ MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /*sdrc_cke1*/

+ #endif diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c index 18a729c..b106ec9 100644 --- a/drivers/net/smc911x.c +++ b/drivers/net/smc911x.c @@ -146,10 +146,9 @@ static void smc911x_enable(struct eth_device *dev)

static int smc911x_init(struct eth_device *dev, bd_t * bd) { - printf(DRIVERNAME ": initializing\n"); + struct chip_id *id = dev->priv;

- if (smc911x_detect_chip(dev)) - goto err_out; + printf(DRIVERNAME ": detected %s controller\n", id->name);

smc911x_reset(dev);

@@ -162,9 +161,6 @@ static int smc911x_init(struct eth_device *dev, bd_t * bd) smc911x_enable(dev);

return 0; - -err_out: - return -1; }

static int smc911x_send(struct eth_device *dev, @@ -268,6 +264,12 @@ int smc911x_initialize(u8 dev_num, int base_addr) dev->recv = smc911x_rx; sprintf(dev->name, "%s-%hu", DRIVERNAME, dev_num);

+ /* Try to detect chip. Will fail if not present. */ + if (smc911x_detect_chip(dev)) { + free(dev); + return 0; + } + eth_register(dev); return 0; } diff --git a/drivers/net/smc911x.h b/drivers/net/smc911x.h index 053e330..d5bca63 100644 --- a/drivers/net/smc911x.h +++ b/drivers/net/smc911x.h @@ -441,7 +441,10 @@ static int smc911x_detect_chip(struct eth_device *dev) unsigned long val, i;

val = smc911x_reg_read(dev, BYTE_TEST); - if (val != 0x87654321) { + if (val == 0xffffffff) { + /* Special case -- no chip present */ + return -1; + } else if (val != 0x87654321) { printf(DRIVERNAME ": Invalid chip endian 0x%08lx\n", val); return -1; } @@ -455,7 +458,7 @@ static int smc911x_detect_chip(struct eth_device *dev) return -1; }

- printf(DRIVERNAME ": detected %s controller\n", chip_ids[i].name); + dev->priv = (void *)&chip_ids[i];

return 0; } diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index 07a031b..1836233 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -28,7 +28,7 @@ #define CONFIG_OMAP 1 /* in a TI OMAP core */ #define CONFIG_OMAP34XX 1 /* which is a 34XX */ #define CONFIG_OMAP3430 1 /* which is in a 3430 */ -#define CONFIG_OMAP3_OVERO 1 /* working with overo */ +#define CONFIG_OMAP3_OVERO 1 /* working with overo */

#include <asm/arch/cpu.h> /* get chip and board defs */ #include <asm/arch/omap3.h> @@ -105,8 +105,8 @@ #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ #undef CONFIG_CMD_IMI /* iminfo */ #undef CONFIG_CMD_IMLS /* List all found images */ -#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ #undef CONFIG_CMD_NFS /* NFS support */ +#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */

#define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_I2C_SPEED 100000 @@ -293,4 +293,17 @@ extern unsigned int boot_flash_sec; extern unsigned int boot_flash_type; #endif

+#if defined(CONFIG_CMD_NET) +/*---------------------------------------------------------------------------- + * SMSC9211 Ethernet from SMSC9118 family + *---------------------------------------------------------------------------- + */ + +#define CONFIG_NET_MULTI +#define CONFIG_SMC911X 1 +#define CONFIG_SMC911X_32_BIT +#define CONFIG_SMC911X_BASE 0x2C000000 + +#endif /* (CONFIG_CMD_NET) */ + #endif /* __CONFIG_H */

On Oct 5, 2009, at 8:56 AM, Steve Sakoman sakoman@gmail.com wrote:

On Sat, Sep 26, 2009 at 2:14 PM, Olof Johansson olof@lixom.net wrote:

...

Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded over tftp.

This also refactors the smc911x driver to allow for detecting when the chip is missing. I.e. the detect_chip() function is called earlier and will abort gracefully when the Chip ID read returns all 1's.

Hmm . . . I just tried this on a board without smc911x chip and it seems to hang after printing "Net".

Did it work for you in this case? Haven't had time to debug yet, but will try to look later today.

The only hardware I have is tobi, which is why I thought I cc:d you as well as asked others to test with other carriers if they had them.

I guess first thing to find out is if it's the first read that hangs or what.

-Olof

Steve

...

Signed-off-by: Olof Johansson olof@lixom.net

---

Changes since last version:

• Incorporated auto-detect based on email discussion
• Refactored some smc911x probe to deal with the above
• Incorporated the GPIO library changes
• Removed the TOBI-specific config option due to the new auto-probe

Testing on non-Tobi carrier boards would be appreciated, since I don't have any.

board/overo/overo.c | 59 ++++++++++++++++++++++++++++++ ++++++++ board/overo/overo.h | 63 ++++++++++++++++++++ +-------------------- drivers/net/smc911x.c | 14 +++++---- drivers/net/smc911x.h | 7 +++- include/configs/omap3_overo.h | 17 ++++++++++- 5 files changed, 119 insertions(+), 41 deletions(-)

diff --git a/board/overo/overo.c b/board/overo/overo.c index dd6d286..d42dc13 100644 --- a/board/overo/overo.c +++ b/board/overo/overo.c @@ -29,13 +29,20 @@

• MA 02111-1307 USA

*/ #include <common.h> +#include <netdev.h> #include <twl4030.h> #include <asm/io.h> #include <asm/arch/mux.h> +#include <asm/arch/mem.h> #include <asm/arch/sys_proto.h> +#include <asm/arch/gpio.h> #include <asm/mach-types.h> #include "overo.h"

+#if defined(CONFIG_CMD_NET) +static void setup_net_chip(void); +#endif

/*

• Routine: board_init
• Description: Early hardware init.

@@ -62,6 +69,10 @@ int misc_init_r(void) twl4030_power_init(); twl4030_led_init();

+#if defined(CONFIG_CMD_NET)

•   setup_net_chip();
  

+#endif

•  dieid_num_r();
  
   return 0;
  

@@ -77,3 +88,51 @@ void set_muxconf_regs(void) { MUX_OVERO(); }

+#if defined(CONFIG_CMD_NET) +/*

• • Routine: setup_net_chip
• • Description: Setting up the configuration GPMC registers

specific to the

• •       Ethernet hardware.
    

• */

+static void setup_net_chip(void) +{

•   struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
  

•   /* Configure GPMC registers */
  

•   writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[5].config1);
  

•   writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[5].config2);
  

•   writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[5].config3);
  

•   writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[5].config4);
  

•   writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[5].config5);
  

•   writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[5].config6);
  

•   writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[5].config7);
  

•   /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
  

•   writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base- 
  

...

gpmc_nwe);

•   /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE  
  

register */

•   writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base- 
  

...

gpmc_noe);

•   /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE  
  

register */

•   writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
  

•           &ctrl_base->gpmc_nadv_ale);
  

•   /* Make GPIO 64 as output pin and send a magic pulse  
  

through it */

•   if (!omap_request_gpio(64)) {
  

•           omap_set_gpio_direction(64, 0);
  

•           omap_set_gpio_dataout(64, 1);
  

•           udelay(1);
  

•           omap_set_gpio_dataout(64, 0);
  

•           udelay(1);
  

•           omap_set_gpio_dataout(64, 1);
  

•   }
  

+} +#endif

+int board_eth_init(bd_t *bis) +{

•   int rc = 0;
  

+#ifdef CONFIG_SMC911X

•   rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
  

+#endif

•   return rc;
  

+} diff --git a/board/overo/overo.h b/board/overo/overo.h index d9fe74e..4c7ac27 100644 --- a/board/overo/overo.h +++ b/board/overo/overo.h @@ -83,43 +83,43 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) / *SDRC_DQS2*/\ MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) / *SDRC_DQS3*/\ /*GPMC*/\

•   MUX_VAL(CP(GPMC_A1),            (IDIS | PTD | DIS | M0)) / 
  

*GPMC_A1*/\

•   MUX_VAL(CP(GPMC_A2),            (IDIS | PTD | DIS | M0)) / 
  

*GPMC_A2*/\

•   MUX_VAL(CP(GPMC_A3),            (IDIS | PTD | DIS | M0)) / 
  

*GPMC_A3*/\

•   MUX_VAL(CP(GPMC_A4),            (IDIS | PTD | DIS | M0)) / 
  

*GPMC_A4*/\

•   MUX_VAL(CP(GPMC_A5),            (IDIS | PTD | DIS | M0)) / 
  

*GPMC_A5*/\

•   MUX_VAL(CP(GPMC_A6),            (IDIS | PTD | DIS | M0)) / 
  

*GPMC_A6*/\

•   MUX_VAL(CP(GPMC_A7),            (IDIS | PTD | DIS | M0)) / 
  

*GPMC_A7*/\

•   MUX_VAL(CP(GPMC_A8),            (IDIS | PTD | DIS | M0)) / 
  

*GPMC_A8*/\

•   MUX_VAL(CP(GPMC_A9),            (IDIS | PTD | DIS | M0)) / 
  

*GPMC_A9*/\

•   MUX_VAL(CP(GPMC_A10),           (IDIS | PTD | DIS | M0)) / 
  

*GPMC_A10*/\

•   MUX_VAL(CP(GPMC_D0),            (IEN  | PTD | DIS | M0)) / 
  

*GPMC_D0*/\

•   MUX_VAL(CP(GPMC_D1),            (IEN  | PTD | DIS | M0)) / 
  

*GPMC_D1*/\

•   MUX_VAL(CP(GPMC_D2),            (IEN  | PTD | DIS | M0)) / 
  

*GPMC_D2*/\

•   MUX_VAL(CP(GPMC_D3),            (IEN  | PTD | DIS | M0)) / 
  

*GPMC_D3*/\

•   MUX_VAL(CP(GPMC_D4),            (IEN  | PTD | DIS | M0)) / 
  

*GPMC_D4*/\

•   MUX_VAL(CP(GPMC_D5),            (IEN  | PTD | DIS | M0)) / 
  

*GPMC_D5*/\

•   MUX_VAL(CP(GPMC_D6),            (IEN  | PTD | DIS | M0)) / 
  

*GPMC_D6*/\

•   MUX_VAL(CP(GPMC_D7),            (IEN  | PTD | DIS | M0)) / 
  

*GPMC_D7*/\

•   MUX_VAL(CP(GPMC_D8),            (IEN  | PTD | DIS | M0)) / 
  

*GPMC_D8*/\

•   MUX_VAL(CP(GPMC_D9),            (IEN  | PTD | DIS | M0)) / 
  

*GPMC_D9*/\

•   MUX_VAL(CP(GPMC_D10),           (IEN  | PTD | DIS | M0)) / 
  

*GPMC_D10*/\

•   MUX_VAL(CP(GPMC_D11),           (IEN  | PTD | DIS | M0)) / 
  

*GPMC_D11*/\

•   MUX_VAL(CP(GPMC_D12),           (IEN  | PTD | DIS | M0)) / 
  

*GPMC_D12*/\

•   MUX_VAL(CP(GPMC_D13),           (IEN  | PTD | DIS | M0)) / 
  

*GPMC_D13*/\

•   MUX_VAL(CP(GPMC_D14),           (IEN  | PTD | DIS | M0)) / 
  

*GPMC_D14*/\

•   MUX_VAL(CP(GPMC_D15),           (IEN  | PTD | DIS | M0)) / 
  

*GPMC_D15*/\

•   MUX_VAL(CP(GPMC_A1),            (IDIS | PTU | EN  | M0)) / 
  

*GPMC_A1*/\

•   MUX_VAL(CP(GPMC_A2),            (IDIS | PTU | EN  | M0)) / 
  

*GPMC_A2*/\

•   MUX_VAL(CP(GPMC_A3),            (IDIS | PTU | EN  | M0)) / 
  

*GPMC_A3*/\

•   MUX_VAL(CP(GPMC_A4),            (IDIS | PTU | EN  | M0)) / 
  

*GPMC_A4*/\

•   MUX_VAL(CP(GPMC_A5),            (IDIS | PTU | EN  | M0)) / 
  

*GPMC_A5*/\

•   MUX_VAL(CP(GPMC_A6),            (IDIS | PTU | EN  | M0)) / 
  

*GPMC_A6*/\

•   MUX_VAL(CP(GPMC_A7),            (IDIS | PTU | EN  | M0)) / 
  

*GPMC_A7*/\

•   MUX_VAL(CP(GPMC_A8),            (IDIS | PTU | EN  | M0)) / 
  

*GPMC_A8*/\

•   MUX_VAL(CP(GPMC_A9),            (IDIS | PTU | EN  | M0)) / 
  

*GPMC_A9*/\

•   MUX_VAL(CP(GPMC_A10),           (IDIS | PTU | EN  | M0)) / 
  

*GPMC_A10*/\

•   MUX_VAL(CP(GPMC_D0),            (IEN  | PTU | EN  | M0)) / 
  

*GPMC_D0*/\

•   MUX_VAL(CP(GPMC_D1),            (IEN  | PTU | EN  | M0)) / 
  

*GPMC_D1*/\

•   MUX_VAL(CP(GPMC_D2),            (IEN  | PTU | EN  | M0)) / 
  

*GPMC_D2*/\

•   MUX_VAL(CP(GPMC_D3),            (IEN  | PTU | EN  | M0)) / 
  

*GPMC_D3*/\

•   MUX_VAL(CP(GPMC_D4),            (IEN  | PTU | EN  | M0)) / 
  

*GPMC_D4*/\

•   MUX_VAL(CP(GPMC_D5),            (IEN  | PTU | EN  | M0)) / 
  

*GPMC_D5*/\

•   MUX_VAL(CP(GPMC_D6),            (IEN  | PTU | EN  | M0)) / 
  

*GPMC_D6*/\

•   MUX_VAL(CP(GPMC_D7),            (IEN  | PTU | EN  | M0)) / 
  

*GPMC_D7*/\

•   MUX_VAL(CP(GPMC_D8),            (IEN  | PTU | EN  | M0)) / 
  

*GPMC_D8*/\

•   MUX_VAL(CP(GPMC_D9),            (IEN  | PTU | EN  | M0)) / 
  

*GPMC_D9*/\

•   MUX_VAL(CP(GPMC_D10),           (IEN  | PTU | EN  | M0)) / 
  

*GPMC_D10*/\

•   MUX_VAL(CP(GPMC_D11),           (IEN  | PTU | EN  | M0)) / 
  

*GPMC_D11*/\

•   MUX_VAL(CP(GPMC_D12),           (IEN  | PTU | EN  | M0)) / 
  

*GPMC_D12*/\

•   MUX_VAL(CP(GPMC_D13),           (IEN  | PTU | EN  | M0)) / 
  

*GPMC_D13*/\

•   MUX_VAL(CP(GPMC_D14),           (IEN  | PTU | EN  | M0)) / 
  

*GPMC_D14*/\

•   MUX_VAL(CP(GPMC_D15),           (IEN  | PTU | EN  | M0)) / 
  

*GPMC_D15*/\ MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) / *GPMC_nCS0*/\ MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M0)) / *GPMC_nCS1*/\ MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | EN | M0)) / *GPMC_nCS2*/\ MUX_VAL(CP(GPMC_NCS3), (IEN | PTU | EN | M4)) / *GPIO_54*/\ /*

• MMC1_WP*/\ MUX_VAL(CP(GPMC_NCS4), (IDIS | PTU | EN | M0)) /

*GPMC_nCS4*/\

•   MUX_VAL(CP(GPMC_NCS5),          (IDIS | PTD | DIS | M0)) / 
  

*GPMC_nCS5*/\

•   MUX_VAL(CP(GPMC_NCS5),          (IDIS | PTU | EN  | M0)) / 
  

*GPMC_nCS5*/\ MUX_VAL(CP(GPMC_NCS6), (IEN | PTD | DIS | M0)) / *GPMC_nCS6*/\ MUX_VAL(CP(GPMC_NCS7), (IEN | PTU | EN | M0)) / *GPMC_nCS7*/\ MUX_VAL(CP(GPMC_NBE1), (IEN | PTD | DIS | M0)) / *GPMC_nCS3*/\

•   MUX_VAL(CP(GPMC_CLK),           (IDIS | PTD | DIS | M0)) / 
  

*GPMC_CLK*/\

•   MUX_VAL(CP(GPMC_CLK),           (IDIS | PTU | EN  | M0)) / 
  

*GPMC_CLK*/\ MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) / *GPMC_nADV_ALE*/\ MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) / *GPMC_nOE*/\ MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)) / *GPMC_nWE*/\ @@ -127,7 +127,7 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)) / *GPMC_nWP*/\ MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) / *GPMC_WAIT0*/\ MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)) / *GPMC_WAIT1*/\

•   MUX_VAL(CP(GPMC_WAIT2),         (IEN  | PTU | DIS | M4)) / 
  

*GPIO_64*/\

•   MUX_VAL(CP(GPMC_WAIT2),         (IEN  | PTU | EN  | M4)) / 
  

*GPIO_64*/\ /*

• SMSC911X_NRES*/\ MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0)) /

*GPMC_nCS3*/\ /*DSS*/\ @@ -270,8 +270,8 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | DIS | M0)) / *McSPI1_SOMI */\ MUX_VAL(CP(MCSPI1_CS0), (IEN | PTD | EN | M0)) / *McSPI1_CS0*/\ MUX_VAL(CP(MCSPI1_CS1), (IDIS | PTD | EN | M0)) / *McSPI1_CS1*/\

•   MUX_VAL(CP(MCSPI1_CS2),         (IEN  | PTD | DIS | M4)) / 
  

*GPIO_176*/\

•                                                            /*  
  

• SMSC911X_IRQ*/\

•   MUX_VAL(CP(MCSPI1_CS2),         (IEN  | PTU | DIS | M4)) / 
  

*GPIO_176 */\

•                                                            /*  
  

• LAN_INTR */\ MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | DIS | M3)) /

*HSUSB2_DATA2*/\ MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | DIS | M3)) / *HSUSB2_DATA7*/\ MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | DIS | M3)) / *HSUSB2_DATA4*/\ @@ -378,4 +378,5 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) / *sdrc_cke0*/\ MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) / *sdrc_cke1*/

#endif diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c index 18a729c..b106ec9 100644 --- a/drivers/net/smc911x.c +++ b/drivers/net/smc911x.c @@ -146,10 +146,9 @@ static void smc911x_enable(struct eth_device *dev)

static int smc911x_init(struct eth_device *dev, bd_t * bd) {

•   printf(DRIVERNAME ": initializing\n");
  

•   struct chip_id *id = dev->priv;
  
  

•   if (smc911x_detect_chip(dev))
  

•           goto err_out;
  

•    printf(DRIVERNAME ": detected %s controller\n", id->name);
  
   smc911x_reset(dev);
  
  

@@ -162,9 +161,6 @@ static int smc911x_init(struct eth_device *dev, bd_t * bd) smc911x_enable(dev);

   return 0;

-err_out:

•   return -1;
  

}

static int smc911x_send(struct eth_device *dev, @@ -268,6 +264,12 @@ int smc911x_initialize(u8 dev_num, int base_addr) dev->recv = smc911x_rx; sprintf(dev->name, "%s-%hu", DRIVERNAME, dev_num);

•   /* Try to detect chip. Will fail if not present. */
  

•   if (smc911x_detect_chip(dev)) {
  

•           free(dev);
  

•           return 0;
  

•   }
  

•  eth_register(dev);
   return 0;
  

} diff --git a/drivers/net/smc911x.h b/drivers/net/smc911x.h index 053e330..d5bca63 100644 --- a/drivers/net/smc911x.h +++ b/drivers/net/smc911x.h @@ -441,7 +441,10 @@ static int smc911x_detect_chip(struct eth_device *dev) unsigned long val, i;

   val = smc911x_reg_read(dev, BYTE_TEST);

•   if (val != 0x87654321) {
  

•   if (val == 0xffffffff) {
  

•           /* Special case -- no chip present */
  

•           return -1;
  

•   } else if (val != 0x87654321) {
           printf(DRIVERNAME ": Invalid chip endian 0x%08lx\n",  
  

val); return -1; } @@ -455,7 +458,7 @@ static int smc911x_detect_chip(struct eth_device *dev) return -1; }

•   printf(DRIVERNAME ": detected %s controller\n", chip_ids 
  

[i].name);

•   dev->priv = (void *)&chip_ids[i];
  
   return 0;
  

} diff --git a/include/configs/omap3_overo.h b/include/configs/ omap3_overo.h index 07a031b..1836233 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -28,7 +28,7 @@ #define CONFIG_OMAP 1 /* in a TI OMAP core */ #define CONFIG_OMAP34XX 1 /* which is a 34XX */ #define CONFIG_OMAP3430 1 /* which is in a 3430 */ -#define CONFIG_OMAP3_OVERO 1 /* working with overo */ +#define CONFIG_OMAP3_OVERO 1 /* working with overo */

#include <asm/arch/cpu.h> /* get chip and board defs */ #include <asm/arch/omap3.h> @@ -105,8 +105,8 @@ #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ #undef CONFIG_CMD_IMI /* iminfo */ #undef CONFIG_CMD_IMLS /* List all found images */ -#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ #undef CONFIG_CMD_NFS /* NFS support */ +#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */

#define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_I2C_SPEED 100000 @@ -293,4 +293,17 @@ extern unsigned int boot_flash_sec; extern unsigned int boot_flash_type; #endif

+#if defined(CONFIG_CMD_NET) +/

*--

---

---

• • SMSC9211 Ethernet from SMSC9118 family

*--

---

---

• */

+#define CONFIG_NET_MULTI +#define CONFIG_SMC911X 1 +#define CONFIG_SMC911X_32_BIT +#define CONFIG_SMC911X_BASE 0x2C000000

+#endif /* (CONFIG_CMD_NET) */

#endif /* __CONFIG_H */

1.6.0.4

Steve Sakoman wrote:

On Wed, Oct 7, 2009 at 9:50 PM, Dirk Behme dirk.behme@googlemail.com wrote:

...

Olof Johansson wrote:

...

On Oct 5, 2009, at 8:56 AM, Steve Sakoman sakoman@gmail.com wrote:

...

On Sat, Sep 26, 2009 at 2:14 PM, Olof Johansson olof@lixom.net wrote:

...

Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded over tftp.

This also refactors the smc911x driver to allow for detecting when the chip is missing. I.e. the detect_chip() function is called earlier and will abort gracefully when the Chip ID read returns all 1's.

Hmm . . . I just tried this on a board without smc911x chip and it seems to hang after printing "Net".

Did it work for you in this case? Haven't had time to debug yet, but will try to look later today.

The only hardware I have is tobi, which is why I thought I cc:d you as well as asked others to test with other carriers if they had them.

I guess first thing to find out is if it's the first read that hangs or what.

Any idea how to go on with this? I have no Tobi, so unfortunately I can't help here.

I've been testing the patch below, which seems to work with all boards I've tried. It simply moves the test a bit earlier.

Great, thanks!

Olof: Could you test this? If it works for you, too, we should apply it on top of u-boot-ti (and u-boot-arm/next) then (or modify initial [1] ?).

Most probably we need a Signed-off-by then ;)

Thanks

Dirk

[1] http://git.denx.de/?p=u-boot/u-boot-arm.git;a=commit;h=4eb3af078267e103fb957...

Steve

--- git/drivers/net/smc911x.c-orig 2009-09-29 16:24:48.000000000 -0700 +++ git/drivers/net/smc911x.c 2009-10-05 20:41:55.000000000 -0700 @@ -249,6 +249,12 @@ int smc911x_initialize(u8 dev_num, int b

dev->iobase = base_addr;

• /* Try to detect chip. Will fail if not present. */
• if (smc911x_detect_chip(dev)) {

• free(dev);
  

• return 0;
  

• }
• addrh = smc911x_get_mac_csr(dev, ADDRH); addrl = smc911x_get_mac_csr(dev, ADDRL); dev->enetaddr[0] = addrl;

@@ -264,12 +270,6 @@ int smc911x_initialize(u8 dev_num, int b dev->recv = smc911x_rx; sprintf(dev->name, "%s-%hu", DRIVERNAME, dev_num);

• /* Try to detect chip. Will fail if not present. */
• if (smc911x_detect_chip(dev)) {

• free(dev);
  

• return 0;
  

• }
• eth_register(dev); return 0;

}

...

Most probably we need a Signed-off-by then ;)

Take your pick. Either a:

Acked-by: Olof Johansson olof@lixom.net

Or apply the below revised patch instead.

SMC911X: Add chip auto detection

Refactor the smc911x driver to allow for detecting when the chip is missing. I.e. the detect_chip() function is called earlier and will abort gracefully when the Chip ID read returns all 1's.

Based on testing from Steve Sakoman, the test has been moved up in the function to not hang on systems without ethernet.

Signed-off-by: Olof Johansson olof@lixom.net Acked-by: Dirk Behme dirk.behme@googlemail.com Acked-by: Ben Warren biggerbadderben@gmail.com

Are we sure we have Ben's ACK.

I can't see an e-mail from him today. Or am I missing something?

---

drivers/net/smc911x.c | 14 ++++++++------ drivers/net/smc911x.h | 7 +++++-- 2 files changed, 13 insertions(+), 8 deletions(-)

diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c index 18a729c..df73478 100644 --- a/drivers/net/smc911x.c +++ b/drivers/net/smc911x.c @@ -146,10 +146,9 @@ static void smc911x_enable(struct eth_device *dev)

static int smc911x_init(struct eth_device *dev, bd_t * bd) {

• printf(DRIVERNAME ": initializing\n");

• struct chip_id *id = dev->priv;

• if (smc911x_detect_chip(dev))

• goto err_out;
  

• printf(DRIVERNAME ": detected %s controller\n", id->name);

  smc911x_reset(dev);

@@ -162,9 +161,6 @@ static int smc911x_init(struct eth_device *dev, bd_t * bd) smc911x_enable(dev);

return 0;

-err_out:

• return -1;

}

static int smc911x_send(struct eth_device *dev, @@ -253,6 +249,12 @@ int smc911x_initialize(u8 dev_num, int base_addr)

dev->iobase = base_addr;

• /* Try to detect chip. Will fail if not present. */
• if (smc911x_detect_chip(dev)) {

• free(dev);
  

• return 0;
  

• }
• addrh = smc911x_get_mac_csr(dev, ADDRH); addrl = smc911x_get_mac_csr(dev, ADDRL); dev->enetaddr[0] = addrl;

diff --git a/drivers/net/smc911x.h b/drivers/net/smc911x.h index 053e330..d5bca63 100644 --- a/drivers/net/smc911x.h +++ b/drivers/net/smc911x.h @@ -441,7 +441,10 @@ static int smc911x_detect_chip(struct eth_device *dev) unsigned long val, i;

val = smc911x_reg_read(dev, BYTE_TEST);

• if (val != 0x87654321) {

• if (val == 0xffffffff) {

• /* Special case -- no chip present */
  

• return -1;
  

• } else if (val != 0x87654321) { printf(DRIVERNAME ": Invalid chip endian 0x%08lx\n", val); return -1; }

@@ -455,7 +458,7 @@ static int smc911x_detect_chip(struct eth_device *dev) return -1; }

• printf(DRIVERNAME ": detected %s controller\n", chip_ids[i].name);

• dev->priv = (void *)&chip_ids[i];

  return 0;

}

1.6.3.3