These are no-longer present in U-Boot. Drop them.

Signed-off-by: Simon Glass sjg@chromium.org ---

README | 25 ------------------------- 1 file changed, 25 deletions(-)

diff --git a/README b/README index 5499a4c..e0c78fb 100644 --- a/README +++ b/README @@ -325,27 +325,6 @@ The following options need to be configured: - CPU Daughterboard Type: (if CONFIG_ATSTK1000 is defined) Define exactly one, e.g. CONFIG_ATSTK1002

-- CPU Module Type: (if CONFIG_COGENT is defined) - Define exactly one of - CONFIG_CMA286_60_OLD ---- FIXME --- not tested yet: - CONFIG_CMA286_60, CONFIG_CMA286_21, CONFIG_CMA286_60P, - CONFIG_CMA287_23, CONFIG_CMA287_50 - -- Motherboard Type: (if CONFIG_COGENT is defined) - Define exactly one of - CONFIG_CMA101, CONFIG_CMA102 - -- Motherboard I/O Modules: (if CONFIG_COGENT is defined) - Define one or more of - CONFIG_CMA302 - -- Motherboard Options: (if CONFIG_CMA101 or CONFIG_CMA102 are defined) - Define one or more of - CONFIG_LCD_HEARTBEAT - update a character position on - the LCD display every second with - a "rotator" |-/|-/ - - Marvell Family Member CONFIG_SYS_MVFS - define it if you want to enable multiple fs option at one time @@ -3746,10 +3725,6 @@ Configuration Settings: - CONFIG_SYS_SDRAM_BASE: Physical start address of SDRAM. _Must_ be 0 here.

-- CONFIG_SYS_MBIO_BASE: - Physical start address of Motherboard I/O (if using a - Cogent motherboard) - - CONFIG_SYS_FLASH_BASE: Physical start address of Flash memory.

There appear to be neither implemented nor used. Drop them.

Signed-off-by: Simon Glass sjg@chromium.org ---

README | 12 +----------- doc/README.JFFS2 | 43 +++---------------------------------------- doc/README.JFFS2_NAND | 20 ++------------------ 3 files changed, 6 insertions(+), 69 deletions(-)

diff --git a/README b/README index 57dd79c..cdd58db 100644 --- a/README +++ b/README @@ -1649,23 +1649,13 @@ The following options need to be configured: Default is GPT_ENTRY_NAME (currently "gpt") if undefined.

- Journaling Flash filesystem support: - CONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF, CONFIG_JFFS2_NAND_SIZE, - CONFIG_JFFS2_NAND_DEV + CONFIG_JFFS2_NAND Define these for a default partition on a NAND device

CONFIG_SYS_JFFS2_FIRST_SECTOR, CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS Define these for a default partition on a NOR device

- CONFIG_SYS_JFFS_CUSTOM_PART - Define this to create an own partition. You have to provide a - function struct part_info* jffs2_part_info(int part_num) - - If you define only one JFFS2 partition you may also want to - #define CONFIG_SYS_JFFS_SINGLE_PART 1 - to disable the command chpart. This is the default when you - have not defined a custom partition - - FAT(File Allocation Table) filesystem write function support: CONFIG_FAT_WRITE

diff --git a/doc/README.JFFS2 b/doc/README.JFFS2 index f0e9bc1..604e5b9 100644 --- a/doc/README.JFFS2 +++ b/doc/README.JFFS2 @@ -19,52 +19,15 @@ more or less a bubble sort. That algorithm is known to be O(n^2), thus you should really consider if you can avoid it!

-There is two ways for JFFS2 to find the disk. The default way uses -the flash_info structure to find the start of a JFFS2 disk (called -partition in the code) and you can change where the partition is with -two defines. +There only one way for JFFS2 to find the disk. It uses the flash_info +structure to find the start of a JFFS2 disk (called partition in the code) +and you can change where the partition is with two defines.

CONFIG_SYS_JFFS2_FIRST_BANK defined the first flash bank to use

CONFIG_SYS_JFFS2_FIRST_SECTOR defines the first sector to use - - -The second way is to define CONFIG_SYS_JFFS_CUSTOM_PART and implement the -jffs2_part_info(int part_num) function in your board specific files. -In this mode CONFIG_SYS_JFFS2_FIRST_BANK and CONFIG_SYS_JFFS2_FIRST_SECTOR is not -used. - -The input is a partition number starting with 0. -Return a pointer to struct part_info or NULL for error; - -Ex jffs2_part_info() for one partition. ---- -#if defined CONFIG_SYS_JFFS_CUSTOM_PART -#include <jffs2/jffs2.h> - -static struct part_info part; - -struct part_info* -jffs2_part_info(int part_num) -{ - if(part_num==0){ - if(part.usr_priv==(void*)1) - return &part; - - memset(&part, 0, sizeof(part)); - part.offset=(char*)0xFF800000; - part.size=1024*1024*8; - - /* Mark the struct as ready */ - part.usr_priv=(void*)1; - - return &part; - } - return 0; -} -#endif ---

TODO. diff --git a/doc/README.JFFS2_NAND b/doc/README.JFFS2_NAND index 09788d5..92fa0f6 100644 --- a/doc/README.JFFS2_NAND +++ b/doc/README.JFFS2_NAND @@ -2,23 +2,7 @@ JFFS2 NAND support:

To enable, use the following #define in the board configuration file:

-#define CONFIG_JFFS2_NAND 1 +#define CONFIG_JFFS2_NAND

Configuration of partitions is similar to how this is done in U-Boot -for JFFS2 on top NOR flash. If a single partition is used, it can be -configured using the following #defines in the configuration file: - -#define CONFIG_JFFS2_NAND_DEV 0 /* nand device jffs2 lives on */ -#define CONFIG_JFFS2_NAND_OFF 0 /* start of jffs2 partition */ -#define CONFIG_JFFS2_NAND_SIZE 2*1024*1024 /* size of jffs2 partition */ - -If more than a single partition is desired, the user can define a -CONFIG_SYS_JFFS_CUSTOM_PART macro and implement a - - struct part_info* jffs2_part_info(int part_num) - -function in a board-specific module. An example of such function is -available in common/cmd_jffs2.c - -The default configuration for the DAVE board has a single JFFS2 -partition of 2 MB size. +for JFFS2 on top NOR flash.

This is not used in U-Boot.

Signed-off-by: Simon Glass sjg@chromium.org ---

README | 5 ----- 1 file changed, 5 deletions(-)

diff --git a/README b/README index 703c5f4..da1c033 100644 --- a/README +++ b/README @@ -695,11 +695,6 @@ The following options need to be configured: This causes ft_system_setup() to be called before booting the kernel.

- CONFIG_OF_BOOT_CPU - - This define fills in the correct boot CPU in the boot - param header, the default value is zero if undefined. - CONFIG_OF_IDE_FIXUP

U-Boot can detect if an IDE device is present or not.

This is not used in U-Boot.

Signed-off-by: Simon Glass sjg@chromium.org ---

README | 4 ---- 1 file changed, 4 deletions(-)

diff --git a/README b/README index 43e4d99..7f5de6b 100644 --- a/README +++ b/README @@ -1481,10 +1481,6 @@ The following options need to be configured: Derive USB clock from external clock "blah" - CONFIG_SYS_USB_EXTC_CLK 0x02

- CONFIG_SYS_USB_BRG_CLK 0xBLAH - Derive USB clock from brgclk - - CONFIG_SYS_USB_BRG_CLK 0x04 - If you have a USB-IF assigned VendorID then you may wish to define your own vendor specific values either in BoardName.h or directly in usbd_vendor_info.h. If you don't define

CONFIG_SYS_NUM_I2C_ADAPTERS and CONFIG_SYS_I2C_MULTI_NOPROBES are not used in U-Boot, so drop them.

Signed-off-by: Simon Glass sjg@chromium.org ---

README | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/README b/README index 0c90415..614a81c 100644 --- a/README +++ b/README @@ -2326,10 +2326,7 @@ CBFS (Coreboot Filesystem) support additional defines:

CONFIG_SYS_NUM_I2C_BUSES - Hold the number of i2c buses you want to use. If you - don't use/have i2c muxes on your i2c bus, this - is equal to CONFIG_SYS_NUM_I2C_ADAPTERS, and you can - omit this define. + Hold the number of i2c buses you want to use.

CONFIG_SYS_I2C_DIRECT_BUS define this, if you don't use i2c muxes on your hardware. @@ -2543,7 +2540,7 @@ CBFS (Coreboot Filesystem) support will skip addresses 0x50 and 0x68 on a board with one I2C bus

#define CONFIG_I2C_MULTI_BUS - #define CONFIG_SYS_I2C_MULTI_NOPROBES {{0,0x50},{0,0x68},{1,0x54}} + #define CONFIG_SYS_I2C_NOPROBES {{0,0x50},{0,0x68},{1,0x54}}

will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1

This appears to be calculated automatically now. Drop the old reference.

Signed-off-by: Simon Glass sjg@chromium.org ---

README | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/README b/README index 614a81c..17dc34b 100644 --- a/README +++ b/README @@ -4480,7 +4480,7 @@ Low Level (hardware related) configuration options: CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial data is located at the end of the available space (sometimes written as (CONFIG_SYS_INIT_RAM_SIZE - - CONFIG_SYS_INIT_DATA_SIZE), and the initial stack is just + GENERATED_GBL_DATA_SIZE), and the initial stack is just below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET) downward.

This issue covered by this doc appears to be fixed, so let's remove the README.

Signed-off-by: Simon Glass sjg@chromium.org ---

doc/README.at91-soc | 48 ------------------------------------------------ 1 file changed, 48 deletions(-) delete mode 100644 doc/README.at91-soc

diff --git a/doc/README.at91-soc b/doc/README.at91-soc deleted file mode 100644 index 9a9f74e..0000000 --- a/doc/README.at91-soc +++ /dev/null @@ -1,48 +0,0 @@ - New C structure AT91 SoC access -================================= - -The goal --------- - -Currently the at91 arch uses hundreds of address defines and special -at91_xxxx_write/read functions to access the SOC. -The u-boot project perferred method is to access memory mapped hw -regisister via a c structure. - -e.g. old - - *AT91C_PIOA_IDR = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK; - *AT91C_PIOC_PUDR = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK; - *AT91C_PIOC_PER = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK; - *AT91C_PIOC_OER = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK; - *AT91C_PIOC_PIO = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK; - - at91_sys_write(AT91_RSTC_CR, - AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); - -e.g new - pin = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK; - writel(pin, &pio->pioa.idr); - writel(pin, &pio->pioa.pudr); - writel(pin, &pio->pioa.per); - writel(pin, &pio->pioa.oer); - writel(pin, &pio->pioa.sodr); - - writel(AT91_RSTC_KEY | AT91_RSTC_CR_PROCRST | - AT91_RSTC_CR_PERRST, &rstc->cr); - -The method for updating ------------------------- - -1. add's the temporary CONFIG_AT91_LEGACY to all at91 board configs -2. Display a compile time warning, if the board has not been converted -3. add new structures for SoC access -4. Convert arch, driver and boards file to new SoC -5. remove legacy code, if all boards and drives are ready - -2013-10-30 Andreas Bießmann andreas@biessmann.org: - -The goal is almost reached, we could remove the CONFIG_AT91_LEGACY switch but -remain the CONFIG_ATMEL_LEGACY switch until the GPIO disaster is fixed. The -AT91 spi driver has also some CONFIG_ATMEL_LEGACY stuff left, so another point -to fix until this README can be removed.

The only content of this file is CONFIG options which are no-longer present in U-Boot. Drop it.

Signed-off-by: Simon Glass sjg@chromium.org ---

doc/README.imx31 | 29 ----------------------------- 1 file changed, 29 deletions(-) delete mode 100644 doc/README.imx31

diff --git a/doc/README.imx31 b/doc/README.imx31 deleted file mode 100644 index 91ef766..0000000 --- a/doc/README.imx31 +++ /dev/null @@ -1,29 +0,0 @@ -U-Boot for Freescale i.MX31 - -This file contains information for the port of U-Boot to the Freescale -i.MX31 SoC. - -1. CONFIGURATION OPTIONS/SETTINGS ---------------------------------- - -1.1 Configuration of MC13783 SPI bus ------------------------------------- - The power management companion chip MC13783 is connected to the - i.MX31 via an SPI bus. Use the following configuration options - to setup the bus and chip select used for a particular board. - - CONFIG_MC13783_SPI_BUS -- defines the SPI bus the MC13783 is connected to. - Note that 0 is CSPI1, 1 is CSPI2 and 2 is CSPI3. - CONFIG_MC13783_SPI_CS -- define the chip select the MC13783 s connected to. - -1.2 Timer precision -------------------- - CONFIG_MX31_TIMER_HIGH_PRECISION - - Enable higher precision timer. The low-precision timer - (default) provides approximately 4% error, whereas the - high-precision timer is about 0.4% accurate. The extra - accuracy is achieved at the cost of higher computational - overhead, which, in places where time is measured, should - not be critical, so, it should be safe to enable this - option.

This should be CONFIG_SYS_MAX_NAND_DEVICE. Fix it.

Signed-off-by: Simon Glass sjg@chromium.org ---

doc/README.nand | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/doc/README.nand b/doc/README.nand index f1c20ff..2295bb2 100644 --- a/doc/README.nand +++ b/doc/README.nand @@ -160,7 +160,7 @@ Configuration Options:

/* * devnum is the device number to be used in nand commands - * and in mtd->name. Must be less than CONFIG_SYS_NAND_MAX_DEVICE. + * and in mtd->name. Must be less than CONFIG_SYS_MAX_NAND_DEVICE. */ if (nand_register(devnum, mtd)) error out