From: Hou Zhiqiang Zhiqiang.Hou@nxp.com

Signed-off-by: Hou Zhiqiang Zhiqiang.Hou@nxp.com --- board/freescale/ls1021aiot/ls1021aiot.c | 4 ---- board/freescale/ls1021atwr/ls1021atwr.c | 1 - board/freescale/ls1046aqds/ls1046aqds.c | 4 ---- board/freescale/ls1046ardb/ls1046ardb.c | 4 ---- 4 files changed, 13 deletions(-)

diff --git a/board/freescale/ls1021aiot/ls1021aiot.c b/board/freescale/ls1021aiot/ls1021aiot.c index 3340e4d..5854e2d 100644 --- a/board/freescale/ls1021aiot/ls1021aiot.c +++ b/board/freescale/ls1021aiot/ls1021aiot.c @@ -201,10 +201,6 @@ int board_init(void)

ls102xa_smmu_stream_id_init();

-#ifdef CONFIG_LAYERSCAPE_NS_ACCESS - enable_layerscape_ns_access(); -#endif - return 0; }

diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c index ff32d5c..2da0677 100644 --- a/board/freescale/ls1021atwr/ls1021atwr.c +++ b/board/freescale/ls1021atwr/ls1021atwr.c @@ -435,7 +435,6 @@ void board_init_f(ulong dummy) /* Allow OCRAM access permission as R/W */ #ifdef CONFIG_LAYERSCAPE_NS_ACCESS enable_layerscape_ns_access(); - enable_layerscape_ns_access(); #endif

/* diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c index 057a11d..883abf7 100644 --- a/board/freescale/ls1046aqds/ls1046aqds.c +++ b/board/freescale/ls1046aqds/ls1046aqds.c @@ -261,10 +261,6 @@ int board_init(void) config_serdes_mux(); #endif

-#ifdef CONFIG_LAYERSCAPE_NS_ACCESS - enable_layerscape_ns_access(); -#endif - if (adjust_vdd(0)) printf("Warning: Adjusting core voltage failed.\n");

diff --git a/board/freescale/ls1046ardb/ls1046ardb.c b/board/freescale/ls1046ardb/ls1046ardb.c index 1dd5e69..33f1afd 100644 --- a/board/freescale/ls1046ardb/ls1046ardb.c +++ b/board/freescale/ls1046ardb/ls1046ardb.c @@ -69,10 +69,6 @@ int board_init(void) { struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;

-#ifdef CONFIG_LAYERSCAPE_NS_ACCESS - enable_layerscape_ns_access(); -#endif - #ifdef CONFIG_SECURE_BOOT /* * In case of Secure Boot, the IBR configures the SMMU