[U-Boot] ti, am3517: errata 430973 workaround
Hi,
A while ago [1], a RFC was posted to disable workaround for besides others, errata 430973. It is a bit unclear to me which revision actually need this workaround, but as suggested in [2] also enabling this workaround in Linux seem to make some weird problems go away in linux (signal 4, bad instruction, 11 segfaults etc).
As said, I am a bit in doubt why this works. The board in question is a tam3517 derived one:
cat /proc/cpuinfo Processor : ARMv7 Processor rev 7 (v7l) BogoMIPS : 397.57 Features : swp half thumb fastmult vfp edsp neon vfpv3 tls CPU implementer : 0x41 CPU architecture: 7 CPU variant : 0x1 CPU part : 0xc08 CPU revision : 7
Which makes this a r1p7 I assume, and hence the workaround of linux, CONFIG_ARM_ERRATA_430973, "This option enables the workaround for the 430973 Cortex-A8 (r1p0..r1p2) erratum", should not be needed it seems.
On the other hand Andreas Bießman, wrote at [3] "I have rev 20.0 from 13-Apr-10. The three mentioned errata should be fixed in r2p1." note, this mentions r2p1 not r1p2!
Since I don't have access to "ARM Core Cortex-A8 (AT400/AT401) errata", I cannot look this up. Hence the question, is u-boot wrong by enabling this workaround for a r1p7 revision or is the comment in the kernel flawed? (or am I missing something else..)
If someone could shed some light on this it would be appreciated.
Regards, Jeroen
[1] http://lists.denx.de/pipermail/u-boot/2013-July/158377.html [2] http://lists.denx.de/pipermail/u-boot/2013-July/158404.html [3] http://lists.denx.de/pipermail/u-boot/2013-July/158386.html
Hi,
On 12/08/2014 11:19 PM, Jeroen Hofstee wrote:
Hi,
A while ago [1], a RFC was posted to disable workaround for besides others, errata 430973. It is a bit unclear to me which revision actually need this workaround, but as suggested in [2] also enabling this workaround in Linux seem to make some weird problems go away in linux (signal 4, bad instruction, 11 segfaults etc).
As said, I am a bit in doubt why this works. The board in question is a tam3517 derived one:
cat /proc/cpuinfo Processor : ARMv7 Processor rev 7 (v7l) BogoMIPS : 397.57 Features : swp half thumb fastmult vfp edsp neon vfpv3 tls CPU implementer : 0x41 CPU architecture: 7 CPU variant : 0x1 CPU part : 0xc08 CPU revision : 7
Which makes this a r1p7 I assume, and hence the workaround of linux, CONFIG_ARM_ERRATA_430973, "This option enables the workaround for the 430973 Cortex-A8 (r1p0..r1p2) erratum", should not be needed it seems.
On the other hand Andreas Bießman, wrote at [3] "I have rev 20.0 from 13-Apr-10. The three mentioned errata should be fixed in r2p1." note, this mentions r2p1 not r1p2!
Since I don't have access to "ARM Core Cortex-A8 (AT400/AT401) errata", I cannot look this up. Hence the question, is u-boot wrong by enabling this workaround for a r1p7 revision or is the comment in the kernel flawed? (or am I missing something else..)
my AT400/AT401/AT490 r20.0 (13-Apr-10) says #430973 affects r1p1,m r1p2, r1p3, r1p7 but none since r2p1. So it seems the kernel is wrong here.
Best regards
Andreas Bießmann
[1] http://lists.denx.de/pipermail/u-boot/2013-July/158377.html [2] http://lists.denx.de/pipermail/u-boot/2013-July/158404.html [3] http://lists.denx.de/pipermail/u-boot/2013-July/158386.html
On Mon, Dec 8, 2014 at 4:19 PM, Jeroen Hofstee jeroen@myspectrum.nl wrote:
Hi,
A while ago [1], a RFC was posted to disable workaround for besides others, errata 430973. It is a bit unclear to me which revision actually need this workaround, but as suggested in [2] also enabling this workaround in Linux seem to make some weird problems go away in linux (signal 4, bad instruction, 11 segfaults etc).
As said, I am a bit in doubt why this works. The board in question is a tam3517 derived one:
cat /proc/cpuinfo Processor : ARMv7 Processor rev 7 (v7l) BogoMIPS : 397.57 Features : swp half thumb fastmult vfp edsp neon vfpv3 tls CPU implementer : 0x41 CPU architecture: 7 CPU variant : 0x1 CPU part : 0xc08 CPU revision : 7
Which makes this a r1p7 I assume, and hence the workaround of linux, CONFIG_ARM_ERRATA_430973, "This option enables the workaround for the 430973 Cortex-A8 (r1p0..r1p2) erratum", should not be needed it seems.
Digging thru my old beagle notes 430973 is also needed for "r1p3" (dm3730/bb-xm), so that config option was never updated since the errata was first discovered in r1p2 devices..
Fixed in r2p1 sounds about right, as i know for sure it works fine in 'r3p2' (am335x/bbb)
Regards,
Hello Robert, Andreas,
On 09-12-14 22:45, Robert Nelson wrote:
On Mon, Dec 8, 2014 at 4:19 PM, Jeroen Hofstee jeroen@myspectrum.nl wrote:
Hi,
A while ago [1], a RFC was posted to disable workaround for besides others, errata 430973. It is a bit unclear to me which revision actually need this workaround, but as suggested in [2] also enabling this workaround in Linux seem to make some weird problems go away in linux (signal 4, bad instruction, 11 segfaults etc).
As said, I am a bit in doubt why this works. The board in question is a tam3517 derived one:
cat /proc/cpuinfo Processor : ARMv7 Processor rev 7 (v7l) BogoMIPS : 397.57 Features : swp half thumb fastmult vfp edsp neon vfpv3 tls CPU implementer : 0x41 CPU architecture: 7 CPU variant : 0x1 CPU part : 0xc08 CPU revision : 7
Which makes this a r1p7 I assume, and hence the workaround of linux, CONFIG_ARM_ERRATA_430973, "This option enables the workaround for the 430973 Cortex-A8 (r1p0..r1p2) erratum", should not be needed it seems.
Digging thru my old beagle notes 430973 is also needed for "r1p3" (dm3730/bb-xm), so that config option was never updated since the errata was first discovered in r1p2 devices..
Fixed in r2p1 sounds about right, as i know for sure it works fine in 'r3p2' (am335x/bbb)
Thanks for the clarification. I sent a patch to the linux folks to update the help text.
Regards, Jeroen
participants (3)
-
Andreas Bießmann -
Jeroen Hofstee -
Robert Nelson