[PATCH v1 0/4] Add NPCM8xx more feature support
1. support 4g ram and new memory layout 2. A2 cpu support 3. fix pinctrl, misc driver error
Jim Liu (4): board: nuvoton: arbel: change uboot load address pinctrl: nuvoton: fix reset reason error for poweron misc: npcm_host_intf: change initialization sequence arch: arm: npcm8xx: add cpu version and 4G ram support
arch/arm/include/asm/arch-npcm8xx/gcr.h | 1 + arch/arm/mach-npcm/npcm8xx/cpu.c | 12 +++- board/nuvoton/arbel_evb/Kconfig | 4 +- board/nuvoton/arbel_evb/arbel_evb.c | 70 ++++++++++++++++++++++- configs/arbel_evb_defconfig | 15 ++++- drivers/misc/npcm_host_intf.c | 6 +- drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 3 + include/configs/arbel.h | 5 +- 8 files changed, 104 insertions(+), 12 deletions(-)
use new memory layout and change uboot load address. open tpm, tee and more config feature
No need to reserve top memory because the reserved space is moved to the bottom area of memory.
Signed-off-by: Jim Liu JJLIU0@nuvoton.com --- board/nuvoton/arbel_evb/Kconfig | 4 ++-- configs/arbel_evb_defconfig | 15 ++++++++++++++- include/configs/arbel.h | 5 +++-- 3 files changed, 19 insertions(+), 5 deletions(-)
diff --git a/board/nuvoton/arbel_evb/Kconfig b/board/nuvoton/arbel_evb/Kconfig index efe85974a2..33c589f1fb 100644 --- a/board/nuvoton/arbel_evb/Kconfig +++ b/board/nuvoton/arbel_evb/Kconfig @@ -11,8 +11,8 @@ config SYS_CONFIG_NAME
config SYS_MEM_TOP_HIDE hex "Reserved TOP memory" - default 0xB000000 + default 0x0 help - Reserve memory for ECC/GFX/VCD/ECE. + Reserve memory for ECC/GFX/OPTEE/TIP/CP.
endif diff --git a/configs/arbel_evb_defconfig b/configs/arbel_evb_defconfig index 29c4c187b5..c27a7cdd3a 100644 --- a/configs/arbel_evb_defconfig +++ b/configs/arbel_evb_defconfig @@ -2,7 +2,8 @@ CONFIG_ARM=y CONFIG_ARCH_NPCM=y CONFIG_SYS_MALLOC_LEN=0x240000 CONFIG_SYS_MALLOC_F_LEN=0x1000 -CONFIG_NR_DRAM_BANKS=1 +CONFIG_TEXT_BASE=0x06208000 +CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x3C0000 CONFIG_ENV_SECT_SIZE=0x1000 @@ -22,6 +23,8 @@ CONFIG_BOOTCOMMAND="run common_bootargs; run romboot" CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_BOOTM_LEN=0x1400000 +CONFIG_SYS_LOAD_ADDR=0x06208000 +CONFIG_SYS_INIT_SP_ADDR=0x06208000 CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y @@ -86,3 +89,13 @@ CONFIG_USB_STORAGE=y CONFIG_LIB_HW_RAND=y CONFIG_SHA_HW_ACCEL=y # CONFIG_EFI_LOADER is not set +CONFIG_TEE=y +CONFIG_OPTEE=y +CONFIG_TPM=y +CONFIG_TPM_V2=y +CONFIG_TPM2_FTPM_TEE=y +CONFIG_CMD_TPM=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_CMD_GPT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_PART=y diff --git a/include/configs/arbel.h b/include/configs/arbel.h index 8e27fb52a1..891257bc93 100644 --- a/include/configs/arbel.h +++ b/include/configs/arbel.h @@ -7,12 +7,13 @@ #define __CONFIG_ARBEL_H
#define CFG_SYS_SDRAM_BASE 0x0 -#define CFG_SYS_BOOTMAPSZ (20 << 20) +#define CFG_SYS_BOOTMAPSZ (30 << 20) +#define CFG_SYS_BOOTM_LEN (20 << 20) #define CFG_SYS_INIT_RAM_ADDR CFG_SYS_SDRAM_BASE #define CFG_SYS_INIT_RAM_SIZE 0x8000
/* Default environemnt variables */ -#define CFG_EXTRA_ENV_SETTINGS "uimage_flash_addr=80200000\0" \ +#define CFG_EXTRA_ENV_SETTINGS "uimage_flash_addr=80400000\0" \ "stdin=serial\0" \ "stdout=serial\0" \ "stderr=serial\0" \
On Tue, Jul 04, 2023 at 04:00:11PM +0800, Jim Liu wrote:
use new memory layout and change uboot load address. open tpm, tee and more config feature
No need to reserve top memory because the reserved space is moved to the bottom area of memory.
Signed-off-by: Jim Liu JJLIU0@nuvoton.com
For the series, applied to u-boot/master, thanks!
In non tip mode, BMC first power on with PORST+CORST. the gpio status will error.
Signed-off-by: Jim Liu JJLIU0@nuvoton.com --- drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c index 0ec47e9577..4549cb061e 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c @@ -808,6 +808,9 @@ static bool is_gpio_persist(struct udevice *dev, uint bank) status = npcm_get_reset_status(); dev_dbg(dev, "reset status: 0x%x\n", status);
+ if (status & PORST) + return false; + if (status & CORST) regmap_read(priv->rst_regmap, CORSTC, &val); else if (status & WD0RST)
configuration should be done before release host wait
Signed-off-by: Jim Liu JJLIU0@nuvoton.com --- drivers/misc/npcm_host_intf.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/misc/npcm_host_intf.c b/drivers/misc/npcm_host_intf.c index 0244e40457..79f57f57d8 100644 --- a/drivers/misc/npcm_host_intf.c +++ b/drivers/misc/npcm_host_intf.c @@ -50,9 +50,6 @@ static int npcm_host_intf_bind(struct udevice *dev) const char *type; int ret;
- /* Release host wait */ - setbits_8(SMC_CTL_REG_ADDR, SMC_CTL_HOSTWAIT); - syscon = syscon_regmap_lookup_by_phandle(dev, "syscon"); if (IS_ERR(syscon)) { dev_err(dev, "%s: unable to get syscon, dev %s\n", __func__, dev->name); @@ -93,6 +90,9 @@ static int npcm_host_intf_bind(struct udevice *dev) regmap_update_bits(syscon, MFSEL1, MFSEL1_LPCSEL, MFSEL1_LPCSEL); }
+ /* Release host wait */ + setbits_8(SMC_CTL_REG_ADDR, SMC_CTL_HOSTWAIT); + return 0; }
Add npcm8xx A2 cpu version check and add 4G RAM support
Signed-off-by: Jim Liu JJLIU0@nuvoton.com --- arch/arm/include/asm/arch-npcm8xx/gcr.h | 1 + arch/arm/mach-npcm/npcm8xx/cpu.c | 12 ++++- board/nuvoton/arbel_evb/arbel_evb.c | 70 +++++++++++++++++++++++-- 3 files changed, 79 insertions(+), 4 deletions(-)
diff --git a/arch/arm/include/asm/arch-npcm8xx/gcr.h b/arch/arm/include/asm/arch-npcm8xx/gcr.h index ee6677a0e5..20230d64e6 100644 --- a/arch/arm/include/asm/arch-npcm8xx/gcr.h +++ b/arch/arm/include/asm/arch-npcm8xx/gcr.h @@ -12,6 +12,7 @@ /* On-Chip ARBEL NPCM8XX VERSIONS */ #define ARBEL_Z1 0x00A35850 #define ARBEL_A1 0x04a35850 +#define ARBEL_A2 0x08a35850 #define ARBEL_NPCM845 0x00000000 #define ARBEL_NPCM830 0x00300395 #define ARBEL_NPCM810 0x00000220 diff --git a/arch/arm/mach-npcm/npcm8xx/cpu.c b/arch/arm/mach-npcm/npcm8xx/cpu.c index 2d839cfae9..af59452609 100644 --- a/arch/arm/mach-npcm/npcm8xx/cpu.c +++ b/arch/arm/mach-npcm/npcm8xx/cpu.c @@ -68,6 +68,9 @@ int print_cpuinfo(void) case ARBEL_A1: printf("A1 @ "); break; + case ARBEL_A2: + printf("A2 @ "); + break; default: printf("Unknown\n"); break; @@ -92,7 +95,7 @@ int arch_cpu_init(void) return 0; }
-static struct mm_region npcm_mem_map[1 + CONFIG_NR_DRAM_BANKS + 1] = { +static struct mm_region npcm_mem_map[] = { { /* DRAM */ .phys = 0x0UL, @@ -109,6 +112,13 @@ static struct mm_region npcm_mem_map[1 + CONFIG_NR_DRAM_BANKS + 1] = { PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN }, + { + .phys = 0x100000000UL, + .virt = 0x100000000UL, + .size = 0x80000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { /* List terminator */ 0, diff --git a/board/nuvoton/arbel_evb/arbel_evb.c b/board/nuvoton/arbel_evb/arbel_evb.c index cd12ce3834..e52e0a59ab 100644 --- a/board/nuvoton/arbel_evb/arbel_evb.c +++ b/board/nuvoton/arbel_evb/arbel_evb.c @@ -8,6 +8,17 @@ #include <asm/io.h> #include <asm/arch/gcr.h>
+#define SR_MII_CTRL_SWR_BIT15 15 + +#define DRAM_512MB_ECC_SIZE 0x1C000000ULL +#define DRAM_512MB_SIZE 0x20000000ULL +#define DRAM_1GB_ECC_SIZE 0x38000000ULL +#define DRAM_1GB_SIZE 0x40000000ULL +#define DRAM_2GB_ECC_SIZE 0x70000000ULL +#define DRAM_2GB_SIZE 0x80000000ULL +#define DRAM_4GB_ECC_SIZE 0xE00000000ULL +#define DRAM_4GB_SIZE 0x100000000ULL + DECLARE_GLOBAL_DATA_PTR;
int board_init(void) @@ -18,12 +29,65 @@ int board_init(void) int dram_init(void) { struct npcm_gcr *gcr = (struct npcm_gcr *)NPCM_GCR_BA; + uint64_t delta = 0ULL;
/* - * Get dram size from bootblock. - * The value is stored in scrpad_02 register. + * get dram active size value from bootblock. + * Value sent using scrpad_03 register. + * feature available in bootblock 0.0.6 and above. */ - gd->ram_size = readl(&gcr->scrpad_b); + + gd->ram_size = readl(&gcr->scrpad_c); + debug("%s: scrpad_c: %llx ", __func__, gd->ram_size); + + if (gd->ram_size == 0) { + gd->ram_size = readl(&gcr->scrpad_b); + debug("%s: scrpad_b: %llx ", __func__, gd->ram_size); + } else { + gd->ram_size *= 0x100000ULL; + } + + gd->bd->bi_dram[0].start = 0; + debug("ram_size: %llx ", gd->ram_size); + + switch (gd->ram_size) { + case DRAM_512MB_ECC_SIZE: + case DRAM_512MB_SIZE: + case DRAM_1GB_ECC_SIZE: + case DRAM_1GB_SIZE: + case DRAM_2GB_ECC_SIZE: + case DRAM_2GB_SIZE: + gd->bd->bi_dram[0].size = gd->ram_size; + gd->bd->bi_dram[1].start = 0; + gd->bd->bi_dram[1].size = 0; + break; + case DRAM_4GB_ECC_SIZE: + gd->bd->bi_dram[0].size = DRAM_2GB_ECC_SIZE; + gd->bd->bi_dram[1].start = DRAM_4GB_SIZE; + gd->bd->bi_dram[1].size = DRAM_2GB_SIZE; + delta = DRAM_4GB_SIZE - DRAM_2GB_ECC_SIZE; + break; + case DRAM_4GB_SIZE: + gd->bd->bi_dram[0].size = DRAM_2GB_SIZE; + gd->bd->bi_dram[1].start = DRAM_4GB_SIZE; + gd->bd->bi_dram[1].size = DRAM_2GB_SIZE; + delta = DRAM_4GB_SIZE - DRAM_2GB_SIZE; + break; + default: + gd->bd->bi_dram[0].size = DRAM_1GB_SIZE; + gd->bd->bi_dram[1].start = 0; + gd->bd->bi_dram[1].size = 0; + break; + } + + gd->ram_size -= delta; + + return 0; +} + +int dram_init_banksize(void) +{ + dram_init();
return 0; }
Hi Tom
Sorry to bother you. Could I know your merge plans for my commit ? https://patchwork.ozlabs.org/project/uboot/list/?series=362257 https://patchwork.ozlabs.org/project/uboot/list/?series=359454
because MS 、google and other customers will use the new memory layout . So could you provide some information or merge schedule?
Best regards, Jim
On Tue, Jul 4, 2023 at 4:00 PM Jim Liu jim.t90615@gmail.com wrote:
- support 4g ram and new memory layout
- A2 cpu support
- fix pinctrl, misc driver error
Jim Liu (4): board: nuvoton: arbel: change uboot load address pinctrl: nuvoton: fix reset reason error for poweron misc: npcm_host_intf: change initialization sequence arch: arm: npcm8xx: add cpu version and 4G ram support
arch/arm/include/asm/arch-npcm8xx/gcr.h | 1 + arch/arm/mach-npcm/npcm8xx/cpu.c | 12 +++- board/nuvoton/arbel_evb/Kconfig | 4 +- board/nuvoton/arbel_evb/arbel_evb.c | 70 ++++++++++++++++++++++- configs/arbel_evb_defconfig | 15 ++++- drivers/misc/npcm_host_intf.c | 6 +- drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 3 + include/configs/arbel.h | 5 +- 8 files changed, 104 insertions(+), 12 deletions(-)
-- 2.17.1
participants (2)
-
Jim Liu -
Tom Rini