[U-Boot] [PATCH] mpc85xx/powerpc:cpu_init: Modified the errata according to endianness
Modifies errata implementation due to the fact that P3041, P5020, and P5040 are all big endian for the USB PHY registers, but they were specified little endian. Also, Adds errata for P1010 and P2041 2.0.
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com --- arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++-- arch/powerpc/include/asm/config_mpc85xx.h | 1 + arch/powerpc/include/asm/immap_85xx.h | 2 ++ drivers/usb/common/fsl-errata.c | 6 ++++-- 4 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 61f5639..61dedfc 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -114,10 +114,10 @@ void fsl_erratum_a006261_workaround(struct ccsr_usb_phy __iomem *usb_phy) setbits_be32(&usb_phy->config2, CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL);
- temp = squelch_prog_rd_0_2 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0; + temp = squelch_prog_rd_0_2 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3; out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp);
- temp = squelch_prog_rd_3_5 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3; + temp = squelch_prog_rd_3_5 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0; out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp); #endif } diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 505d355..9b7feda 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -162,6 +162,7 @@ #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 #define CONFIG_SYS_FSL_ERRATUM_A004508 #define CONFIG_SYS_FSL_ERRATUM_A007075 +#define CONFIG_SYS_FSL_USB1_PHY_ENABLE #define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_FSL_ERRATUM_A004477 #define CONFIG_SYS_FSL_A004447_SVR_REV 0x10 diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index c045a24..07ad22d 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2953,6 +2953,8 @@ struct ccsr_pman { #define CONFIG_SYS_MPC85xx_DMA_OFFSET 0x21000 #define CONFIG_SYS_MPC85xx_USB1_OFFSET 0x22000 #define CONFIG_SYS_MPC85xx_USB2_OFFSET 0x23000 +#define CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET 0xE5000 +#define CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET 0xE5100 #ifdef CONFIG_TSECV2 #define CONFIG_SYS_TSEC1_OFFSET 0xB0000 #elif defined(CONFIG_TSECV2_1) diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c index ebe60a8..a69b977 100644 --- a/drivers/usb/common/fsl-errata.c +++ b/drivers/usb/common/fsl-errata.c @@ -53,7 +53,8 @@ bool has_erratum_a006261(void) case SVR_P2041: case SVR_P2040: return IS_SVR_REV(svr, 1, 0) || - IS_SVR_REV(svr, 1, 1) || IS_SVR_REV(svr, 2, 1); + IS_SVR_REV(svr, 1, 1) || + IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1); case SVR_P3041: return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1) || @@ -72,7 +73,8 @@ bool has_erratum_a006261(void) case SVR_T2081: return IS_SVR_REV(svr, 1, 0); case SVR_P5040: - return IS_SVR_REV(svr, 1, 0); + return IS_SVR_REV(svr, 1, 0) || + IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1); #endif }
On 06/21/2016 09:22 AM, Sriram Dash wrote:
Modifies errata implementation due to the fact that P3041, P5020, and P5040 are all big endian for the USB PHY registers, but they were specified little endian. Also
Please split this into two patches.
, Adds errata for P1010 and
P2041 2.0.
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com
arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++-- arch/powerpc/include/asm/config_mpc85xx.h | 1 + arch/powerpc/include/asm/immap_85xx.h | 2 ++ drivers/usb/common/fsl-errata.c | 6 ++++-- 4 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 61f5639..61dedfc 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -114,10 +114,10 @@ void fsl_erratum_a006261_workaround(struct ccsr_usb_phy __iomem *usb_phy) setbits_be32(&usb_phy->config2, CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL);
- temp = squelch_prog_rd_0_2 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0;
- temp = squelch_prog_rd_0_2 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3; out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp);
- temp = squelch_prog_rd_3_5 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3;
- temp = squelch_prog_rd_3_5 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0; out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp);
#endif } diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 505d355..9b7feda 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -162,6 +162,7 @@ #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 #define CONFIG_SYS_FSL_ERRATUM_A004508 #define CONFIG_SYS_FSL_ERRATUM_A007075 +#define CONFIG_SYS_FSL_USB1_PHY_ENABLE #define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_FSL_ERRATUM_A004477 #define CONFIG_SYS_FSL_A004447_SVR_REV 0x10 diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index c045a24..07ad22d 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2953,6 +2953,8 @@ struct ccsr_pman { #define CONFIG_SYS_MPC85xx_DMA_OFFSET 0x21000 #define CONFIG_SYS_MPC85xx_USB1_OFFSET 0x22000 #define CONFIG_SYS_MPC85xx_USB2_OFFSET 0x23000 +#define CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET 0xE5000 +#define CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET 0xE5100 #ifdef CONFIG_TSECV2 #define CONFIG_SYS_TSEC1_OFFSET 0xB0000 #elif defined(CONFIG_TSECV2_1) diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c index ebe60a8..a69b977 100644 --- a/drivers/usb/common/fsl-errata.c +++ b/drivers/usb/common/fsl-errata.c @@ -53,7 +53,8 @@ bool has_erratum_a006261(void) case SVR_P2041: case SVR_P2040: return IS_SVR_REV(svr, 1, 0) ||
IS_SVR_REV(svr, 1, 1) || IS_SVR_REV(svr, 2, 1);
IS_SVR_REV(svr, 1, 1) ||IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1);@@ -72,7 +73,8 @@ bool has_erratum_a006261(void) case SVR_T2081: return IS_SVR_REV(svr, 1, 0); case SVR_P5040:
return IS_SVR_REV(svr, 1, 0);
return IS_SVR_REV(svr, 1, 0) ||IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1);#endif }
From: Marek Vasut [mailto:marex@denx.de] On 06/21/2016 09:22 AM, Sriram Dash wrote:
Modifies errata implementation due to the fact that P3041, P5020, and P5040 are all big endian for the USB PHY registers, but they were specified little endian. Also
Please split this into two patches.
OK. Will take care in v2.
, Adds errata for P1010 and
P2041 2.0.
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com
arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++-- arch/powerpc/include/asm/config_mpc85xx.h | 1 + arch/powerpc/include/asm/immap_85xx.h | 2 ++ drivers/usb/common/fsl-errata.c | 6 ++++-- 4 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 61f5639..61dedfc 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -114,10 +114,10 @@ void fsl_erratum_a006261_workaround(struct
ccsr_usb_phy __iomem *usb_phy)
setbits_be32(&usb_phy->config2, CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL);
- temp = squelch_prog_rd_0_2 <<
CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0;
- temp = squelch_prog_rd_0_2 <<
CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3;
out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp);
- temp = squelch_prog_rd_3_5 <<
CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3;
- temp = squelch_prog_rd_3_5 <<
CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0;
out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp); #endif } diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 505d355..9b7feda 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -162,6 +162,7 @@ #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 #define CONFIG_SYS_FSL_ERRATUM_A004508 #define CONFIG_SYS_FSL_ERRATUM_A007075 +#define CONFIG_SYS_FSL_USB1_PHY_ENABLE #define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_FSL_ERRATUM_A004477 #define CONFIG_SYS_FSL_A004447_SVR_REV 0x10 diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index c045a24..07ad22d 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2953,6 +2953,8 @@ struct ccsr_pman { #define CONFIG_SYS_MPC85xx_DMA_OFFSET 0x21000 #define CONFIG_SYS_MPC85xx_USB1_OFFSET 0x22000 #define CONFIG_SYS_MPC85xx_USB2_OFFSET 0x23000 +#define CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET 0xE5000 +#define CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET 0xE5100 #ifdef CONFIG_TSECV2 #define CONFIG_SYS_TSEC1_OFFSET 0xB0000 #elif defined(CONFIG_TSECV2_1) diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c index ebe60a8..a69b977 100644 --- a/drivers/usb/common/fsl-errata.c +++ b/drivers/usb/common/fsl-errata.c @@ -53,7 +53,8 @@ bool has_erratum_a006261(void) case SVR_P2041: case SVR_P2040: return IS_SVR_REV(svr, 1, 0) ||
IS_SVR_REV(svr, 1, 1) || IS_SVR_REV(svr, 2, 1);
IS_SVR_REV(svr, 1, 1) ||IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1);@@ -72,7 +73,8 @@ bool has_erratum_a006261(void) case SVR_T2081: return IS_SVR_REV(svr, 1, 0); case SVR_P5040:
return IS_SVR_REV(svr, 1, 0);
return IS_SVR_REV(svr, 1, 0) ||IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1);#endif }
-- Best regards, Marek Vasut
+Suresh Gupta
On 06/21/2016 12:22 AM, Sriram Dash wrote:
Modifies errata implementation due to the fact that P3041, P5020, and P5040 are all big endian for the USB PHY registers, but they were specified little endian. Also, Adds errata for P1010 and P2041 2.0.
It would be helpful to mention erratum number A-006261 in the commit message in case you need to find this commit later.
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com
arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++-- arch/powerpc/include/asm/config_mpc85xx.h | 1 + arch/powerpc/include/asm/immap_85xx.h | 2 ++ drivers/usb/common/fsl-errata.c | 6 ++++-- 4 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 61f5639..61dedfc 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -114,10 +114,10 @@ void fsl_erratum_a006261_workaround(struct ccsr_usb_phy __iomem *usb_phy) setbits_be32(&usb_phy->config2, CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL);
- temp = squelch_prog_rd_0_2 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0;
- temp = squelch_prog_rd_0_2 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3; out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp);
- temp = squelch_prog_rd_3_5 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3;
- temp = squelch_prog_rd_3_5 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0;
Has this been wrong all the time? If the disconnect voltage threshold was wrong, did someone observe abnormal behavior?
Suresh, please comment here.
out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp); #endif } diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 505d355..9b7feda 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -162,6 +162,7 @@ #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 #define CONFIG_SYS_FSL_ERRATUM_A004508 #define CONFIG_SYS_FSL_ERRATUM_A007075 +#define CONFIG_SYS_FSL_USB1_PHY_ENABLE
Enabling the workaround for another SoC should be in a separated patch.
#define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_FSL_ERRATUM_A004477 #define CONFIG_SYS_FSL_A004447_SVR_REV 0x10 diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index c045a24..07ad22d 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2953,6 +2953,8 @@ struct ccsr_pman { #define CONFIG_SYS_MPC85xx_DMA_OFFSET 0x21000 #define CONFIG_SYS_MPC85xx_USB1_OFFSET 0x22000 #define CONFIG_SYS_MPC85xx_USB2_OFFSET 0x23000 +#define CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET 0xE5000 +#define CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET 0xE5100 #ifdef CONFIG_TSECV2 #define CONFIG_SYS_TSEC1_OFFSET 0xB0000 #elif defined(CONFIG_TSECV2_1) diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c index ebe60a8..a69b977 100644 --- a/drivers/usb/common/fsl-errata.c +++ b/drivers/usb/common/fsl-errata.c @@ -53,7 +53,8 @@ bool has_erratum_a006261(void) case SVR_P2041: case SVR_P2040: return IS_SVR_REV(svr, 1, 0) ||
IS_SVR_REV(svr, 1, 1) || IS_SVR_REV(svr, 2, 1);
IS_SVR_REV(svr, 1, 1) ||IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1);@@ -72,7 +73,8 @@ bool has_erratum_a006261(void) case SVR_T2081: return IS_SVR_REV(svr, 1, 0); case SVR_P5040:
return IS_SVR_REV(svr, 1, 0);
return IS_SVR_REV(svr, 1, 0) ||IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1);
Are you sure this erratum applies to P5040 rev 2.0 and rev 2.1? My document shows it doesn't (only applies to rev 1.0).
York
From: york sun
+Suresh Gupta
On 06/21/2016 12:22 AM, Sriram Dash wrote:
Modifies errata implementation due to the fact that P3041, P5020, and P5040 are all big endian for the USB PHY registers, but they were specified little endian. Also, Adds errata for P1010 and P2041 2.0.
It would be helpful to mention erratum number A-006261 in the commit message in case you need to find this commit later.
Hello York,
OK. Will take care in v2.
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com
arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++-- arch/powerpc/include/asm/config_mpc85xx.h | 1 + arch/powerpc/include/asm/immap_85xx.h | 2 ++ drivers/usb/common/fsl-errata.c | 6 ++++-- 4 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 61f5639..61dedfc 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -114,10 +114,10 @@ void fsl_erratum_a006261_workaround(struct
ccsr_usb_phy __iomem *usb_phy)
setbits_be32(&usb_phy->config2, CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL);
- temp = squelch_prog_rd_0_2 <<
CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0;
- temp = squelch_prog_rd_0_2 <<
CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3;
out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp);
- temp = squelch_prog_rd_3_5 <<
CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3;
- temp = squelch_prog_rd_3_5 <<
CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0;
Has this been wrong all the time? If the disconnect voltage threshold was wrong, did someone observe abnormal behavior?
Suresh, please comment here.
out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp); #endif } diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 505d355..9b7feda 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -162,6 +162,7 @@ #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 #define CONFIG_SYS_FSL_ERRATUM_A004508 #define CONFIG_SYS_FSL_ERRATUM_A007075 +#define CONFIG_SYS_FSL_USB1_PHY_ENABLE
Enabling the workaround for another SoC should be in a separated patch.
OK. Will take care in v2.
#define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_FSL_ERRATUM_A004477 #define CONFIG_SYS_FSL_A004447_SVR_REV 0x10 diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index c045a24..07ad22d 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2953,6 +2953,8 @@ struct ccsr_pman { #define CONFIG_SYS_MPC85xx_DMA_OFFSET 0x21000 #define CONFIG_SYS_MPC85xx_USB1_OFFSET 0x22000 #define CONFIG_SYS_MPC85xx_USB2_OFFSET 0x23000 +#define CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET 0xE5000 +#define CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET 0xE5100 #ifdef CONFIG_TSECV2 #define CONFIG_SYS_TSEC1_OFFSET 0xB0000 #elif defined(CONFIG_TSECV2_1) diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c index ebe60a8..a69b977 100644 --- a/drivers/usb/common/fsl-errata.c +++ b/drivers/usb/common/fsl-errata.c @@ -53,7 +53,8 @@ bool has_erratum_a006261(void) case SVR_P2041: case SVR_P2040: return IS_SVR_REV(svr, 1, 0) ||
IS_SVR_REV(svr, 1, 1) || IS_SVR_REV(svr, 2, 1);
IS_SVR_REV(svr, 1, 1) ||IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1);@@ -72,7 +73,8 @@ bool has_erratum_a006261(void) case SVR_T2081: return IS_SVR_REV(svr, 1, 0); case SVR_P5040:
return IS_SVR_REV(svr, 1, 0);
return IS_SVR_REV(svr, 1, 0) ||IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1);Are you sure this erratum applies to P5040 rev 2.0 and rev 2.1? My document shows it doesn't (only applies to rev 1.0).
Yes. Apparently, some more boards are using the same phy. There has been some addition and removal off Socs for the errata, which is to be updated. I will add another patch for the removal of Socs, in which the errata is not applicable, in v2.
York
Regards, Sriram
Modifies errata implementation due to the fact that P3041, P5020, and P5040 are all big endian for the USB PHY registers, but they were specified little endian. Applies the errata for P1010, P2041, P5040. Removes the errata for T4160, T1040, T2080.
Sriram Dash (5): mpc85xx/powerpc:cpu_init: Modified the errata A006261 according to endianness mpc85xx/powerpc:P1010: Apply errata A006261 for P1010 mpc85xx/powerpc: P2041: Apply errata A006261 for P2041 mpc85xx/powerpc: P5040: Apply errata A006261 for P5040 mpc85xx/powerpc: Do not apply errata A006261 for T4160, T1040, T2080
arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++-- arch/powerpc/include/asm/config_mpc85xx.h | 5 ++--- arch/powerpc/include/asm/immap_85xx.h | 2 ++ drivers/usb/common/fsl-errata.c | 13 ++++--------- 4 files changed, 10 insertions(+), 14 deletions(-)
Modifies errata implementation due to the fact that P3041, P5020, and P5040 are all big endian for the USB PHY registers, but they were specified little endian.
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com --- Changes in v2: - Adds the errata number to title of patch - Makes separate patch for addition of errata to specific Socs.
arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 61f5639..61dedfc 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -114,10 +114,10 @@ void fsl_erratum_a006261_workaround(struct ccsr_usb_phy __iomem *usb_phy) setbits_be32(&usb_phy->config2, CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL);
- temp = squelch_prog_rd_0_2 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0; + temp = squelch_prog_rd_0_2 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3; out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp);
- temp = squelch_prog_rd_3_5 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3; + temp = squelch_prog_rd_3_5 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0; out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp); #endif }
On 07/18/2016 05:47 AM, Sriram Dash wrote:
Can you please be consistent about the tag spacing in the subject ? Each : must be followed by space.
Modifies errata implementation due to the fact that P3041, P5020, and P5040 are all big endian for the USB PHY registers, but they were specified little endian.
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com
Changes in v2:
- Adds the errata number to title of patch
- Makes separate patch for addition of errata to specific Socs.
arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 61f5639..61dedfc 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -114,10 +114,10 @@ void fsl_erratum_a006261_workaround(struct ccsr_usb_phy __iomem *usb_phy) setbits_be32(&usb_phy->config2, CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL);
- temp = squelch_prog_rd_0_2 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0;
- temp = squelch_prog_rd_0_2 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3; out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp);
- temp = squelch_prog_rd_3_5 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3;
- temp = squelch_prog_rd_3_5 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0; out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp);
#endif }
Sriram,
Please pay attention to the language. "errata" is the plural noun of "erratum". You are dealing with one erratum, aren't you? And you are modifying the workaround, not the erratum itself.
The tags in the subject should be separated by either "/", or ":", but not both. I don't believe "cpu_init" should be in the tag.
On 07/17/2016 08:47 PM, Sriram Dash wrote:
Modifies errata implementation due to the fact that P3041, P5020, and P5040 are all big endian for the USB PHY registers, but they were specified little endian.
If your change is correct, can you explain why the original format didn't cause any harm before?
York
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com
Changes in v2:
- Adds the errata number to title of patch
- Makes separate patch for addition of errata to specific Socs.
arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 61f5639..61dedfc 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -114,10 +114,10 @@ void fsl_erratum_a006261_workaround(struct ccsr_usb_phy __iomem *usb_phy) setbits_be32(&usb_phy->config2, CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL);
- temp = squelch_prog_rd_0_2 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0;
- temp = squelch_prog_rd_0_2 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3; out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp);
- temp = squelch_prog_rd_3_5 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3;
- temp = squelch_prog_rd_3_5 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0; out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp);
#endif }
From: york sun
Sriram,
Please pay attention to the language. "errata" is the plural noun of "erratum". You are dealing with one erratum, aren't you? And you are modifying the workaround, not the erratum itself.
The tags in the subject should be separated by either "/", or ":", but not both. I don't believe "cpu_init" should be in the tag.
Hello York, Will take care from next time onwards. Will change in v3.
On 07/17/2016 08:47 PM, Sriram Dash wrote:
Modifies errata implementation due to the fact that P3041, P5020, and P5040 are all big endian for the USB PHY registers, but they were specified little endian.
If your change is correct, can you explain why the original format didn't cause any harm before?
York
If it is working due to SWAP most likely reason would be bit[9] of confige1 which might be getting mapped to HS Disconnect decrement by 50mV. Whereas Errata intends to increase the threshold by 100mV though bit C1[8:9] which map to C1[23:22] in BG. I mean in full swap, this value will have maximum impact, although complete write is expected to be done properly.
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com
Changes in v2:
- Adds the errata number to title of patch
- Makes separate patch for addition of errata to specific Socs.
arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 61f5639..61dedfc 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -114,10 +114,10 @@ void fsl_erratum_a006261_workaround(struct
ccsr_usb_phy __iomem *usb_phy)
setbits_be32(&usb_phy->config2, CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL);
- temp = squelch_prog_rd_0_2 <<
CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0;
- temp = squelch_prog_rd_0_2 <<
CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3;
out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp);
- temp = squelch_prog_rd_3_5 <<
CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3;
- temp = squelch_prog_rd_3_5 <<
CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0;
out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp); #endif }
From: Sriram Dash sriram.dash@nxp.com
Modifies erratum A006261 implementation due to the fact that P3041, P5020, and P5040 are all big endian for the USB PHY registers, but they were specified little endian. Enables the Phy init settings for P1010 Soc. Also, applies the erratum for P2041 rev 2.0, P2040 rev 2.0, P5040 rev 2.0, 2.1 and removes the erratum for T4160, T4080, T1040, T1042, T1020, T1022, T2080, T2081.
Sriram Dash (3): mpc85xx: powerpc: usb: Modified the erratum A006261 according to endianness mpc85xx: powerpc: usb: Enable Usb phy initialisation settings for P1010 mpc85xx: powerpc: usb: Update the list of Socs afftected by erratum A006261
arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++-- arch/powerpc/include/asm/config_mpc85xx.h | 5 ++--- arch/powerpc/include/asm/immap_85xx.h | 2 ++ drivers/usb/common/fsl-errata.c | 13 ++++--------- 4 files changed, 10 insertions(+), 14 deletions(-)
From: Sriram Dash sriram.dash@nxp.com
Modifies erratum implementation due to the fact that P3041, P5020, and P5040 are all big endian for the USB PHY registers, but they were specified little endian.
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com --- Changes in v3: - Modify the commit message - Modify the commit description
Changes in v2: - Adds the errata number to title of patch - Makes separate patch for addition of errata to specific Socs.
arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index ace4279..53b3729 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -114,10 +114,10 @@ void fsl_erratum_a006261_workaround(struct ccsr_usb_phy __iomem *usb_phy) setbits_be32(&usb_phy->config2, CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL);
- temp = squelch_prog_rd_0_2 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0; + temp = squelch_prog_rd_0_2 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3; out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp);
- temp = squelch_prog_rd_3_5 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3; + temp = squelch_prog_rd_3_5 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0; out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp); #endif }
From: Sriram Dash sriram.dash@nxp.com
CONFIG_SYS_FSL_USB1_PHY_ENABLE is set and the USB Phy offset are set to enable the initial setting of Usb Phy for P1010.
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com --- Changes in v3: - Modify the commit message - Modify the commit description
arch/powerpc/include/asm/config_mpc85xx.h | 1 + arch/powerpc/include/asm/immap_85xx.h | 2 ++ 2 files changed, 3 insertions(+)
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 505d355..9b7feda 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -162,6 +162,7 @@ #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 #define CONFIG_SYS_FSL_ERRATUM_A004508 #define CONFIG_SYS_FSL_ERRATUM_A007075 +#define CONFIG_SYS_FSL_USB1_PHY_ENABLE #define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_FSL_ERRATUM_A004477 #define CONFIG_SYS_FSL_A004447_SVR_REV 0x10 diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index c045a24..07ad22d 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2953,6 +2953,8 @@ struct ccsr_pman { #define CONFIG_SYS_MPC85xx_DMA_OFFSET 0x21000 #define CONFIG_SYS_MPC85xx_USB1_OFFSET 0x22000 #define CONFIG_SYS_MPC85xx_USB2_OFFSET 0x23000 +#define CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET 0xE5000 +#define CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET 0xE5100 #ifdef CONFIG_TSECV2 #define CONFIG_SYS_TSEC1_OFFSET 0xB0000 #elif defined(CONFIG_TSECV2_1)
From: Sriram Dash sriram.dash@nxp.com
Apply the erratum A006261 for the following Socs: P2041 rev 2.0, P2040 rev 2.0, P5040 rev 2.0, 2.1
Do not apply erratum A006261 for the following Socs: T4160, T4080, T1040, T1042, T1020, T1022, T2080, T2081
Erratum A006261 is applicable for the following Socs: P1010(1.0, 2.0), P2041(1.0, 1.1, 2.0, 2.1), P2040(1.0, 1.1, 2.0, 2.1), P3041(1.0, 1.1, 2.0, 2.1), P5010(1.0, 2.0), P5020(1.0, 2.0), P5021(1.0, 2.0), T4240(1.0, 2.0), P5040(1.0,2.0,2.1).
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com --- Changes in v3: - Modify the commit message - Modify the commit description - Make a single patch for all the Socs getting affected by erratum A6261. Also, list the current Socs in description, for which erratum A006261 is applicable.
arch/powerpc/include/asm/config_mpc85xx.h | 4 +--- drivers/usb/common/fsl-errata.c | 13 ++++--------- 2 files changed, 5 insertions(+), 12 deletions(-)
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 9b7feda..6d845e8 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -641,6 +641,7 @@ #define CONFIG_SYS_NUM_FM2_DTSEC 8 #define CONFIG_SYS_NUM_FM2_10GEC 2 #define CONFIG_NUM_DDR_CONTROLLERS 3 +#define CONFIG_SYS_FSL_ERRATUM_A006261 #else #define CONFIG_SYS_NUM_FM1_DTSEC 6 #define CONFIG_SYS_NUM_FM1_10GEC 1 @@ -682,7 +683,6 @@ #define CONFIG_SYS_FSL_ERRATUM_A004468 #define CONFIG_SYS_FSL_ERRATUM_A_004934 #define CONFIG_SYS_FSL_ERRATUM_A005871 -#define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_FSL_ERRATUM_A006379 #define CONFIG_SYS_FSL_ERRATUM_A007186 #define CONFIG_SYS_FSL_ERRATUM_A006593 @@ -800,7 +800,6 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022) #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4" #define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY -#define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE @@ -908,7 +907,6 @@ defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013) #define CONFIG_SYS_FSL_SFP_VER_3_0 #define CONFIG_SYS_FSL_ISBC_VER 2 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 -#define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_FSL_ERRATUM_A006593 #define CONFIG_SYS_FSL_ERRATUM_A007186 #define CONFIG_SYS_FSL_ERRATUM_A006379 diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c index 183bf2b..972016c 100644 --- a/drivers/usb/common/fsl-errata.c +++ b/drivers/usb/common/fsl-errata.c @@ -53,7 +53,8 @@ bool has_erratum_a006261(void) case SVR_P2041: case SVR_P2040: return IS_SVR_REV(svr, 1, 0) || - IS_SVR_REV(svr, 1, 1) || IS_SVR_REV(svr, 2, 1); + IS_SVR_REV(svr, 1, 1) || + IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1); case SVR_P3041: return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1) || @@ -63,16 +64,10 @@ bool has_erratum_a006261(void) case SVR_P5021: return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); case SVR_T4240: - case SVR_T4160: - case SVR_T4080: return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); - case SVR_T1040: - return IS_SVR_REV(svr, 1, 0); - case SVR_T2080: - case SVR_T2081: - return IS_SVR_REV(svr, 1, 0); case SVR_P5040: - return IS_SVR_REV(svr, 1, 0); + return IS_SVR_REV(svr, 1, 0) || + IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1); #endif }
Modifies erratum A006261 implementation due to the fact that P3041, P5020, and P5040 are all big endian for the USB PHY registers, but they were specified little endian. Enables the Phy init settings for P1010 Soc. Also, applies the erratum for P2041 rev 2.0, P2040 rev 2.0, P5040 rev 2.0, 2.1 and removes the erratum for T4160, T4080, T1040, T1042, T1020, T1022, T2080, T2081.
Sriram Dash (3): mpc85xx: powerpc: usb: Modified the erratum A006261 according to endianness mpc85xx: powerpc: usb: Enable Usb phy initialisation settings for P1010 mpc85xx: powerpc: usb: Update the list of Socs afftected by erratum A006261
arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++-- arch/powerpc/include/asm/config_mpc85xx.h | 5 ++--- arch/powerpc/include/asm/immap_85xx.h | 2 ++ drivers/usb/common/fsl-errata.c | 13 ++++--------- 4 files changed, 10 insertions(+), 14 deletions(-)
Modifies erratum implementation due to the fact that P3041, P5020, and P5040 are all big endian for the USB PHY registers, but they were specified little endian.
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com --- Changes in v3: - Modify the commit message - Modify the commit description
Changes in v2: - Adds the errata number to title of patch - Makes separate patch for addition of errata to specific Socs.
arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index ace4279..53b3729 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -114,10 +114,10 @@ void fsl_erratum_a006261_workaround(struct ccsr_usb_phy __iomem *usb_phy) setbits_be32(&usb_phy->config2, CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL);
- temp = squelch_prog_rd_0_2 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0; + temp = squelch_prog_rd_0_2 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3; out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp);
- temp = squelch_prog_rd_3_5 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3; + temp = squelch_prog_rd_3_5 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0; out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp); #endif }
On 08/16/2016 11:18 PM, Sriram Dash wrote:
Modifies erratum implementation due to the fact that P3041, P5020, and P5040 are all big endian for the USB PHY registers, but they were specified little endian.
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com
Changes in v3:
- Modify the commit message
- Modify the commit description
Changes in v2:
- Adds the errata number to title of patch
- Makes separate patch for addition of errata to specific Socs.
arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
<snip>
Reviewed-by: York Sun york.sun@nxp.com
CONFIG_SYS_FSL_USB1_PHY_ENABLE is set and the USB Phy offset are set to enable the initial setting of Usb Phy for P1010.
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com --- Changes in v3: - Modify the commit message - Modify the commit description
arch/powerpc/include/asm/config_mpc85xx.h | 1 + arch/powerpc/include/asm/immap_85xx.h | 2 ++ 2 files changed, 3 insertions(+)
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 505d355..9b7feda 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -162,6 +162,7 @@ #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 #define CONFIG_SYS_FSL_ERRATUM_A004508 #define CONFIG_SYS_FSL_ERRATUM_A007075 +#define CONFIG_SYS_FSL_USB1_PHY_ENABLE #define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_FSL_ERRATUM_A004477 #define CONFIG_SYS_FSL_A004447_SVR_REV 0x10 diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index c045a24..07ad22d 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2953,6 +2953,8 @@ struct ccsr_pman { #define CONFIG_SYS_MPC85xx_DMA_OFFSET 0x21000 #define CONFIG_SYS_MPC85xx_USB1_OFFSET 0x22000 #define CONFIG_SYS_MPC85xx_USB2_OFFSET 0x23000 +#define CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET 0xE5000 +#define CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET 0xE5100 #ifdef CONFIG_TSECV2 #define CONFIG_SYS_TSEC1_OFFSET 0xB0000 #elif defined(CONFIG_TSECV2_1)
On 08/16/2016 11:18 PM, Sriram Dash wrote:
CONFIG_SYS_FSL_USB1_PHY_ENABLE is set and the USB Phy offset are set to enable the initial setting of Usb Phy for P1010.
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com
Changes in v3:
- Modify the commit message
- Modify the commit description
arch/powerpc/include/asm/config_mpc85xx.h | 1 + arch/powerpc/include/asm/immap_85xx.h | 2 ++ 2 files changed, 3 insertions(+)
<snip>
Reviewed-by: York Sun york.sun@nxp.com
Apply the erratum A006261 for the following Socs: P2041 rev 2.0, P2040 rev 2.0, P5040 rev 2.0, 2.1
Do not apply erratum A006261 for the following Socs: T4160, T4080, T1040, T1042, T1020, T1022, T2080, T2081
Erratum A006261 is applicable for the following Socs: P1010(1.0, 2.0), P2041(1.0, 1.1, 2.0, 2.1), P2040(1.0, 1.1, 2.0, 2.1), P3041(1.0, 1.1, 2.0, 2.1), P5010(1.0, 2.0), P5020(1.0, 2.0), P5021(1.0, 2.0), T4240(1.0, 2.0), P5040(1.0,2.0,2.1).
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com --- Changes in v3: - Modify the commit message - Modify the commit description - Make a single patch for all the Socs getting affected by erratum A6261. Also, list the current Socs in description, for which erratum A006261 is applicable.
arch/powerpc/include/asm/config_mpc85xx.h | 4 +--- drivers/usb/common/fsl-errata.c | 13 ++++--------- 2 files changed, 5 insertions(+), 12 deletions(-)
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 9b7feda..6d845e8 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -641,6 +641,7 @@ #define CONFIG_SYS_NUM_FM2_DTSEC 8 #define CONFIG_SYS_NUM_FM2_10GEC 2 #define CONFIG_NUM_DDR_CONTROLLERS 3 +#define CONFIG_SYS_FSL_ERRATUM_A006261 #else #define CONFIG_SYS_NUM_FM1_DTSEC 6 #define CONFIG_SYS_NUM_FM1_10GEC 1 @@ -682,7 +683,6 @@ #define CONFIG_SYS_FSL_ERRATUM_A004468 #define CONFIG_SYS_FSL_ERRATUM_A_004934 #define CONFIG_SYS_FSL_ERRATUM_A005871 -#define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_FSL_ERRATUM_A006379 #define CONFIG_SYS_FSL_ERRATUM_A007186 #define CONFIG_SYS_FSL_ERRATUM_A006593 @@ -800,7 +800,6 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022) #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4" #define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY -#define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE @@ -908,7 +907,6 @@ defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013) #define CONFIG_SYS_FSL_SFP_VER_3_0 #define CONFIG_SYS_FSL_ISBC_VER 2 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 -#define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_FSL_ERRATUM_A006593 #define CONFIG_SYS_FSL_ERRATUM_A007186 #define CONFIG_SYS_FSL_ERRATUM_A006379 diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c index 183bf2b..972016c 100644 --- a/drivers/usb/common/fsl-errata.c +++ b/drivers/usb/common/fsl-errata.c @@ -53,7 +53,8 @@ bool has_erratum_a006261(void) case SVR_P2041: case SVR_P2040: return IS_SVR_REV(svr, 1, 0) || - IS_SVR_REV(svr, 1, 1) || IS_SVR_REV(svr, 2, 1); + IS_SVR_REV(svr, 1, 1) || + IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1); case SVR_P3041: return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1) || @@ -63,16 +64,10 @@ bool has_erratum_a006261(void) case SVR_P5021: return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); case SVR_T4240: - case SVR_T4160: - case SVR_T4080: return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); - case SVR_T1040: - return IS_SVR_REV(svr, 1, 0); - case SVR_T2080: - case SVR_T2081: - return IS_SVR_REV(svr, 1, 0); case SVR_P5040: - return IS_SVR_REV(svr, 1, 0); + return IS_SVR_REV(svr, 1, 0) || + IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1); #endif }
On 08/16/2016 11:18 PM, Sriram Dash wrote:
Apply the erratum A006261 for the following Socs: P2041 rev 2.0, P2040 rev 2.0, P5040 rev 2.0, 2.1
Do not apply erratum A006261 for the following Socs: T4160, T4080, T1040, T1042, T1020, T1022, T2080, T2081
Erratum A006261 is applicable for the following Socs: P1010(1.0, 2.0), P2041(1.0, 1.1, 2.0, 2.1), P2040(1.0, 1.1, 2.0, 2.1), P3041(1.0, 1.1, 2.0, 2.1), P5010(1.0, 2.0), P5020(1.0, 2.0), P5021(1.0, 2.0), T4240(1.0, 2.0), P5040(1.0,2.0,2.1).
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com
Changes in v3:
- Modify the commit message
- Modify the commit description
- Make a single patch for all the Socs getting affected by erratum A6261. Also, list the current Socs in description, for which erratum A006261 is applicable.
arch/powerpc/include/asm/config_mpc85xx.h | 4 +--- drivers/usb/common/fsl-errata.c | 13 ++++--------- 2 files changed, 5 insertions(+), 12 deletions(-)
Reviewed-by: York Sun york.sun@nxp.com
On 08/17/2016 08:17 AM, Sriram Dash wrote:
Modifies erratum A006261 implementation due to the fact that P3041, P5020, and P5040 are all big endian for the USB PHY registers, but they were specified little endian. Enables the Phy init settings for P1010 Soc. Also, applies the erratum for P2041 rev 2.0, P2040 rev 2.0, P5040 rev 2.0, 2.1 and removes the erratum for T4160, T4080, T1040, T1042, T1020, T1022, T2080, T2081.
Sriram Dash (3): mpc85xx: powerpc: usb: Modified the erratum A006261 according to endianness mpc85xx: powerpc: usb: Enable Usb phy initialisation settings for P1010 mpc85xx: powerpc: usb: Update the list of Socs afftected by erratum A006261
arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++-- arch/powerpc/include/asm/config_mpc85xx.h | 5 ++--- arch/powerpc/include/asm/immap_85xx.h | 2 ++ drivers/usb/common/fsl-errata.c | 13 ++++--------- 4 files changed, 10 insertions(+), 14 deletions(-)
York, review, please.
On 08/17/2016 01:17 AM, Marek Vasut wrote:
On 08/17/2016 08:17 AM, Sriram Dash wrote:
Modifies erratum A006261 implementation due to the fact that P3041, P5020, and P5040 are all big endian for the USB PHY registers, but they were specified little endian. Enables the Phy init settings for P1010 Soc. Also, applies the erratum for P2041 rev 2.0, P2040 rev 2.0, P5040 rev 2.0, 2.1 and removes the erratum for T4160, T4080, T1040, T1042, T1020, T1022, T2080, T2081.
Sriram Dash (3): mpc85xx: powerpc: usb: Modified the erratum A006261 according to endianness mpc85xx: powerpc: usb: Enable Usb phy initialisation settings for P1010 mpc85xx: powerpc: usb: Update the list of Socs afftected by erratum A006261
arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++-- arch/powerpc/include/asm/config_mpc85xx.h | 5 ++--- arch/powerpc/include/asm/immap_85xx.h | 2 ++ drivers/usb/common/fsl-errata.c | 13 ++++--------- 4 files changed, 10 insertions(+), 14 deletions(-)
York, review, please.
I gave my review comments. They passed compiling for powerpc. Do you want to take them in, or leave them to me?
York
On 08/23/2016 10:34 PM, york sun wrote:
On 08/17/2016 01:17 AM, Marek Vasut wrote:
On 08/17/2016 08:17 AM, Sriram Dash wrote:
Modifies erratum A006261 implementation due to the fact that P3041, P5020, and P5040 are all big endian for the USB PHY registers, but they were specified little endian. Enables the Phy init settings for P1010 Soc. Also, applies the erratum for P2041 rev 2.0, P2040 rev 2.0, P5040 rev 2.0, 2.1 and removes the erratum for T4160, T4080, T1040, T1042, T1020, T1022, T2080, T2081.
Sriram Dash (3): mpc85xx: powerpc: usb: Modified the erratum A006261 according to endianness mpc85xx: powerpc: usb: Enable Usb phy initialisation settings for P1010 mpc85xx: powerpc: usb: Update the list of Socs afftected by erratum A006261
arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++-- arch/powerpc/include/asm/config_mpc85xx.h | 5 ++--- arch/powerpc/include/asm/immap_85xx.h | 2 ++ drivers/usb/common/fsl-errata.c | 13 ++++--------- 4 files changed, 10 insertions(+), 14 deletions(-)
York, review, please.
I gave my review comments. They passed compiling for powerpc. Do you want to take them in, or leave them to me?
They're mostly arch code, so feel free to pick them, but for next please.
On 08/16/2016 11:18 PM, Sriram Dash wrote:
Modifies erratum A006261 implementation due to the fact that P3041, P5020, and P5040 are all big endian for the USB PHY registers, but they were specified little endian. Enables the Phy init settings for P1010 Soc. Also, applies the erratum for P2041 rev 2.0, P2040 rev 2.0, P5040 rev 2.0, 2.1 and removes the erratum for T4160, T4080, T1040, T1042, T1020, T1022, T2080, T2081.
Sriram Dash (3): mpc85xx: powerpc: usb: Modified the erratum A006261 according to endianness mpc85xx: powerpc: usb: Enable Usb phy initialisation settings for P1010 mpc85xx: powerpc: usb: Update the list of Socs afftected by erratum A006261
arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++-- arch/powerpc/include/asm/config_mpc85xx.h | 5 ++--- arch/powerpc/include/asm/immap_85xx.h | 2 ++ drivers/usb/common/fsl-errata.c | 13 ++++--------- 4 files changed, 10 insertions(+), 14 deletions(-)
Applied to u-boot-85xx master, awaiting upstream. Thanks.
York
Apply USB errata A006261 for P1010.
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com --- arch/powerpc/include/asm/config_mpc85xx.h | 1 + arch/powerpc/include/asm/immap_85xx.h | 2 ++ 2 files changed, 3 insertions(+)
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 505d355..9b7feda 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -162,6 +162,7 @@ #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 #define CONFIG_SYS_FSL_ERRATUM_A004508 #define CONFIG_SYS_FSL_ERRATUM_A007075 +#define CONFIG_SYS_FSL_USB1_PHY_ENABLE #define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_FSL_ERRATUM_A004477 #define CONFIG_SYS_FSL_A004447_SVR_REV 0x10 diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index c045a24..07ad22d 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2953,6 +2953,8 @@ struct ccsr_pman { #define CONFIG_SYS_MPC85xx_DMA_OFFSET 0x21000 #define CONFIG_SYS_MPC85xx_USB1_OFFSET 0x22000 #define CONFIG_SYS_MPC85xx_USB2_OFFSET 0x23000 +#define CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET 0xE5000 +#define CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET 0xE5100 #ifdef CONFIG_TSECV2 #define CONFIG_SYS_TSEC1_OFFSET 0xB0000 #elif defined(CONFIG_TSECV2_1)
Sriram,
Same comment here, please fix the subject.
On 07/17/2016 08:47 PM, Sriram Dash wrote:
Apply USB errata A006261 for P1010.
A006261 is already applied to P1010.
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com
arch/powerpc/include/asm/config_mpc85xx.h | 1 + arch/powerpc/include/asm/immap_85xx.h | 2 ++ 2 files changed, 3 insertions(+)
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 505d355..9b7feda 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -162,6 +162,7 @@ #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 #define CONFIG_SYS_FSL_ERRATUM_A004508 #define CONFIG_SYS_FSL_ERRATUM_A007075 +#define CONFIG_SYS_FSL_USB1_PHY_ENABLE
This is not enabling A006261. Please rewrite the commit message.
#define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_FSL_ERRATUM_A004477 #define CONFIG_SYS_FSL_A004447_SVR_REV 0x10 diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index c045a24..07ad22d 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2953,6 +2953,8 @@ struct ccsr_pman { #define CONFIG_SYS_MPC85xx_DMA_OFFSET 0x21000 #define CONFIG_SYS_MPC85xx_USB1_OFFSET 0x22000 #define CONFIG_SYS_MPC85xx_USB2_OFFSET 0x23000 +#define CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET 0xE5000 +#define CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET 0xE5100
This is not for the workaround.
York
#ifdef CONFIG_TSECV2 #define CONFIG_SYS_TSEC1_OFFSET 0xB0000 #elif defined(CONFIG_TSECV2_1)
From: york sun
Sriram,
Same comment here, please fix the subject.
Ok. Will modify patch title and commit message in v3.
On 07/17/2016 08:47 PM, Sriram Dash wrote:
Apply USB errata A006261 for P1010.
A006261 is already applied to P1010.
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com
arch/powerpc/include/asm/config_mpc85xx.h | 1 + arch/powerpc/include/asm/immap_85xx.h | 2 ++ 2 files changed, 3 insertions(+)
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 505d355..9b7feda 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -162,6 +162,7 @@ #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 #define CONFIG_SYS_FSL_ERRATUM_A004508 #define CONFIG_SYS_FSL_ERRATUM_A007075 +#define CONFIG_SYS_FSL_USB1_PHY_ENABLE
This is not enabling A006261. Please rewrite the commit message.
Ok. Will modify patch title and commit message in v3.
#define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_FSL_ERRATUM_A004477 #define CONFIG_SYS_FSL_A004447_SVR_REV 0x10 diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index c045a24..07ad22d 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2953,6 +2953,8 @@ struct ccsr_pman { #define CONFIG_SYS_MPC85xx_DMA_OFFSET 0x21000 #define CONFIG_SYS_MPC85xx_USB1_OFFSET 0x22000 #define CONFIG_SYS_MPC85xx_USB2_OFFSET 0x23000 +#define CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET 0xE5000 +#define CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET 0xE5100
This is not for the workaround.
York
Ok. Will modify patch title and commit message in v3.
#ifdef CONFIG_TSECV2 #define CONFIG_SYS_TSEC1_OFFSET 0xB0000 #elif defined(CONFIG_TSECV2_1)
Apply USB errata A006261 for P2041, P2040.
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com --- drivers/usb/common/fsl-errata.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c index 183bf2b..122e17b 100644 --- a/drivers/usb/common/fsl-errata.c +++ b/drivers/usb/common/fsl-errata.c @@ -53,7 +53,8 @@ bool has_erratum_a006261(void) case SVR_P2041: case SVR_P2040: return IS_SVR_REV(svr, 1, 0) || - IS_SVR_REV(svr, 1, 1) || IS_SVR_REV(svr, 2, 1); + IS_SVR_REV(svr, 1, 1) || + IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1); case SVR_P3041: return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1) ||
On 07/18/2016 05:47 AM, Sriram Dash wrote:
Apply USB errata A006261 for P2041, P2040.
The subject and the commit message say different things. Moreover, the errata is obviously already applied to P2040 and P2041. I am extremely annoyed by such crap patches, so I stop reviewing here.
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com
drivers/usb/common/fsl-errata.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c index 183bf2b..122e17b 100644 --- a/drivers/usb/common/fsl-errata.c +++ b/drivers/usb/common/fsl-errata.c @@ -53,7 +53,8 @@ bool has_erratum_a006261(void) case SVR_P2041: case SVR_P2040: return IS_SVR_REV(svr, 1, 0) ||
IS_SVR_REV(svr, 1, 1) || IS_SVR_REV(svr, 2, 1);
IS_SVR_REV(svr, 1, 1) ||IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1);
Same comment to the subject.
On 07/17/2016 08:47 PM, Sriram Dash wrote:
Apply USB errata A006261 for P2041, P2040.
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com
drivers/usb/common/fsl-errata.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c index 183bf2b..122e17b 100644 --- a/drivers/usb/common/fsl-errata.c +++ b/drivers/usb/common/fsl-errata.c @@ -53,7 +53,8 @@ bool has_erratum_a006261(void) case SVR_P2041: case SVR_P2040: return IS_SVR_REV(svr, 1, 0) ||
IS_SVR_REV(svr, 1, 1) || IS_SVR_REV(svr, 2, 1);
IS_SVR_REV(svr, 1, 1) ||IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1);
Please explain in the commit message why you replace rev 1.1 with rev 2.0.
York
case SVR_P3041: return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1) ||
From: york sun
Same comment to the subject.
Ok. Will modify patch title and commit message in v3.
On 07/17/2016 08:47 PM, Sriram Dash wrote:
Apply USB errata A006261 for P2041, P2040.
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com
drivers/usb/common/fsl-errata.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c index 183bf2b..122e17b 100644 --- a/drivers/usb/common/fsl-errata.c +++ b/drivers/usb/common/fsl-errata.c @@ -53,7 +53,8 @@ bool has_erratum_a006261(void) case SVR_P2041: case SVR_P2040: return IS_SVR_REV(svr, 1, 0) ||
IS_SVR_REV(svr, 1, 1) || IS_SVR_REV(svr, 2, 1);
IS_SVR_REV(svr, 1, 1) ||IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1);Please explain in the commit message why you replace rev 1.1 with rev 2.0.
York
I have not removed the rev 1.1 support, only added the rev 2.0 support. Will modify patch title and commit message in v3.
case SVR_P3041: return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1) ||
Apply USB errata A006261 for P5040.
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com --- drivers/usb/common/fsl-errata.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c index 122e17b..765b25a 100644 --- a/drivers/usb/common/fsl-errata.c +++ b/drivers/usb/common/fsl-errata.c @@ -73,7 +73,8 @@ bool has_erratum_a006261(void) case SVR_T2081: return IS_SVR_REV(svr, 1, 0); case SVR_P5040: - return IS_SVR_REV(svr, 1, 0); + return IS_SVR_REV(svr, 1, 0) || + IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1); #endif }
Same comment to the subject line.
On 07/17/2016 08:47 PM, Sriram Dash wrote:
Apply USB errata A006261 for P5040.
Please add explanation the same erratum applies to P5040 rev 2.0.
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com
drivers/usb/common/fsl-errata.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c index 122e17b..765b25a 100644 --- a/drivers/usb/common/fsl-errata.c +++ b/drivers/usb/common/fsl-errata.c @@ -73,7 +73,8 @@ bool has_erratum_a006261(void) case SVR_T2081: return IS_SVR_REV(svr, 1, 0); case SVR_P5040:
return IS_SVR_REV(svr, 1, 0);
return IS_SVR_REV(svr, 1, 0) ||IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1);
Because the official document doesn't include these versions, please add a comment saying this erratum applies to affected revisions.
York
#endif }
From: york sun
Same comment to the subject line.
Ok. Will modify patch title and commit message in v3.
On 07/17/2016 08:47 PM, Sriram Dash wrote:
Apply USB errata A006261 for P5040.
Please add explanation the same erratum applies to P5040 rev 2.0.
Ok. Will modify patch title and commit message in v3.
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com
drivers/usb/common/fsl-errata.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c index 122e17b..765b25a 100644 --- a/drivers/usb/common/fsl-errata.c +++ b/drivers/usb/common/fsl-errata.c @@ -73,7 +73,8 @@ bool has_erratum_a006261(void) case SVR_T2081: return IS_SVR_REV(svr, 1, 0); case SVR_P5040:
return IS_SVR_REV(svr, 1, 0);
return IS_SVR_REV(svr, 1, 0) ||IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1);Because the official document doesn't include these versions, please add a comment saying this erratum applies to affected revisions.
York
Ok. Will modify patch title and commit message in v3.
#endif }
Do not apply errata A006261 for T4160 and T4080(rev 1.0, 2.0), T1040(rev 1.0), T2080(rev 1.0), T2081(rev 1.0).
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com --- arch/powerpc/include/asm/config_mpc85xx.h | 4 +--- drivers/usb/common/fsl-errata.c | 7 ------- 2 files changed, 1 insertion(+), 10 deletions(-)
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 9b7feda..6d845e8 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -641,6 +641,7 @@ #define CONFIG_SYS_NUM_FM2_DTSEC 8 #define CONFIG_SYS_NUM_FM2_10GEC 2 #define CONFIG_NUM_DDR_CONTROLLERS 3 +#define CONFIG_SYS_FSL_ERRATUM_A006261 #else #define CONFIG_SYS_NUM_FM1_DTSEC 6 #define CONFIG_SYS_NUM_FM1_10GEC 1 @@ -682,7 +683,6 @@ #define CONFIG_SYS_FSL_ERRATUM_A004468 #define CONFIG_SYS_FSL_ERRATUM_A_004934 #define CONFIG_SYS_FSL_ERRATUM_A005871 -#define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_FSL_ERRATUM_A006379 #define CONFIG_SYS_FSL_ERRATUM_A007186 #define CONFIG_SYS_FSL_ERRATUM_A006593 @@ -800,7 +800,6 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022) #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4" #define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY -#define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE @@ -908,7 +907,6 @@ defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013) #define CONFIG_SYS_FSL_SFP_VER_3_0 #define CONFIG_SYS_FSL_ISBC_VER 2 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 -#define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_FSL_ERRATUM_A006593 #define CONFIG_SYS_FSL_ERRATUM_A007186 #define CONFIG_SYS_FSL_ERRATUM_A006379 diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c index 765b25a..972016c 100644 --- a/drivers/usb/common/fsl-errata.c +++ b/drivers/usb/common/fsl-errata.c @@ -64,14 +64,7 @@ bool has_erratum_a006261(void) case SVR_P5021: return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); case SVR_T4240: - case SVR_T4160: - case SVR_T4080: return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); - case SVR_T1040: - return IS_SVR_REV(svr, 1, 0); - case SVR_T2080: - case SVR_T2081: - return IS_SVR_REV(svr, 1, 0); case SVR_P5040: return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1);
On 07/17/2016 08:47 PM, Sriram Dash wrote:
Do not apply errata A006261 for T4160 and T4080(rev 1.0, 2.0), T1040(rev 1.0), T2080(rev 1.0), T2081(rev 1.0).
I don't see mentioning the revision numbers helps here. Your patch is removing the erratum from T4160, T4080, T1040, T1042, T1020, T1022, T2080, T2081. It would be much clear if you put all A006261 related patches into one, and list all the SoCs affected by this erratum since the official released document contradicts with your list.
York
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com
arch/powerpc/include/asm/config_mpc85xx.h | 4 +--- drivers/usb/common/fsl-errata.c | 7 ------- 2 files changed, 1 insertion(+), 10 deletions(-)
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 9b7feda..6d845e8 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -641,6 +641,7 @@ #define CONFIG_SYS_NUM_FM2_DTSEC 8 #define CONFIG_SYS_NUM_FM2_10GEC 2 #define CONFIG_NUM_DDR_CONTROLLERS 3 +#define CONFIG_SYS_FSL_ERRATUM_A006261 #else #define CONFIG_SYS_NUM_FM1_DTSEC 6 #define CONFIG_SYS_NUM_FM1_10GEC 1 @@ -682,7 +683,6 @@ #define CONFIG_SYS_FSL_ERRATUM_A004468 #define CONFIG_SYS_FSL_ERRATUM_A_004934 #define CONFIG_SYS_FSL_ERRATUM_A005871 -#define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_FSL_ERRATUM_A006379 #define CONFIG_SYS_FSL_ERRATUM_A007186 #define CONFIG_SYS_FSL_ERRATUM_A006593 @@ -800,7 +800,6 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022) #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4" #define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY -#define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE @@ -908,7 +907,6 @@ defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013) #define CONFIG_SYS_FSL_SFP_VER_3_0 #define CONFIG_SYS_FSL_ISBC_VER 2 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 -#define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_FSL_ERRATUM_A006593 #define CONFIG_SYS_FSL_ERRATUM_A007186 #define CONFIG_SYS_FSL_ERRATUM_A006379 diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c index 765b25a..972016c 100644 --- a/drivers/usb/common/fsl-errata.c +++ b/drivers/usb/common/fsl-errata.c @@ -64,14 +64,7 @@ bool has_erratum_a006261(void) case SVR_P5021: return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); case SVR_T4240:
- case SVR_T4160:
- case SVR_T4080: return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
- case SVR_T1040:
return IS_SVR_REV(svr, 1, 0);- case SVR_T2080:
- case SVR_T2081:
return IS_SVR_REV(svr, 1, 0);
From: york sun On 07/17/2016 08:47 PM, Sriram Dash wrote:
Do not apply errata A006261 for T4160 and T4080(rev 1.0, 2.0), T1040(rev 1.0), T2080(rev 1.0), T2081(rev 1.0).
I don't see mentioning the revision numbers helps here. Your patch is removing the erratum from T4160, T4080, T1040, T1042, T1020, T1022, T2080, T2081. It would be much clear if you put all A006261 related patches into one, and list all the SoCs affected by this erratum since the official released document contradicts with your list.
York
Ok. I will divide the patchset into 3 patches. First patch for modifying the erratum. Second patch for enabling the init for P1010 so that erratum can be applied on it. Third patch to take care of the Socs addition and deletion.
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com
arch/powerpc/include/asm/config_mpc85xx.h | 4 +--- drivers/usb/common/fsl-errata.c | 7 ------- 2 files changed, 1 insertion(+), 10 deletions(-)
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 9b7feda..6d845e8 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -641,6 +641,7 @@ #define CONFIG_SYS_NUM_FM2_DTSEC 8 #define CONFIG_SYS_NUM_FM2_10GEC 2 #define CONFIG_NUM_DDR_CONTROLLERS 3 +#define CONFIG_SYS_FSL_ERRATUM_A006261 #else #define CONFIG_SYS_NUM_FM1_DTSEC 6 #define CONFIG_SYS_NUM_FM1_10GEC 1 @@ -682,7 +683,6 @@ #define CONFIG_SYS_FSL_ERRATUM_A004468 #define CONFIG_SYS_FSL_ERRATUM_A_004934 #define CONFIG_SYS_FSL_ERRATUM_A005871 -#define
CONFIG_SYS_FSL_ERRATUM_A006261
#define CONFIG_SYS_FSL_ERRATUM_A006379 #define CONFIG_SYS_FSL_ERRATUM_A007186 #define
CONFIG_SYS_FSL_ERRATUM_A006593
@@ -800,7 +800,6 @@ defined(CONFIG_PPC_T1020) ||
defined(CONFIG_PPC_T1022)
#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4" #define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY -#define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE @@ -908,7 +907,6 @@ defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013) #define CONFIG_SYS_FSL_SFP_VER_3_0 #define CONFIG_SYS_FSL_ISBC_VER 2 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 -#define CONFIG_SYS_FSL_ERRATUM_A006261 #define
CONFIG_SYS_FSL_ERRATUM_A006593
#define CONFIG_SYS_FSL_ERRATUM_A007186 #define CONFIG_SYS_FSL_ERRATUM_A006379 diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c index 765b25a..972016c 100644 --- a/drivers/usb/common/fsl-errata.c +++ b/drivers/usb/common/fsl-errata.c @@ -64,14 +64,7 @@ bool has_erratum_a006261(void) case SVR_P5021: return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); case SVR_T4240:
- case SVR_T4160:
- case SVR_T4080: return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
- case SVR_T1040:
return IS_SVR_REV(svr, 1, 0);- case SVR_T2080:
- case SVR_T2081:
return IS_SVR_REV(svr, 1, 0);
On 07/18/2016 05:47 AM, Sriram Dash wrote:
Modifies errata implementation due to the fact that P3041, P5020, and P5040 are all big endian for the USB PHY registers, but they were specified little endian. Applies the errata for P1010, P2041, P5040. Removes the errata for T4160, T1040, T2080.
Sriram Dash (5): mpc85xx/powerpc:cpu_init: Modified the errata A006261 according to endianness mpc85xx/powerpc:P1010: Apply errata A006261 for P1010 mpc85xx/powerpc: P2041: Apply errata A006261 for P2041 mpc85xx/powerpc: P5040: Apply errata A006261 for P5040 mpc85xx/powerpc: Do not apply errata A006261 for T4160, T1040, T2080
arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++-- arch/powerpc/include/asm/config_mpc85xx.h | 5 ++--- arch/powerpc/include/asm/immap_85xx.h | 2 ++ drivers/usb/common/fsl-errata.c | 13 ++++--------- 4 files changed, 10 insertions(+), 14 deletions(-)
York, I expect a thorough review from you _and_ a full build test. I will apply it only after you perform such verification. Please do let me know when you're done.
On 07/18/2016 02:36 AM, Marek Vasut wrote:
On 07/18/2016 05:47 AM, Sriram Dash wrote:
Modifies errata implementation due to the fact that P3041, P5020, and P5040 are all big endian for the USB PHY registers, but they were specified little endian. Applies the errata for P1010, P2041, P5040. Removes the errata for T4160, T1040, T2080.
Sriram Dash (5): mpc85xx/powerpc:cpu_init: Modified the errata A006261 according to endianness mpc85xx/powerpc:P1010: Apply errata A006261 for P1010 mpc85xx/powerpc: P2041: Apply errata A006261 for P2041 mpc85xx/powerpc: P5040: Apply errata A006261 for P5040 mpc85xx/powerpc: Do not apply errata A006261 for T4160, T1040, T2080
arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++-- arch/powerpc/include/asm/config_mpc85xx.h | 5 ++--- arch/powerpc/include/asm/immap_85xx.h | 2 ++ drivers/usb/common/fsl-errata.c | 13 ++++--------- 4 files changed, 10 insertions(+), 14 deletions(-)
York, I expect a thorough review from you _and_ a full build test. I will apply it only after you perform such verification. Please do let me know when you're done.
NAK this set. Do not apply.
York
participants (4)
-
Marek Vasut -
Sriram Dash -
y＠lvd5587.freescale.com -
york sun