[U-Boot] omap3_beagle problem booting kernel on latest u-boot

Aneesh, Dirk, Jason:
During our monthly release testing of Linaro images we discovered that the kernel was pretty unreliable with the latest upstream u-boot. After bisecting we found that reverting this patch fixes the problem
commit 45bf05854bc94ed8bae9e9114292895b990327ea Author: Aneesh V aneesh@ti.com Date: Thu Jun 16 23:30:53 2011 +0000
armv7: adapt omap3 to the new cache maintenance framework
adapt omap3 to the new layered cache maintenance framework
Signed-off-by: Aneesh V aneesh@ti.com
No idea why because we tried disabling cache by adding CONFIG_SYS_DCACHE_OFF to the board config but that did not seem to fix the problem. The problem in the kernel was general instability usually ending in the rootfs not being mounted. Sometimes random kernel crashes have been observed. We have never made it to a shell prompt before reverting.
If we figure anything else out we will let you know.
--john

John,
My primary suspect would be cache. But the fact that CONFIG_SYS_DCACHE_OFF is not helping is strange. Could you double-check this and also make sure that CONFIG_SYS_L2CACHE_OFF is enabled too.
regards, Aneesh
On Thursday 29 September 2011 11:50 AM, John Rigby wrote:
Aneesh, Dirk, Jason:
During our monthly release testing of Linaro images we discovered that the kernel was pretty unreliable with the latest upstream u-boot. After bisecting we found that reverting this patch fixes the problem
commit 45bf05854bc94ed8bae9e9114292895b990327ea Author: Aneesh Vaneesh@ti.com Date: Thu Jun 16 23:30:53 2011 +0000
armv7: adapt omap3 to the new cache maintenance framework adapt omap3 to the new layered cache maintenance framework Signed-off-by: Aneesh V<aneesh@ti.com>
No idea why because we tried disabling cache by adding CONFIG_SYS_DCACHE_OFF to the board config but that did not seem to fix the problem. The problem in the kernel was general instability usually ending in the rootfs not being mounted. Sometimes random kernel crashes have been observed. We have never made it to a shell prompt before reverting.
If we figure anything else out we will let you know.
--john

On Thu, Sep 29, 2011 at 3:09 AM, Aneesh V aneesh@ti.com wrote:
John,
My primary suspect would be cache. But the fact that CONFIG_SYS_DCACHE_OFF is not helping is strange. Could you double-check this and also make sure that CONFIG_SYS_L2CACHE_OFF is enabled too.
Ok, verified that CONFIG_SYS_DCACHE_OFF is defined and also added CONFIG_SYS_L2CACHE_OFF. And it still fails.
--john

John,
On Thursday 29 September 2011 09:00 PM, John Rigby wrote:
On Thu, Sep 29, 2011 at 3:09 AM, Aneesh Vaneesh@ti.com wrote:
John,
My primary suspect would be cache. But the fact that CONFIG_SYS_DCACHE_OFF is not helping is strange. Could you double-check this and also make sure that CONFIG_SYS_L2CACHE_OFF is enabled too.
Ok, verified that CONFIG_SYS_DCACHE_OFF is defined and also added CONFIG_SYS_L2CACHE_OFF. And it still fails.
Could you try something like below(also attached). I suspect issues with cache invalidation before Linux.
--- diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c index 1b4e808..6907ff6 100644 --- a/arch/arm/cpu/armv7/cache_v7.c +++ b/arch/arm/cpu/armv7/cache_v7.c @@ -248,13 +248,6 @@ static void v7_inval_tlb(void) CP15ISB; } -void invalidate_dcache_all(void) -{ - v7_maint_dcache_all(ARMV7_DCACHE_INVAL_ALL); - - v7_outer_cache_inval_all(); -} - /* * Performs a clean & invalidation of the entire data cache * at all levels @@ -306,9 +299,6 @@ void flush_cache(unsigned long start, unsigned long size) flush_dcache_range(start, start + size); } #else /* #ifndef CONFIG_SYS_DCACHE_OFF */ -void invalidate_dcache_all(void) -{ -}
void flush_dcache_all(void) { @@ -356,6 +346,14 @@ void invalidate_icache_all(void) } #endif
+ +void invalidate_dcache_all(void) +{ + v7_maint_dcache_all(ARMV7_DCACHE_INVAL_ALL); + + omap3_invalidate_l2_cache_secure(); +} + /* * Stub implementations for outer cache operations */ diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c index 0448bc9..7221f5a 100644 --- a/arch/arm/cpu/armv7/omap3/board.c +++ b/arch/arm/cpu/armv7/omap3/board.c @@ -360,9 +360,8 @@ static void omap3_setup_aux_cr(void) omap3_update_aux_cr_secure(0xE0, 0); }
-#ifndef CONFIG_SYS_L2CACHE_OFF /* Invalidate the entire L2 cache from secure mode */ -static void omap3_invalidate_l2_cache_secure(void) +void omap3_invalidate_l2_cache_secure(void) { if (get_device_type() == GP_DEVICE) { omap3_gp_romcode_call(OMAP3_GP_ROMCODE_API_L2_INVAL, @@ -376,6 +375,7 @@ static void omap3_invalidate_l2_cache_secure(void) } }
+#ifndef CONFIG_SYS_L2CACHE_OFF void v7_outer_cache_enable(void) { /* Set L2EN */
participants (2)
-
Aneesh V
-
John Rigby