[U-Boot] [PATCH] AT91: Add SD/MMC controller support
This patch allows to use the atmel_mci SD/MMC driver on the at91 architecture. It contains: - initialization code for the MCI controller for all the supported AT91. It allows the use of only one controller even if a SoC has two controllers (anyway there's no support for it in atmel_mci as of now) - the necessary get_mci_clk_rate function - definition of MMCI_BASE for use in atmel_mci - the cpu_mmc_init function. As of now this is not used, but will be required when atmel_mci is ported to the new generic mmc API.
Signed-off-by: Albin Tonnerre albin.tonnerre@free-electrons.com --- cpu/arm926ejs/at91/at91cap9_devices.c | 36 ++++++++++++++++++ cpu/arm926ejs/at91/at91sam9260_devices.c | 27 +++++++++++++ cpu/arm926ejs/at91/at91sam9261_devices.c | 18 +++++++++ cpu/arm926ejs/at91/at91sam9263_devices.c | 54 +++++++++++++++++++++++++++ cpu/arm926ejs/at91/at91sam9m10g45_devices.c | 54 +++++++++++++++++++++++++++ cpu/arm926ejs/at91/at91sam9rl_devices.c | 22 +++++++++++ cpu/arm926ejs/at91/cpu.c | 7 +++ include/asm-arm/arch-at91/at91_common.h | 2 + include/asm-arm/arch-at91/clk.h | 5 ++ include/asm-arm/arch-at91/hardware.h | 18 +++++++++ include/asm-arm/arch-at91/memory-map.h | 1 + 11 files changed, 244 insertions(+), 0 deletions(-)
diff --git a/cpu/arm926ejs/at91/at91cap9_devices.c b/cpu/arm926ejs/at91/at91cap9_devices.c index 39e405f..4486cbb 100644 --- a/cpu/arm926ejs/at91/at91cap9_devices.c +++ b/cpu/arm926ejs/at91/at91cap9_devices.c @@ -79,6 +79,42 @@ void at91_serial_hw_init(void) #endif }
+#ifdef CONFIG_ATMEL_MCI +#ifdef CONFIG_AT91_MCI0 +void at91_mci0_hw_init(unsigned long mask) +{ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_MCI0); + at91_set_A_periph(AT91_PIN_PA2, 0); + + if (mask & (1 << 0)) { + at91_set_A_periph(AT91_PIN_PA0, 1); + at91_set_A_periph(AT91_PIN_PA1, 1); + if (mask & (1 << 1)) { + at91_set_A_periph(AT91_PIN_PA3, 1); + at91_set_A_periph(AT91_PIN_PA4, 1); + at91_set_A_periph(AT91_PIN_PA5, 1); + } + } +} +#elif defined(CONFIG_AT91_MCI1 +void at91_mci1_hw_init(unsigned long mask) +{ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_MCI); + at91_set_A_periph(AT91_PIN_PA16, 0); + + if (mask & (1 << 0)) { + at91_set_A_periph(AT91_PIN_PA17, 1); + at91_set_A_periph(AT91_PIN_PA18, 1); + if (mask & (1 << 1)) { + at91_set_A_periph(AT91_PIN_PA19, 1); + at91_set_A_periph(AT91_PIN_PA20, 1); + at91_set_A_periph(AT91_PIN_PA21, 1); + } + } +} +#endif +#endif + #ifdef CONFIG_HAS_DATAFLASH void at91_spi0_hw_init(unsigned long cs_mask) { diff --git a/cpu/arm926ejs/at91/at91sam9260_devices.c b/cpu/arm926ejs/at91/at91sam9260_devices.c index f86cb99..ea22030 100644 --- a/cpu/arm926ejs/at91/at91sam9260_devices.c +++ b/cpu/arm926ejs/at91/at91sam9260_devices.c @@ -75,6 +75,33 @@ void at91_serial_hw_init(void) #endif }
+#ifdef CONFIG_ATMEL_MCI +void at91_mci0_hw_init(unsigned long mask) +{ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_MCI); + at91_set_A_periph(AT91_PIN_PA8, 0); + + if (mask & (1 << 0)) { + at91_set_A_periph(AT91_PIN_PA6, 1); + at91_set_A_periph(AT91_PIN_PA7, 1); + if (mask & (1 << 1)) { + at91_set_A_periph(AT91_PIN_PA9, 1); + at91_set_A_periph(AT91_PIN_PA10, 1); + at91_set_A_periph(AT91_PIN_PA11, 1); + } + } + if (mask & (1 << 2)) { + at91_set_B_periph(AT91_PIN_PA0, 1); + at91_set_B_periph(AT91_PIN_PA1, 1); + if (mask & (1 << 3)) { + at91_set_B_periph(AT91_PIN_PA3, 1); + at91_set_B_periph(AT91_PIN_PA4, 1); + at91_set_B_periph(AT91_PIN_PA5, 1); + } + } +} +#endif /* ATMEL_MCI */ + #if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI) void at91_spi0_hw_init(unsigned long cs_mask) { diff --git a/cpu/arm926ejs/at91/at91sam9261_devices.c b/cpu/arm926ejs/at91/at91sam9261_devices.c index 16d411f..7ee573c 100644 --- a/cpu/arm926ejs/at91/at91sam9261_devices.c +++ b/cpu/arm926ejs/at91/at91sam9261_devices.c @@ -75,6 +75,24 @@ void at91_serial_hw_init(void) #endif }
+#ifdef CONFIG_ATMEL_MCI +void at91_mci0_hw_init(unsigned long mask) +{ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_MCI); + at91_set_B_periph(AT91_PIN_PA2, 0); + + if (mask & (1 << 0)) { + at91_set_B_periph(AT91_PIN_PA0, 1); + at91_set_B_periph(AT91_PIN_PA1, 1); + if (mask & (1 << 1)) { + at91_set_B_periph(AT91_PIN_PA4, 1); + at91_set_B_periph(AT91_PIN_PA5, 1); + at91_set_B_periph(AT91_PIN_PA6, 1); + } + } +} +#endif /* ATMEL_MCI */ + #ifdef CONFIG_HAS_DATAFLASH void at91_spi0_hw_init(unsigned long cs_mask) { diff --git a/cpu/arm926ejs/at91/at91sam9263_devices.c b/cpu/arm926ejs/at91/at91sam9263_devices.c index f72efdf..40e36a4 100644 --- a/cpu/arm926ejs/at91/at91sam9263_devices.c +++ b/cpu/arm926ejs/at91/at91sam9263_devices.c @@ -79,6 +79,60 @@ void at91_serial_hw_init(void) #endif }
+#ifdef CONFIG_ATMEL_MCI +#ifdef CONFIG_AT91_MCI0 +void at91_mci0_hw_init(unsigned long mask) +{ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_MCI0); + at91_set_A_periph(AT91_PIN_PA12, 0); + + if (mask & (1 << 0)) { + at91_set_A_periph(AT91_PIN_PA0, 1); + at91_set_A_periph(AT91_PIN_PA1, 1); + if (mask & (1 << 1)) { + at91_set_A_periph(AT91_PIN_PA3, 1); + at91_set_A_periph(AT91_PIN_PA4, 1); + at91_set_A_periph(AT91_PIN_PA5, 1); + } + } + if (mask & (1 << 2)) { + at91_set_A_periph(AT91_PIN_PA16, 1); + at91_set_A_periph(AT91_PIN_PA17, 1); + if (mask & (1 << 3)) { + at91_set_A_periph(AT91_PIN_PA18, 1); + at91_set_A_periph(AT91_PIN_PA19, 1); + at91_set_A_periph(AT91_PIN_PA20, 1); + } + } +} +#elif defined(CONFIG_AT91_MCI1) +void at91_mci1_hw_init(unsigned long mask) +{ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_MCI); + at91_set_A_periph(AT91_PIN_PA6, 0); + + if (mask & (1 << 0)) { + at91_set_A_periph(AT91_PIN_PA7, 1); + at91_set_A_periph(AT91_PIN_PA8, 1); + if (mask & (1 << 1)) { + at91_set_A_periph(AT91_PIN_PA9, 1); + at91_set_A_periph(AT91_PIN_PA10, 1); + at91_set_A_periph(AT91_PIN_PA11, 1); + } + } + if (mask & (1 << 2)) { + at91_set_B_periph(AT91_PIN_PA21, 1); + at91_set_B_periph(AT91_PIN_PA22, 1); + if (mask & (1 << 3)) { + at91_set_B_periph(AT91_PIN_PA23, 1); + at91_set_B_periph(AT91_PIN_PA24, 1); + at91_set_B_periph(AT91_PIN_PA25, 1); + } + } +} +#endif +#endif + #ifdef CONFIG_HAS_DATAFLASH void at91_spi0_hw_init(unsigned long cs_mask) { diff --git a/cpu/arm926ejs/at91/at91sam9m10g45_devices.c b/cpu/arm926ejs/at91/at91sam9m10g45_devices.c index 98d90f2..647306a 100644 --- a/cpu/arm926ejs/at91/at91sam9m10g45_devices.c +++ b/cpu/arm926ejs/at91/at91sam9m10g45_devices.c @@ -75,6 +75,60 @@ void at91_serial_hw_init(void) #endif }
+#ifdef CONFIG_ATMEL_MCI +#ifdef CONFIG_AT91_MCI0 +void at91_mci0_hw_init(unsigned long mask) +{ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_MCI0); + at91_set_A_periph(AT91_PIN_PA12, 0); + + if (mask & (1 << 0)) { + at91_set_A_periph(AT91_PIN_PA0, 1); + at91_set_A_periph(AT91_PIN_PA1, 1); + if (mask & (1 << 1)) { + at91_set_A_periph(AT91_PIN_PA3, 1); + at91_set_A_periph(AT91_PIN_PA4, 1); + at91_set_A_periph(AT91_PIN_PA5, 1); + } + } + if (mask & (1 << 2)) { + at91_set_A_periph(AT91_PIN_PA16, 1); + at91_set_A_periph(AT91_PIN_PA17, 1); + if (mask & (1 << 3)) { + at91_set_A_periph(AT91_PIN_PA18, 1); + at91_set_A_periph(AT91_PIN_PA19, 1); + at91_set_A_periph(AT91_PIN_PA20, 1); + } + } +} +#elif defined(CONFIG_AT91_MCI1 +void at91_mci1_hw_init(unsigned long mask) +{ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_MCI); + at91_set_A_periph(AT91_PIN_PA6, 0); + + if (mask & (1 << 0)) { + at91_set_A_periph(AT91_PIN_PA7, 1); + at91_set_A_periph(AT91_PIN_PA8, 1); + if (mask & (1 << 1)) { + at91_set_A_periph(AT91_PIN_PA9, 1); + at91_set_A_periph(AT91_PIN_PA10, 1); + at91_set_A_periph(AT91_PIN_PA11, 1); + } + } + if (mask & (1 << 2)) { + at91_set_B_periph(AT91_PIN_PA0, 1); + at91_set_B_periph(AT91_PIN_PA1, 1); + if (mask & (1 << 3)) { + at91_set_B_periph(AT91_PIN_PA3, 1); + at91_set_B_periph(AT91_PIN_PA4, 1); + at91_set_B_periph(AT91_PIN_PA5, 1); + } + } +} +#endif +#endif + #ifdef CONFIG_ATMEL_SPI void at91_spi0_hw_init(unsigned long cs_mask) { diff --git a/cpu/arm926ejs/at91/at91sam9rl_devices.c b/cpu/arm926ejs/at91/at91sam9rl_devices.c index ebed193..41ae4a8 100644 --- a/cpu/arm926ejs/at91/at91sam9rl_devices.c +++ b/cpu/arm926ejs/at91/at91sam9rl_devices.c @@ -75,6 +75,28 @@ void at91_serial_hw_init(void) #endif }
+/* + * The AT91SAM9RL64 is said to have 2 slots, but the datasheet doesn't + * seem to mention to what pins the second slot is assigned + */ +#ifdef CONFIG_ATMEL_MCI +void at91_mci0_hw_init(unsigned long mask) +{ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_MCI); + at91_set_A_periph(AT91_PIN_PA2, 0); + + if (mask & (1 << 0)) { + at91_set_A_periph(AT91_PIN_PA0, 1); + at91_set_A_periph(AT91_PIN_PA1, 1); + if (mask & (1 << 1)) { + at91_set_A_periph(AT91_PIN_PA3, 1); + at91_set_A_periph(AT91_PIN_PA4, 1); + at91_set_A_periph(AT91_PIN_PA5, 1); + } + } +} +#endif /* ATMEL_MCI */ + #ifdef CONFIG_HAS_DATAFLASH void at91_spi0_hw_init(unsigned long cs_mask) { diff --git a/cpu/arm926ejs/at91/cpu.c b/cpu/arm926ejs/at91/cpu.c index f2f7b62..f96b715 100644 --- a/cpu/arm926ejs/at91/cpu.c +++ b/cpu/arm926ejs/at91/cpu.c @@ -52,3 +52,10 @@ int print_cpuinfo(void) return 0; } #endif + +#ifdef CONFIG_GENERIC_MMC +int cpu_mmc_init(bd_t *bis) +{ + atmel_mci_init(bis); +} +#endif /* GENERIC_MMC */ diff --git a/include/asm-arm/arch-at91/at91_common.h b/include/asm-arm/arch-at91/at91_common.h index 01840ee..01fcdd6 100644 --- a/include/asm-arm/arch-at91/at91_common.h +++ b/include/asm-arm/arch-at91/at91_common.h @@ -32,6 +32,8 @@ void at91_serial0_hw_init(void); void at91_serial1_hw_init(void); void at91_serial2_hw_init(void); void at91_serial3_hw_init(void); +void at91_mci0_hw_init(unsigned long mask); +void at91_mci1_hw_init(unsigned long mask); void at91_spi0_hw_init(unsigned long cs_mask); void at91_spi1_hw_init(unsigned long cs_mask); void at91_uhp_hw_init(void); diff --git a/include/asm-arm/arch-at91/clk.h b/include/asm-arm/arch-at91/clk.h index f642dd9..457e6c9 100644 --- a/include/asm-arm/arch-at91/clk.h +++ b/include/asm-arm/arch-at91/clk.h @@ -59,5 +59,10 @@ static inline unsigned long get_twi_clk_rate(unsigned int dev_id) return get_mck_clk_rate(); }
+static inline unsigned long get_mci_clk_rate(void) +{ + return get_mck_clk_rate(); +} + int at91_clock_init(unsigned long main_clock); #endif /* __ASM_ARM_ARCH_CLK_H__ */ diff --git a/include/asm-arm/arch-at91/hardware.h b/include/asm-arm/arch-at91/hardware.h index de06a10..ca4af37 100644 --- a/include/asm-arm/arch-at91/hardware.h +++ b/include/asm-arm/arch-at91/hardware.h @@ -20,31 +20,49 @@ #include <asm/arch/at91rm9200.h> #elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20) #include <asm/arch/at91sam9260.h> +#define AT91_BASE_MCI AT91SAM9260_BASE_MCI #define AT91_BASE_SPI AT91SAM9260_BASE_SPI0 #define AT91_ID_UHP AT91SAM9260_ID_UHP #define AT91_PMC_UHP AT91SAM926x_PMC_UHP #elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) #include <asm/arch/at91sam9261.h> +#define AT91_BASE_MCI AT91SAM9261_BASE_MCI #define AT91_BASE_SPI AT91SAM9261_BASE_SPI0 #define AT91_ID_UHP AT91SAM9261_ID_UHP #define AT91_PMC_UHP AT91SAM926x_PMC_UHP #elif defined(CONFIG_AT91SAM9263) #include <asm/arch/at91sam9263.h> +#ifdef CONFIG_AT91_MCI1 + #define AT91_BASE_MCI AT91SAM9263_BASE_MCI1 +#else + #define AT91_BASE_MCI AT91SAM9263_BASE_MCI0 +#endif #define AT91_BASE_SPI AT91SAM9263_BASE_SPI0 #define AT91_ID_UHP AT91SAM9263_ID_UHP #define AT91_PMC_UHP AT91SAM926x_PMC_UHP #elif defined(CONFIG_AT91SAM9RL) #include <asm/arch/at91sam9rl.h> +#define AT91_BASE_MCI AT91SAM9RL_BASE_MCI #define AT91_BASE_SPI AT91SAM9RL_BASE_SPI #define AT91_ID_UHP AT91SAM9RL_ID_UHP #elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) #include <asm/arch/at91sam9g45.h> +#ifdef CONFIG_AT91_MCI1 + #define AT91_BASE_MCI AT91SAM9G45_BASE_MCI1 +#else + #define AT91_BASE_MCI AT91SAM9G45_BASE_MCI0 +#endif #define AT91_BASE_EMAC AT91SAM9G45_BASE_EMAC #define AT91_BASE_SPI AT91SAM9G45_BASE_SPI0 #define AT91_ID_UHP AT91SAM9G45_ID_UHPHS #define AT91_PMC_UHP AT91SAM926x_PMC_UHP #elif defined(CONFIG_AT91CAP9) #include <asm/arch/at91cap9.h> +#ifdef CONFIG_AT91_MCI1 + #define AT91_BASE_MCI AT91CAP9_BASE_MCI1 +#else + #define AT91_BASE_MCI AT91CAP9_BASE_MCI0 +#endif #define AT91_BASE_SPI AT91CAP9_BASE_SPI0 #define AT91_ID_UHP AT91CAP9_ID_UHP #define AT91_PMC_UHP AT91CAP9_PMC_UHP diff --git a/include/asm-arm/arch-at91/memory-map.h b/include/asm-arm/arch-at91/memory-map.h index f605f37..300b61d 100644 --- a/include/asm-arm/arch-at91/memory-map.h +++ b/include/asm-arm/arch-at91/memory-map.h @@ -31,5 +31,6 @@ #define USART2_BASE AT91_USART2 #define USART3_BASE (AT91_BASE_SYS + AT91_DBGU) #define SPI0_BASE AT91_BASE_SPI +#define MMCI_BASE AT91_BASE_MCI
#endif /* __ASM_ARM_ARCH_MEMORYMAP_H__ */
On Tue, Sep 01, 2009 at 10:37:21AM +0200, Albin Tonnerre wrote:
This patch allows to use the atmel_mci SD/MMC driver on the at91 architecture. It contains:
- initialization code for the MCI controller for all the supported AT91. It allows the use of only one controller even if a SoC has two controllers (anyway there's no support for it in atmel_mci as of now)
- the necessary get_mci_clk_rate function
- definition of MMCI_BASE for use in atmel_mci
- the cpu_mmc_init function. As of now this is not used, but will be required when atmel_mci is ported to the new generic mmc API.
Signed-off-by: Albin Tonnerre albin.tonnerre@free-electrons.com
cpu/arm926ejs/at91/at91cap9_devices.c | 36 ++++++++++++++++++ cpu/arm926ejs/at91/at91sam9260_devices.c | 27 +++++++++++++ cpu/arm926ejs/at91/at91sam9261_devices.c | 18 +++++++++ cpu/arm926ejs/at91/at91sam9263_devices.c | 54 +++++++++++++++++++++++++++ cpu/arm926ejs/at91/at91sam9m10g45_devices.c | 54 +++++++++++++++++++++++++++ cpu/arm926ejs/at91/at91sam9rl_devices.c | 22 +++++++++++ cpu/arm926ejs/at91/cpu.c | 7 +++ include/asm-arm/arch-at91/at91_common.h | 2 + include/asm-arm/arch-at91/clk.h | 5 ++ include/asm-arm/arch-at91/hardware.h | 18 +++++++++ include/asm-arm/arch-at91/memory-map.h | 1 + 11 files changed, 244 insertions(+), 0 deletions(-)
[snip]
diff --git a/cpu/arm926ejs/at91/at91sam9260_devices.c b/cpu/arm926ejs/at91/at91sam9260_devices.c
For some reason this doesn't apply cleanly. I patched the file manually and it worked.
-sk
On Tue, Sep 01, 2009 at 02:57:46PM +0300, Sami Kantoluoto wrote:
On Tue, Sep 01, 2009 at 10:37:21AM +0200, Albin Tonnerre wrote:
This patch allows to use the atmel_mci SD/MMC driver on the at91 architecture. It contains:
- initialization code for the MCI controller for all the supported AT91. It allows the use of only one controller even if a SoC has two controllers (anyway there's no support for it in atmel_mci as of now)
- the necessary get_mci_clk_rate function
- definition of MMCI_BASE for use in atmel_mci
- the cpu_mmc_init function. As of now this is not used, but will be required when atmel_mci is ported to the new generic mmc API.
Signed-off-by: Albin Tonnerre albin.tonnerre@free-electrons.com
cpu/arm926ejs/at91/at91cap9_devices.c | 36 ++++++++++++++++++ cpu/arm926ejs/at91/at91sam9260_devices.c | 27 +++++++++++++ cpu/arm926ejs/at91/at91sam9261_devices.c | 18 +++++++++ cpu/arm926ejs/at91/at91sam9263_devices.c | 54 +++++++++++++++++++++++++++ cpu/arm926ejs/at91/at91sam9m10g45_devices.c | 54 +++++++++++++++++++++++++++ cpu/arm926ejs/at91/at91sam9rl_devices.c | 22 +++++++++++ cpu/arm926ejs/at91/cpu.c | 7 +++ include/asm-arm/arch-at91/at91_common.h | 2 + include/asm-arm/arch-at91/clk.h | 5 ++ include/asm-arm/arch-at91/hardware.h | 18 +++++++++ include/asm-arm/arch-at91/memory-map.h | 1 + 11 files changed, 244 insertions(+), 0 deletions(-)
[snip]
diff --git a/cpu/arm926ejs/at91/at91sam9260_devices.c b/cpu/arm926ejs/at91/at91sam9260_devices.c
For some reason this doesn't apply cleanly. I patched the file manually and it worked.
Ok, it's because of this hasn't been committed (at91sam9260_devices.c):
#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI) void at91_spi0_hw_init(unsigned long cs_mask) {
Have you sent patch about this (CONFIG_ATMEL_SPI is not checked in committed file)?
-sk
On Tue, Sep 01, 2009 at 03:04:24PM +0300, Sami Kantoluoto wrote :
On Tue, Sep 01, 2009 at 02:57:46PM +0300, Sami Kantoluoto wrote:
On Tue, Sep 01, 2009 at 10:37:21AM +0200, Albin Tonnerre wrote:
This patch allows to use the atmel_mci SD/MMC driver on the at91 architecture. It contains:
- initialization code for the MCI controller for all the supported AT91. It allows the use of only one controller even if a SoC has two controllers (anyway there's no support for it in atmel_mci as of now)
- the necessary get_mci_clk_rate function
- definition of MMCI_BASE for use in atmel_mci
- the cpu_mmc_init function. As of now this is not used, but will be required when atmel_mci is ported to the new generic mmc API.
Signed-off-by: Albin Tonnerre albin.tonnerre@free-electrons.com
cpu/arm926ejs/at91/at91cap9_devices.c | 36 ++++++++++++++++++ cpu/arm926ejs/at91/at91sam9260_devices.c | 27 +++++++++++++ cpu/arm926ejs/at91/at91sam9261_devices.c | 18 +++++++++ cpu/arm926ejs/at91/at91sam9263_devices.c | 54 +++++++++++++++++++++++++++ cpu/arm926ejs/at91/at91sam9m10g45_devices.c | 54 +++++++++++++++++++++++++++ cpu/arm926ejs/at91/at91sam9rl_devices.c | 22 +++++++++++ cpu/arm926ejs/at91/cpu.c | 7 +++ include/asm-arm/arch-at91/at91_common.h | 2 + include/asm-arm/arch-at91/clk.h | 5 ++ include/asm-arm/arch-at91/hardware.h | 18 +++++++++ include/asm-arm/arch-at91/memory-map.h | 1 + 11 files changed, 244 insertions(+), 0 deletions(-)
[snip]
diff --git a/cpu/arm926ejs/at91/at91sam9260_devices.c b/cpu/arm926ejs/at91/at91sam9260_devices.c
For some reason this doesn't apply cleanly. I patched the file manually and it worked.
Ok, it's because of this hasn't been committed (at91sam9260_devices.c):
#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI) void at91_spi0_hw_init(unsigned long cs_mask) {
Oh, sorry. Yes, that's part of both the TNY-A9G20 and SBC35-A9G20 boards support patches, which are both still pending review/inclusion. Jean-Christophe: ping?
Regards,
participants (2)
-
Albin Tonnerre -
Sami Kantoluoto